Claims
- 1. A method for fabricating a semiconductor memory device, comprising the steps of:a) forming a lower electrode over a substrate; b) forming a charge-storable dielectric film on the lower electrode, the charge-storable dielectric film being made of a dielectric in which information is storable; and c) forming an upper electrode on the charge-storable dielectric film, wherein the step b) includes: i) forming a first dielectric layer made of an oxide containing at least two metal elements and a dielectric with a high relative dielectric constant or a ferroelectric; and ii) forming a second dielectric layer over and/or under the first dielectric layer, the second dielectric layer being made of an oxide containing the same elements as those of the first dielectric layer but having a different composition than that of the first dielectric layer, the amount of leakage current flowing through the second dielectric layer being smaller than that flowing through the first dielectric layer.
- 2. The method of claim 1, wherein in the step i), the first dielectric layer is formed to contain the three elements of Ba, Sr and Ti substantially at a stoichiometric composition, andwherein in the step ii), the second dielectric layer is formed to contain the three elements of Ba, Sr and Ti at such a composition that the number of Ti atoms accounts for larger than 50% and equal to or smaller than 60% of the total number of Ba, Sr and Ti atoms.
- 3. The method of claim 1 or 2, wherein a heat treatment is conducted to heat the substrate at 650° C. or more before the steps i) and ii) are performed.
- 4. The method of claim 2, wherein in the step b), while the first and second dielectric layers are formed by a metalorganic chemical vapor deposition process, the temperature of the substrate is changed, thereby changing the ratio of the number of Ti atoms to the total number of Ba, Sr and Ti atoms.
- 5. The method of claim 4, wherein in the step b), the temperature of the substrate is kept constant in the step i), but changed in the step ii).
Priority Claims (1)
Number |
Date |
Country |
Kind |
10-130172 |
May 1998 |
JP |
|
Parent Case Info
This is a division of U.S. patent application Ser. No. 09/310,313, filed May 12, 1999.
US Referenced Citations (3)
Number |
Name |
Date |
Kind |
5572052 |
Kashihara et al. |
Nov 1996 |
|
5690727 |
Azuma et al. |
Nov 1997 |
|
5854734 |
Sandhu et al. |
Dec 1998 |
|
Non-Patent Literature Citations (1)
Entry |
Jpn. J. Appl. Phys.vol. 33 (1994) pp. 5129-5134 Part 1, No. 9B, Sep. 1994. |