Semiconductor module

Information

  • Patent Grant
  • D978809
  • Patent Number
    D978,809
  • Date Filed
    Monday, November 2, 2020
    4 years ago
  • Date Issued
    Tuesday, February 21, 2023
    2 years ago
  • US Classifications
    Field of Search
    • US
    • D13 182
    • 257 678000
    • 257 684000
    • 257 690000
    • 257 691000
    • 361 679010
    • 361 713000
    • 361 728000
    • 361 736000
    • 361 760000
    • 361 761000
    • 361 772000
    • 361 775000
    • 361 783000
    • 361 820000
    • 174 250000
    • 174 253000
    • 438 015000
    • 438 025000
    • 438 026000
    • 438 051000
    • 438 055000
    • 438 063000
    • 438 064000
    • 438 106000
    • CPC
    • H01L21/00
    • H01L2224/42
    • H01L2224/43
    • H01L2021/00
    • H01L2021/02
    • H01L2021/04
    • H01L21/4814
    • H01L21/4846
    • H01L21/4871
    • H01L21/67144
    • H01L23/02
    • H01L23/13
    • H01L23/14
    • H01L23/147
    • H01L2924/171
    • H01L2924/1711
    • H01L2924/1715
    • H01L2924/17151
    • H01L2924/181
    • H01L2924/1811
    • H01L2924/1815
    • H01L2924/19042
    • H01L2924/1905
    • H01L2224/08054
    • H01L23/58
    • H05B41/14
    • G02B6/4201
    • G02B6/4256
    • G02B6/4257
    • G02B6/4261
    • G02B6/4262
    • G02B6/428
    • G02B6/4281
    • H05K1/14
    • H05K1/141
    • H05K1/142
    • H05K1/144
    • H05K1/18
    • H05K1/181
    • H05K1/182
    • H05K1/026
  • International Classifications
    • 1303
    • Term of Grant
      15Years
Abstract
Description


FIG. 1 is a front, top and right side perspective view of a semiconductor module, showing our new design;



FIG. 2 is a rear, bottom, and left side perspective view thereof;



FIG. 3 is a front view thereof;



FIG. 4 is a rear view thereof;



FIG. 5 is a top plan view thereof;



FIG. 6 is a bottom plan view thereof;



FIG. 7 is a right side view thereof, the left side view being identical to FIG. 7;



FIG. 8 is a cross-sectional view taken along line 8-8 in FIG. 5; and,



FIG. 9 is a cross-sectional view taken along line 9-9 in FIG. 5.


The even broken lines illustrate portions of the semiconductor module and form no part of the claimed design. The dash-dotted lines denote the boundary of the claim and form no part of the claimed design. The member illustrated with fine, diagonal, parallel lines in FIG. 2 and FIG. 6 is transparent.


Claims
  • The ornamental design for a semiconductor module, as shown and described.
Priority Claims (2)
Number Date Country Kind
2018-008227 Apr 2018 JP national
2018-008229 Apr 2018 JP national
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Number Date Country
1145764 Jul 2002 JP
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1578687 Jun 2017 JP
Divisions (1)
Number Date Country
Parent 29666024 Oct 2018 US
Child 29757007 US