Claims
- 1. An opto-electronic semiconductor device comprising,
A waveguide layer disposed between a p-layer and an n-layer a grating disposed at an electrically passive wafer-bonded interface an optical field profile which substantially overlaps said grating and said waveguide layer and means for injecting holes from said p-layer and electrons from said n-layer into said waveguide layer
- 2. The opto-electronic semiconductor device of claim 1, wherein said waveguide layer further comprises laser active material:
- 3. The opto-electronic semiconductor device of claim 2, wherein said active material is a multi-quantum well region.
- 4. The opto-electronic semiconductor device of claim 1, where said waveguide layer is passive.
- 5. The opto-electronic semiconductor device of claim 4, further comprising an active portion adjacent said passive waveguide layer.
- 6. The opto-electronic semiconductor device of claim 5, further comprising a vertical wafer bonded interface between said passive waveguide layer and said active portion.
- 7. The opto-electronic semiconductor device of claim 5, further comprising a regrown cladding above said passive waveguide region, and a planar regrown interface between said cladding and said passive waveguide.
- 8. The opto-electronic semiconductor device of claim 5, further comprising a first electrical contact for injecting carriers into said passive region and a second electrical contact for injecting carriers into said active portion.
- 9. The opto-electronic semiconductor device of claim 1, wherein said opto-electronic semiconductor device is a distributed feedback laser.
- 10. The opto-electronic semiconductor device of claim 1, wherein said opto-electronic semiconductor device is a distributed Bragg Reflector laser.
- 11. The opto-electronic semiconductor device of claim 1, wherein said opto-electronic semiconductor device is a sampled grating Distributed Bragg Reflector laser.
- 12. The opto-electronic semiconductor device of claim 1, further comprising a grating-assisted co-directional coupler.
- 13. The opto-electronic semiconductor device of claim 1, wherein said opto-electronic semiconductor device is a tunable laser.
- 14. The opto-electronic semiconductor device of claim 1, further comprising a ridge-waveguide geometry.
- 15. The opto-electronic semiconductor device of claim 1, further comprising a semi-insulating buried heterostructure geometry.
- 16. A method for fabricating grating-based semiconductor opto-electronic devices, the method comprising,
Etching a grating into a host substrate Growing a first epitaxial region on a first source substrate to create a first source wafer with a first planar surface, said first epitaxial region comprising a first conducting layer of a first conductivity type and a second conducting layer of a second conductivity type opposite said first conductivity type, Bonding said first epitaxial region to said host substrate, Removing said first source substrate, and Depositing a first contact metal on said first conducting layer and a second contact metal on said second conducting layer.
- 17. The method of claim 16, further comprising,
Growing a second epitaxial region on a second source substrate creating a second source wafer with a second planar surface, Cleaving a section of said first source wafer creating a first source wafer section with a first edge substantially perpendicular to said first planar surface, Cleaving a section of said second source wafer creating a second source wafer section with a second edge substantially perpendicular to said second planar surface, Bonding said second epitaxial region to said host wafer and said second edge to said first edge.
- 18. The method of claim 17, wherein said first epitaxial region is an active region and said second epitaxial region is a passive region.
- 19. The method of claim 16, further comprising,
Etching a first ridge to define a region of current injection, and Etching a second ridge to access said second conducting layer.
- 20. The method of claim 19, further comprising regrowing a semi-insulating region around said first ridge.
BACKGROUND—CROSS-REFERENCES TO RELATED APPLICATIONS
[0001] This application is entitled to the benefit of Provisional Patent Application Serial No. 60/362300, filed Mar. 6, 2002. Additionally, the specification references my co-pending U.S Patent Application entitled “Multiple Epitaxial Region Wafers with Optical Connectivity,” filed by Vijaysekhar Jayaraman Jan. 15, 2003.
Provisional Applications (1)
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Number |
Date |
Country |
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60362300 |
Mar 2002 |
US |