SEMICONDUCTOR STORAGE DEVICE AND METHOD OF USING SEMICONDUCTOR STORAGE DEVICE

Abstract

A memory cell array includes a memory cell transistor storing data of a value in accordance with a set threshold voltage. A writing control unit controls writing of data in the memory cell transistor. A memory cell driving unit writes data in the memory cell transistor under the control of the writing control unit. The writing control unit is capable of setting at least three types of threshold voltages having different values for the memory cell transistor by controlling the memory cell driving unit, and uses only a plurality types of threshold voltages having values not adjacent to each other of the at least three types of threshold voltages in writing data in the memory cell transistor.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a block diagram illustrating the structure of an information processing device according to a first preferred embodiment of the present invention.

FIG. 2 is a block diagram illustrating the structure of a memory cell array according to the first preferred embodiment.

FIG. 3 illustrates distribution of threshold voltages of a memory cell transistor in a second memory region according to the first preferred embodiment.

FIG. 4 is a cross-sectional view illustrating the structure of a memory cell transistor according to a second preferred embodiment of the present invention.

FIG. 5 depicts a method of writing data in a first memory region according to the second preferred embodiment.

FIG. 6 depicts a method of reading data from the first memory region according to the second preferred embodiment.

FIG. 7 depicts a modification to the method of writing data in the first memory region according to the second preferred embodiment.

FIG. 8 depicts a modification to the method of reading data from the first memory region according to the second preferred embodiment.

FIG. 9 is a block diagram illustrating the structure of a modification to the information processing device according to the first and second preferred embodiments.

Claims

1. A semiconductor storage device comprising: a first memory cell transistor storing first data of values in accordance with first plurality types of threshold voltages;a writing control unit controlling writing of said first data in said first memory cell transistor; anda memory cell driving unit writing said first data in said first memory cell transistor under control of said writing control unit, whereinsaid writing control unit is capable of setting at least three types of threshold voltages having different values for said first memory cell transistor by controlling said memory cell driving unit, and uses only threshold voltages having values not adjacent to each other of said at least three types of threshold voltages as said first plurality types of threshold voltages in writing said first data in said first memory cell transistor.

2. The semiconductor storage device according to claim 1, wherein said writing control unit uses only a minimum threshold voltage and a maximum threshold voltage of said at least three types of threshold voltages as said first plurality types of threshold voltages in writing said first data in said first memory cell transistor by controlling said memory cell driving unit.

3. The semiconductor storage device according to claim 1, further comprising a second memory cell transistor storing second data of values in accordance with second plurality types of threshold voltages, whereinsaid writing control unit further controls writing of said second data in said second memory cell transistor,said memory cell driving unit further writes said second data in said second memory cell transistor under control of said writing control unit, andsaid writing control unit uses all of said at least three types of threshold voltages as said second plurality types of threshold voltages in writing said second data in said second memory cell transistor by controlling said memory cell driving unit.

4. The semiconductor storage device according to claim 2, further comprising a second memory cell transistor storing second data of values in accordance with second plurality types of threshold voltages, whereinsaid writing control unit further controls writing of said second data in said second memory cell transistor,said memory cell driving unit further writes said second data in said second memory cell transistor under control of said writing control unit, andsaid writing control unit uses all of said at least three types of threshold voltages as said second plurality types of threshold voltages in writing said second data in said second memory cell transistor by controlling said memory cell driving unit.

5. A method of using a semiconductor storage device including a memory cell transistor, said memory cell transistor storing data of values in accordance with a plurality types of threshold voltages and being capable of being set with at least three types of threshold voltages having different values, said method comprising the steps of: (a) preparing said semiconductor storage device; and(b) writing said data in said memory cell transistor of said semiconductor storage device, whereinonly threshold voltages having values not adjacent to each other of said at least three types of threshold voltages are used as said plurality types of threshold voltages in said step (b).