The contents of the following Japanese patent application are incorporated herein by reference:
No. 2009-296104 filed on Dec. 25, 2009.
The contents of the following International patent application are incorporated herein by reference: No. PCT/JP2010/007467 filed on Dec. 24, 2010.
1. Technical Field
The present invention relates to a semiconductor wafer, a method for producing a semiconductor wafer, and a method for producing a photo-electric conversion device.
2. Related Art
Non-Patent Document 1 discloses a compound semiconductor photovoltaic cell. This document discloses an InGaP/GaAs/InGaAs (1 eV) cell as a triple-junction photovoltaic cell having an optimal band gap combination.
Non-Patent Document 1: Report of Achievements from July 2006 to June 2007, New Energy Technology Development, Photovoltaic System Future Technology Research Development, Research and Development of Ultrahigh Efficiency Multi-Junction Photovoltaic Cell, New Energy and Industrial Technology Development Organization, March 2008
In the field of multi-junction photovoltaic cells, it is aimed to improve the photo-electric conversion efficiency by optimizing the differences in hand gap between the materials forming the respective layers of the multi-junction photovoltaic cells. Higher photo-electric conversion efficiency requires the use of materials having a superior light absorption coefficient at the longer wavelengths, and such materials are preferably produced easily. Furthermore, the individual layers of the multi-junction photovoltaic cells are preferably made of good-quality crystals.
For a solution to the above-mentioned problems, according to the first aspect related to the present invention, provided is one exemplary semiconductor wafer includes a base wafer, a sacrificial layer that is lattice-matched or pseudo lattice-matched to the base wafer, a first crystal layer that is formed on the sacrificial layer and made of an epitaxial crystal of SixGe1-x (0≦x<1), and a second crystal layer that is formed on the first crystal layer and made of an epitaxial crystal of a group 3-5 compound semiconductor having a larger band gap than the first crystal layer. For example, the base wafer is made of single-crystal GaAs.
For example, the sacrificial layer is made of an epitaxial crystal of InmAlnGa1-m-nAs (0≦m<0.2, 0.8≦n≦1, 0.8<n+m≦1) or In0.5Al0.5P. The sacrificial layer is preferably made of AlnGa1-nAs (0.8≦n≦1) or In0.18Al0.52P.
The semiconductor wafer may further include an intermediate crystal layer that is formed between the first crystal layer and the second crystal layer and made of an epitaxial crystal of a group 3-5 compound semiconductor. For example, the intermediate crystal layer has a larger band gap than the first crystal layer and a smaller band gap than the second crystal layer. For example, the intermediate crystal layer is made of InyGa1-yAszP1-z (0≦y<1, 0<z≦1), and the second crystal layer is made of AlwIntGa1-w-tAsz′P1-z′(0≦w≦1, 0≦t≦1, 0≦w+t≦1, 0≦z≦1), for example.
The semiconductor wafer may include, on the sacrificial layer, a first back surface field layer, the first crystal layer, a first window layer, a first tunnel junction layer, a second back surface field layer, the intermediate crystal layer, a second window layer, a second tunnel junction layer, a third back surface field layer, the second crystal layer, and a third window layer arranged in the stated order, and the first back surface field layer, the second back surface field layer, the third back surface field layer, the first window layer, the second window layer and the third window layer may have a larger hand gap than any layer selected from among the first crystal layer, the intermediate crystal layer and the second crystal layer.
According to the second aspect related to the present invention, provided is one exemplary method for producing a semiconductor wafer. The production method includes forming, on a base wafer, a sacrificial layer that is lattice-matched or pseudo lattice-matched to the base wafer, epitaxially growing, on the sacrificial layer, a first crystal layer made of SixGe1-x (0≦x<1), epitaxially growing, on the first crystal layer, an intermediate crystal layer made of a group 3-5 compound semiconductor, and epitaxially growing, on the intermediate crystal layer, a second crystal layer made of a group 3-5 compound semiconductor that has a larger band gap than the first crystal layer.
For example, the base wafer is made of single-crystal GaAs. During the epitaxial growth of the sacrificial layer, an epitaxial crystal layer made of InmAlnGa1-m-nAs (0≦m<0.2, 0.8≦n<1, 0.8<n+m≦1) is epitaxially grown.
The intermediate crystal layer has a larger band gap than the first crystal layer and a smaller band gap than the second crystal layer. Furthermore, a tunnel junction layer is preferably formed between the first crystal layer and the intermediate crystal layer and another tunnel junction layer is formed between the intermediate crystal layer and the second crystal layer. The intermediate crystal layer is, for example, made of InyGa1-yAszP1-z (0≦y<1, 0<z≦1), and the second crystal layer is, for example, made of AlwIntGa1-w-tAsz′P1-z′ (0≦w≦1, 0≦t≦1, 0≦w+t≦1, 0≦z≦1).
The method for producing a semiconductor wafer may include forming, on the sacrificial layer, a first back surface field layer, forming, on the first back surface field layer, the first crystal layer, forming, on the first crystal layer, a first window layer, forming, on the first window layer, a first tunnel junction layer, forming, on the first tunnel junction layer, a second back surface field layer, forming, on the second back surface field layer, the intermediate crystal layer, forming, on the intermediate crystal layer, a second window layer, forming, on the second window layer, a second tunnel junction layer, forming, on the second tunnel junction layer, a third back surface field layer, forming, on the third back surface field layer, the second crystal layer, and forming, on the second crystal layer, a third window layer. Here, the first back surface field layer, the second back surface field layer, the third back surface field layer, the first window layer, the second window layer and the third window layer may have a larger band gap than any layer selected from among the first crystal layer, the intermediate crystal layer and the second crystal layer.
According to the method for producing a semiconductor wafer, the epitaxial growth of the sacrificial layer may he performed in a different atmosphere than the epitaxial growth of the first crystal layer, and the epitaxial growth of the first crystal layer may be performed in a different atmosphere than the epitaxial growth of the intermediate crystal layer. For example, the method for producing a semiconductor wafer further includes, between the epitaxial growth of the sacrificial layer and the epitaxial growth of the first crystal layer, and between the epitaxial growth of the first crystal layer and the epitaxial growth of the intermediate crystal layer, replacing the atmosphere in a reaction chamber to perform the respective epitaxial growths with one or more gases selected from hydrogen, nitrogen and argon, or reducing the pressure in the reaction chamber.
According to the method for producing a semiconductor wafer, the epitaxial growth of the first crystal layer may he performed in a different reaction chamber than the epitaxial growth of the intermediate crystal layer and the epitaxial growth of the second crystal layer.
According to the third aspect related to the present invention, provided is one exemplary method for producing a semiconductor wafer. The production method includes forming, on a base wafer, a sacrificial layer that is lattice-matched or pseudo lattice-matched to the base wafer, epitaxially growing, on the sacrificial layer, a second crystal layer made of a group 3-5 compound semiconductor that has a larger band gap than the sacrificial layer, epitaxially growing, on the second crystal layer, an intermediate crystal layer made of a group 3-5 compound semiconductor, and epitaxially growing, on the intermediate crystal layer, a first crystal layer made of SixGe1-x (0≦x<1).
According to the fourth aspect related to the present invention, provided is one exemplary method for producing a photo-electric conversion device. The production method includes providing the semiconductor wafer according to the first aspect, attaching a first support onto the second crystal layer, and removing the sacrificial layer to separate the first crystal layer from the base wafer. The production method may further include attaching a second support made of any material selected from among a metal, a plastic, and a ceramic onto a surface of the first crystal layer that is exposed by the separation from the base wafer, and removing the first support. The first support may be transparent, and the production method may further include attaching a second support that is made of any material selected from among a metal, a plastic, and a ceramic onto a surface of the first crystal layer that is exposed by the separation from the base wafer. The separated base wafer may be reused for producing the semiconductor wafer according to the first aspect.
According to the fifth aspect related to the present invention, provided is one exemplary method for producing a photo-electric conversion device. The production method includes providing the semiconductor wafer as set forth in claim 1, and forming a plurality of electrodes that are to be electrically coupled to the base wafer and the second crystal layer. Here, the base wafer is made of a semiconductor having a p-type or an n-type conductivity.
The following describes the present invention with reference to embodiments.
The first crystal layer 104 is configured to absorb light to generate electromotive force. The first crystal layer 104 is an epitaxial crystal layer of SixGe1-x (0≦x<1), preferably an epitaxial crystal layer of SixGe1-x (0<x<0.2). The first crystal layer 104 is preferably lattice-matched or pseudo lattice-matched to single-crystal gallium arsenide (GaAs). The first crystal layer 104 is preferably constituted by stacking a p-type SixGe1-x epitaxial crystal layer and an n-type SixGe1-x epitaxial crystal layer on one another. Here, the second crystal layer 106 and other epitaxial crystal layers disclosed herein are preferably lattice-matched or pseudo lattice-matched to single-crystal gallium arsenide.
The second crystal layer 106 is configured to absorb light to generate electromotive force. The second crystal layer 106 is an epitaxial crystal layer made of a group 3-5 compound semiconductor having a larger band gap than the first crystal layer 104. The second crystal layer 106 is, for example, made of AlwIntGa1-w-tAsz′P1-z′ (0≦w≦1, 0≦t≦1, 0≦w+t≦1, 0≦z′≦1). The second crystal layer 106 is preferably made of In0.5Ga0.5P, more preferably made of In0.48Ga0.52P. The second crystal layer 106 is preferably constituted by stacking a p-type AlwIntGa1-w-tAsz′P1-z′ epitaxial crystal layer and an n-type AswIntGa1-w-tAsz′P1-z′ epitaxial crystal layer on one another.
In the photo-electric conversion device 100, the bottom first crystal layer 104 is an epitaxial crystal layer of SixGe1-x (0≦x<1) and thus has a smaller hand gap than the top second crystal layer 106. Thus, the bottom first crystal layer 104 absorbs the light in the long wavelength region that cannot be absorbed by the second crystal layer 106. In this manner, the conversion efficiency of the photo-electric conversion device 100 can be improved. Since SixGe1-x (0≦x<1) can be lattice-matched or pseudo lattice-matched to a group 3-5 compound semiconductor, the crystallinity of the second crystal layer 106, which is made of a group 3-5 compound semiconductor, is improved. Accordingly, the conversion efficiency of the photo-electric conversion device 100 is improved.
The first crystal layer 104 and the second crystal layer 106 are supported by the support 102. The support 102 is made of one or more materials selected from the group consisting of metals, plastics, and ceramics. The metals include aluminum, copper, stainless steel. The plastics include polyimide, liquid crystal polymer, cycloolefin polymer, polycarbonate, acrylic resin, and polyolefin. The ceramics include polycrystalline alumina sintered body, polycrystalline aluminum nitride sintered body, polycrystalline silicon carbide sintered body, and polycrystalline silica. The ceramics may not he crystalline but glass (amorphous) form.
Since the photo-electric conversion device 200 includes the intermediate crystal layer 108, the light that fails to be absorbed by the second crystal layer 106 is absorbed by the intermediate crystal layer 108. In addition, the light that fails to he absorbed by the intermediate crystal layer 108 is absorbed by the first crystal layer 104. In this manner, the photo-electric conversion device 200 achieves higher conversion efficiency than the photo-electric conversion device 100.
As each of the tunnel junction layers 110, a p-n junction layer is used that is a combination of an N layer heavily doped with donor impurities and a P layer heavily doped with acceptor impurities. The N layer is an InyGa1-yAszP1-z (0≦y<1, 0<z≦1) layer or an AlwIntGa1-w-tAsz′P1-z′ (0≦w≦1, 0≦t≦1, 0≦w+t≦1, 0≦z′≦1) layer having donor impurities at the concentration of 5×1018/cm3 or higher. The P layer is an InyGa1-yAszP1-z (0≦y<1, 0<z≦1) layer or an AlwIntGa1-w-tAsz′P1-z′ (0≦w≦1, 0≦t≦1, 0≦w+t≦1, 0≦z′≦1) layer having acceptor impurities at the concentration of 5×1018/cm3 or higher.
The donor impurities are, for example, Si, S, Se, Te. The acceptor impurities are, for example, C, Be, Mg, Zn. The N layer and the P layer both preferably have a thickness of 50 nm or less, more preferably 30 nm or less. The N layer and the P layer are both preferably lattice-matched or pseudo lattice-matched to the first crystal layer 104, the intermediate crystal layer 108 or the second crystal layer 106.
As an alternative to the above-described p-n junction layer, the tunnel junction layer 110 in contact with the first crystal layer 104 may be a p-n junction layer that is obtained by combining an n-type SixGe1-x (0≦x<1) layer heavily doped with donor impurities (5×1018/cm3 or higher) and a p-type SixGe1-x (0≦x<1) layer heavily doped with acceptor impurities (5×1018/cm3 or higher). In this case, the donor impurities may be P, As or Sb. The acceptor impurities may be B, Al or Ga.
The n-type SixGe1-x layer and the p-type SixGe1-x layer both preferably have a thickness of 50 nm or less, more preferably 30 nm or less. The n-type layer and the p-type SixGe1-x layer are both preferably lattice-matched or pseudo lattice-matched to the first crystal layer 104 or the intermediate crystal layer 108.
The window layers 112 and the hack surface field layers 114 each have a larger band gap than any of the first crystal layer 104, the intermediate crystal layer 108 and the second crystal layer 106. Accordingly, the optical carriers generated in the first crystal layer 104, the intermediate crystal layer 108, and the second crystal layer 106 are prevented from transporting to outside the first crystal layer 104, the intermediate crystal layer 108, and the second crystal layer 106. Therefore, the window layers 112 and the back surface field layers 114 can efficiently extract the optical carriers.
The window layers 112 are each an InyGa1-yAszP1-z (0≦y<1, 0<z≦1) layer or an AlwIntGa1-w-tAsz′P1-z′ (0≦w≦1, 0≦t≦1, 0≦w+t≦1, 0≦z′≦1) layer. The window layer 112 in contact with the first crystal layer 104 can alternatively be a SixGe1-x (0≦x<1) layer.
The back surface field layers 114 are each an InyGa1-yAszP1-z (0≦y<1, 0<z≦1) layer or an AlwIntGa1-w-tAsz′P1-z′ (0≦w≦1, 0≦t≦1, 0≦w+t≦1, 0≦z′≦1) layer. The back surface field layer 114 in contact with the first crystal layer 104 can alternatively be a SixGe1-x (0≦x<1) layer.
The window layers 112 and the back surface field layers 114 both preferably have a thickness of 50 nm or less, more preferably 30 nm or less. The window layers 112 and the back surface field layers 114 are doped so as to have the same conductivity type as the first crystal layer 104, the intermediate crystal layer 108 or the second crystal layer 106 which is in contact with the window layers 112 and the back surface field layers 114. The window layers 112 and the back surface field layers 114 preferably have a doping concentration of 1×1018/cm3 or higher, more preferably 3×1018/cm3 or higher regardless of the conductivity type whether it is p or n.
The base wafer 120 is made of single-crystal gallium arsenide. The semiconductor wafer 500 includes a sacrificial layer 122 between the first crystal layer 104 and the base wafer 120. The sacrificial layer 122 is lattice-matched or pseudo lattice-matched to the base wafer 120. The sacrificial layer 122 is made of an InmAlnGa1-m-nAS (0≦m<1, 0<n≦1, 0<n+m≦1) epitaxial crystal. Alternatively, the sacrificial layer 122 may be made of InmAlnGa1-m-nAs (0≦m<0.2, 0.8≦n≦1, 0.8<n+m≦1). For example, the lattice constant of the sacrificial layer 122 is between the lattice constant of the base wafer 120 and the lattice constant of the first crystal layer 104.
The semiconductor wafer 500 is suitably used for producing the photo-electric conversion device 200. When the semiconductor wafer 500 is used to produce the photo-electric conversion device 200, the sacrificial layer 122 is removed from the semiconductor wafer 500. In this way, the photo-electric conversion device 200 does not include the base wafer 120 and the sacrificial layer 122.
The step of epitaxially growing the sacrificial layer 122 is preferably performed in a different atmosphere than the step of epitaxially growing the first crystal layer 104. The step of epitaxially growing the first crystal layer 104 is preferably performed in a different atmosphere than the step of epitaxially growing the intermediate crystal layer 108 and the step of epitaxially growing the second crystal layer 106.
For example, after the step of epitaxially growing the sacrificial layer 122 and before the step of epitaxially growing the first crystal layer 104, and after the step of epitaxially growing the first crystal layer 104 and before the step of epitaxially growing the sacrificial layer 122, the atmosphere present in the reaction chamber to epitaxially grow each layers therein is replaced with one or more gases selected from hydrogen, nitrogen and argon. Additionally or alternatively, the pressure in the reaction chamber may be reduced.
The step of epitaxially growing the first crystal layer 104 may be performed in a different reaction chamber from the step of epitaxially growing the intermediate crystal layer 108 and the step of epitaxially growing the second crystal layer 106. The gas replacement or pressure reduction in the reaction chamber and the use of different reaction chambers in the respective steps as described above clearly separates the deposition process of the SiGe-based epitaxial growth and the deposition process of the GaAs-based epitaxial growth from each other. In this manner, the impurities and the like can be prevented from mixing, thereby enabling crystalline films with good crystallinity to he formed.
By performing the above-described steps, the semiconductor wafer 500 can be formed. Between the step of epitaxially growing the sacrificial layer 122 and the step of epitaxially growing the first crystal layer 104, and between the step of epitaxially growing the first crystal layer 104 and the step of epitaxially growing the second crystal layer 106, the tunnel junction layers 110, the window layers 112 and the back surface field layers 114 are preferably formed.
Following this, a temporary support 130 is attached to the second crystal layer 106 of the semiconductor wafer 500. As shown in
The base wafer 120 is made of, for example, single-crystal gallium arsenide. The semiconductor wafer 600 has the sacrificial layer 122 between the second crystal layer 106 and the base wafer 120. The sacrificial layer 122 is lattice-matched or pseudo lattice-matched to the base wafer 120. The sacrificial layer 122 is, for example, made of InmAlnGa1-m-nAs (0≦m<1, 0<n≦1, 0<n+m≦1) epitaxial crystal. The sacrificial layer 122 may be made of InmAlnGa1-m-nAs (0≦m<0.2, 0.8≦n≦1, 0.8<n+m≦1). The semiconductor wafer 600 is suitably used to produce the photo-electric conversion device 200.
Here, the step of epitaxially growing the sacrificial layer 122, the step of epitaxially growing the second crystal layer 106, and the step of epitaxially growing the intermediate crystal layer 108 are preferably performed in a different atmosphere than the step of epitaxially growing the first crystal layer 104.
For example, after the step of epitaxially growing the intermediate crystal layer 108 and before the step of epitaxially growing the first crystal layer 104, the atmosphere in the reaction chamber to epitaxially grow each layers is replaced with one or more gases selected from hydrogen, nitrogen and argon. Additionally or alternatively, the pressure in the reaction chamber may be reduced.
The step of epitaxially growing the sacrificial layer 122 may be performed in a different reaction chamber than the step of epitaxially growing the first crystal layer 104. The gas replacement or pressure reduction and the use of different reaction chambers in each steps as described above clearly separates the deposition process of the SiGe-based epitaxial growth from the deposition process of the GaAs-based epitaxial growth. In this manner, the impurities and the like can be prevented from mixing, thereby enabling crystalline films with good crystallinity to be formed.
Here, it is preferable to form the tunnel junction layers 110, the window layers 112 and the back surface field layers 114. Since each epitaxial growth steps are performed in different reaction chambers as described above, the deposition process of the SiGe-based epitaxial growth is clearly separated from the deposition process of the GaAs-based epitaxial growth. In this manner, the impurities and the like can be prevented from mixing, thereby enabling crystalline films with good crystallinity to be formed.
Furthermore, the support 102 that is made of one or more materials selected from the group consisting of metals, plastics and ceramics is attached to the epitaxial crystal layers including the first crystal layer 104, the second crystal layer 106, and the intermediate crystal layer 108 of the semiconductor wafer 600. After this, the sacrificial layer 122 is removed to separate the epitaxial crystal layers from the base wafer 120. In this way, the photo-electric conversion device 200 can be produced. The ceramics may be glass form. Alternatively, after the sacrificial layer 122 may be removed to separate the epitaxial crystal layers from the base wafer 120, a different transparent support may be attached to the second crystal layer 106. In this way, a photo-electric conversion device can also be formed.
Alternatively, a plurality of electrodes can be formed so as to be electrically coupled to the base wafer 120 and the epitaxial crystal layers without removing the base wafer 120 from the semiconductor wafer. Assuming that the base wafer 120 is made of a p-type or n-type semiconductor that has the same conductivity type as the epitaxial crystal layers that are in contact with the base wafer 120, the base wafer 120 can be used as a common electrode to increase the area efficiency of the photo-electric conversion device. The semiconductor is preferably a low-resistance semiconductor, specifically, has a resistivity of 10−1 Ωcm or less.
When the support 102 made of one or more materials selected from the group consisting of metals, plastics and ceramics is attached to the base wafer 120 or the epitaxial crystal layers, an electrode that can be electrically coupled to the base wafer 120 or the epitaxial crystal layers may he formed in advance on the to-be-attached surface of the epitaxial crystal layers. When the support 102 is made of an electrically insulative material, an interconnection that can be electrically coupled to an electrode that can be electrically coupled to the base wafer 120 or the epitaxial crystal layers may be formed in advance on the to-he-attached surface of the support 102.
The operations, procedures, steps, and stages of each process performed by an apparatus, system, program, and method shown in the claims, embodiments, or diagrams can be performed in any order as long as the order is not indicated by “prior to,” “before,” or the like and as long as the output from a previous process is not used in a later process. Even if the process flow is described using phrases such as “first” or “next” in the claims, embodiments, or diagrams, it does not necessarily mean that the process must he performed in this order.
Number | Date | Country | Kind |
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2009-296104 | Dec 2009 | JP | national |
Number | Date | Country | |
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Parent | PCT/JP2010/007467 | Dec 2010 | US |
Child | 13531192 | US |