Sense amplifier

Abstract

The present invention provides a sense amplifier including a current sense circuit that outputs a detection voltage corresponding to an electric current intended for comparison, a current sense circuit that outputs a reference voltage corresponding to an electric current for reference, and a comparison circuit that compares the detection voltage and the reference voltage and outputs the result of comparison thereby. In the sense amplifier, the current sense circuit is operated in accordance with a chip control signal, and the current sense circuit is operated by a delay chip control signal obtained by delaying the chip control signal by a predetermined time by means of a delay circuit. Thus, since the current sense circuit outputs a predetermined reference voltage when the operation of the current sense circuit is started, the detection voltage rapidly converges on a predetermined level without performing such a feedback operation as to repeat its abrupt rise and fall.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

While the specification concludes with claims particularly pointing out and distinctly claiming the subject matter which is regarded as the invention, it is believed that the invention, the objects and features of the invention and further objects, features and advantages thereof will be better understood from the following description taken in connection with the accompanying drawings in which:

FIG. 1 is a configuration diagram of a sense amplifier showing a first embodiment of the present invention;

FIG. 2 is a circuit diagram of a sense amplifier having a standby function;

FIG. 3 is a signal waveform diagram of the sense amplifier shown in FIG. 2;

FIG. 4 is a signal waveform diagram of the sense amplifier of FIG. 1 at the start of its operation;

FIG. 5 is a configuration diagram of a sense amplifier showing a second embodiment of the present invention; and

FIG. 6 is a signal waveform diagram of the sense amplifier of FIG. 5 at the start of its operation.

Claims

1. A sense amplifier comprising: a first current sense circuit that is activated based on a delay signal and that detects an electric current targeted for comparison and outputs a detection voltage corresponding to the electric current;a second current sense circuit that is activated based on an operation enabling signal and that detects an electric current defined as the reference and outputs a reference voltage corresponding to the electric current;a comparison circuit that compares the detection voltage and the reference voltage and outputs a result of comparison by the comparison circuit; anda delay circuit that outputs the delay signal obtained by delaying the operation enabling signal.

2. The sense amplifier according to claim 1, wherein the first current sense circuit includes: a first transistor connected between a power supply potential and a first node from which the detection voltage is outputted, and brought to an on state when the delay signal is supplied,a second transistor connected between the first node and a second node supplied with the electric current targeted for comparison, and whose conducting state is controlled by the reference voltage, anda third transistor connected between the second node and a ground potential and whose conducting state is controlled by a potential applied to the first node, andwherein the second current sense circuit includes:a fourth transistor connected between the power supply potential and a third node from which the reference voltage is outputted, and brought to an on state when the operation enabling signal is supplied,a fifth transistor connected between the third node and a fourth node supplied with the electric current defined as the reference, and whose conducting state is controlled by a potential applied to the third node, anda sixth transistor connected between the fourth node and the ground potential and whose conducting state is controlled by the potential applied to the third node.

3. The sense amplifier according to 1, wherein the first current sense circuit includes: a first transistor connected between a power supply potential and a first node from which the detection voltage is outputted, and brought to an on state when an operation enabling signal is supplied,a second transistor connected between the first node and a second node supplied with the electric current targeted for comparison, anda third transistor connected between the second node and a ground potential and whose conducting state is controlled by a potential applied to the first node, andwherein the second current sense circuit includes:a fourth transistor connected between the power supply potential and a third node from which the reference voltage is outputted, and brought to an on state when the operation enabling signal is supplied,a fifth transistor connected between the third node and a fourth node supplied with the electric current defined as the reference, and whose conducting state is controlled by a potential applied to the third node, anda sixth transistor connected between the fourth node and the ground potential and whose conducting state is controlled by the potential applied to the third node,said sense amplifier including a switch circuit for selectively controlling a conducting state of the second transistor according to the state of the delay signal on the basis of the potential of the first node or the reference voltage.

4. The sense amplifier according to claim 1, wherein the electric current targeted for comparison is an electric current that flows through a memory cell, and the electric current defined as the reference is an electric current that flows through a dummy cell.

5. The sense amplifier according to claim 2, wherein the electric current targeted for comparison is an electric current that flows through a memory cell, and the electric current defined as the reference is an electric current that flows through a dummy cell.

6. The sense amplifier according to claim 3, wherein the electric current targeted for comparison is an electric current that flows through a memory cell, and the electric current defined as the reference is an electric current that flows through a dummy cell.