SENSING A PHASE-PATH CURRENT IN A MULTIPHASE POWER SUPPLY SUCH AS A COUPLED-INDUCTOR POWER SUPPLY

Information

  • Patent Application
  • 20090045785
  • Publication Number
    20090045785
  • Date Filed
    August 08, 2008
    16 years ago
  • Date Published
    February 19, 2009
    15 years ago
Abstract
An embodiment of a power supply includes a supply output node, phase paths, and sensor circuits. The supply output node is operable to carry a regulated output voltage, and each phase path has a respective phase-path non-output node, has a respective phase-path output node coupled to the supply output node, and is operable to carry a respective phase current. And each sensor circuit has a respective sensor node coupled to the phase-path non-output nodes and is operable to generate a respective sense signal that represents the phase current flowing through a respective one of the phase paths. For example, where the phase paths are magnetically coupled to one another, the sensor circuits take into account the portions of the phase currents induced by the magnetic couplings to generate sense signals that more accurately represent the phase currents as compared to conventional sensor circuits.
Description
SUMMARY

An embodiment of a power supply includes a supply output node, phase paths, and sensor circuits. The supply output node is operable to provide a regulated output voltage, and each phase path has a respective phase-path non-output node, has a respective phase-path output node coupled to the supply output node, and is operable to carry a respective phase-path current. And each sensor circuit has a respective sensor node coupled to the phase-path non-output nodes and is operable to generate a respective sense signal that represents the phase current flowing through a respective one of the phase paths.


For example, where the phase paths are magnetically coupled to one another (e.g., the phase paths include magnetically coupled windings), the sensor circuits are able to account for the portions of the phase currents induced by the magnetic couplings between phase paths, and this accounting allows the sensor circuits to generate sense signals that more accurately represent the phase currents as compared to conventional sensor circuits. The sense signals may be fed back to the power-supply controller, which regulates the output voltage at least partly in response to the fed-back sense signals.





BRIEF DESCRIPTION OF THE DRAWINGS


FIG. 1 is a schematic diagram of an embodiment of a coupled-inductor multiphase power supply that includes sense circuits for sensing the phase currents.



FIG. 2 is a schematic diagram of a portion of the power supply of FIG. 1 including the phase-path windings, and an embodiment of the sensor circuits of FIG. 1.



FIG. 3 is a schematic diagram of a two-phase version of the power-supply portion of FIG. 2.



FIGS. 4A and 4C are timing diagrams of sense signals that are generated by the sensor circuits of FIG. 3.



FIGS. 4B and 4D are timing diagrams of the phase currents flowing through the windings of FIG. 3.



FIG. 5 is a schematic diagram of a portion of a two phase version of the powers supply of FIG. 1 including the phase-path windings and another embodiment of the sensor circuits of FIG. 1.



FIG. 6 is a block diagram of an embodiment of a computer system having a power supply that includes sensor circuits that are the same as or similar to one or more of the embodiments discussed above in conjunction with FIGS. 2-3 and 5.





DETAILED DESCRIPTION


FIG. 1 is a schematic diagram of an embodiment of a coupled-inductor (CI) multiphase power supply 10, here a CI buck converter, which provides a regulated output voltage Vout at a supply output node 11, and which includes phase paths (alternatively “phases”) 121-12n and current sensors 141-14n for respectively sensing the currents i1-in through the phases. As discussed below in conjunction with FIGS. 2-5, the current sensors 141-14n may each be coupled to respective multiple phase paths 121-12n at nodes or locations other than the supply output node 11. For example, assume that some or all of the phases 121-12n are magnetically coupled to one another. Coupling a current sensor 14 not only to a first phase 12 for which the sensor measures the phase current, but also to one or more second phases 12 to which the first phase is magnetically coupled, may allow the sensor to sense the current through the first phase more accurately than some conventional current sensors can.


The current sensors 141-14n respectively generate sense signals IFB1-IFBn, which respectively represent the phase currents i1-in. For example, each of the signals IFB1-IFBn may be a respective voltage that has substantially the same signal phase as the corresponding phase current i and that has an amplitude that is substantially proportional to the amplitude of the corresponding phase current.


In addition to the current sensors 141-14n, the converter 10 includes a coupled-inductor assembly 16 having windings 181-18n, which are wound about a common core (not shown in FIG. 1) and which are magnetically coupled to one another via the core, a power-supply controller 20, high-side drive transistors 221-22n, low-side drive transistors 241-24n, a filter capacitor 26, and an optional filter inductor 28. A winding 18 and the high-side and low-side transistors 22 and 24 coupled to the winding at a phase intermediate node INT compose a respective phase 12. For example, the winding 181 and the transistors 221 and 241 compose the phase 121.


The controller 20 may be any type of controller suitable for use in a multiphase CI power supply, is supplied by voltages VDDcontroller and VSScontroller, and receives the regulated output voltage Vout, a reference voltage Vref, and the sense signals IFB1-IFBn, which are fed back to the controller from the current sensors 141-14n, respectively. The controller 20 may use Vref and the fed back Vout and IFB1-IFBn to conventionally regulate Vout to a desired value.


The high-side transistors 221-22n, which are each switched “on” and “off” by the controller 20, are power NMOS transistors that are respectively coupled between input voltages VIN1-VINn and the nodes INT1-INTn. Alternatively, the transistors 221-22n may be other than power NMOS transistors, and may be coupled to a common input voltage. Moreover, the transistors 221-22n may be integrated on the same die as the controller 20, may be integrated on a same die that is separate from the die on which the controller is integrated, or may be discrete components.


Similarly, the low-side transistors 241-24n, which are each switched on and off by the controller 20, are power NMOS transistors that are respectively coupled between low-side voltages VL1-VLn and the nodes INT1-INTn of the phase windings 181-18n. Alternatively, the transistors 241-24n may be other than power NMOS transistors, and may be coupled to a common low-side voltage such as ground. Moreover, the transistors 241-24n may be integrated on the same die as the controller 20, may be integrated on a same die that is separate from the die on which the controller is integrated, may be integrated on a same die as the high-side transistors 221-22n, may be integrated on respective dies with the corresponding high-side transistors 221-22n (e.g., transistors 221 and 241 on a first die, transistors 222 and 242 on a second die, and so on), or may be discrete components.


The filter capacitor 26 is coupled between the regulated output voltage Vout and a voltage VSScap, and works in concert with the windings 181-18n and an optional filter inductor 28 (if present) to maintain the amplitude of the steady-state ripple-voltage component of Vout within a desired range which may be on the order of hundreds of microvolts (μV) to tens of millivolts (mV). Although only one filter capacitor 26 is shown, the converter 10 may include multiple filter capacitors coupled in electrical parallel. Furthermore, VSScap may be equal to VSScontroller and to VL1-VLn; for example, all of these voltages may equal ground.


As further discussed below, the filter inductor 28 may be omitted if the leakage inductances Llk1-Llkn (discussed below) of the windings 181-18n are sufficient to perform the desired inductive filtering function. In some applications, the filter inductor 28 may be omitted to reduce the size and component count of the converter 10.


Each of the windings 181-18n of the coupled-inductor assembly 16 may be modeled as a self inductance L and a resistance DCR. For purposes of discussion, only the model components of the winding 181 are discussed, it being understood that the model components of the other windings 182-18n are similar, except for possibly their values.


The self inductance L1 of the winding 181 may be modeled as two zero-resistance inductances: a magnetic-coupling inductance LC1, and a leakage inductance Llk1. When a phase current i1 flows through the winding 181, the current generates a magnetic flux. The value of the coupling inductance LC1 is proportional to the amount of this flux that is coupled to other windings 182-18n, and the value of the leakage inductance Llk1 is proportional to the amount of the remaining flux, which is not coupled to the other windings 182-18n. In one embodiment, LC1=LC2= . . . =LCn, and Llk1=Llk2= . . . =Llkn, although inequality among the coupling inductances LC, the leakage inductances Llk, or both LC and Llk, is contemplated. Furthermore, in an embodiment, the respective magnetic-coupling coefficients between pairs of coupling inductances Lc are equal (i.e., a current through LC1 magnetically induces respective equal currents in LC2, . . . LCn), although unequal coupling coefficients are contemplated.


The resistance DCR1 is the resistance of the winding 181 when a constant voltage V1 is applied across the winding and causes a constant current I1 to flow through the winding. That is, DCR1=V1/I1.


The power supply 10 may provide the regulated voltage Vout to a load 30, such as a microprocessor.


Still referring to FIG. 1, alternate embodiments of the power supply 10 are contemplated. Some or all of the phases 121-12n may be magnetically uncoupled from one another. For example, phases 121 and 122 may be formed on a first core and thus may be magnetically coupled, and phases 123 and 124 may be formed on a second core separate from the first core, and thus may be magnetically coupled to one another but magnetically uncoupled form the phases 121 and 122. Or, a phase 12 may be magnetically uncoupled from all other phases 12. Furthermore, although described as a multiphase buck converter, the power supply 10 may be any other type of multiphase power supply.



FIG. 2 is a schematic diagram of a portion of the power supply 10 of FIG. 1 including the windings 181-18n and an embodiment of the current sensors 141-14n. For purposes of discussion, it is assumed that all of the windings 181 and 18n are magnetically coupled to one another, and that the filter inductor 28 is omitted from the supply 10. For brevity, only the sensor 141 is discussed, it being understood that the other sensors 14 are similar except for possibly the values of the components that compose the other sensors.


The sensor 141 includes a capacitor C1 across which the sense signal IFB1 (here a voltage signal) is generated, an optional scaling resistor RC1 coupled across C1, and resistors R11-Rn1, which are respectively coupled between the nodes INT1-INTn and C1.


The resistor R11 couples to C1 a signal (a current in this embodiment) that represents the portion of the phase current i1 that the switching transistors 221 and 241 (FIG. 1) cause to flow through the winding 181.


And the resistors R21-Rn1 each couple to C1 a respective signal (a current in this embodiment) that represents the respective portion of i1 that a respective phase current i2-in magnetically induces in the winding 181. That is, the resistor R21 couples to C1 a current that is proportional to the portion of i1 that the phase current i2 magnetically induces in the winding 181. Similarly, the resistor R31 couples to C1 a current that is proportional to the portion of i1 that the phase current i3 magnetically induces in the winding 181, and so on.


C1 generates from the sum of the signals from R11-Rn1 the sense voltage IFB1, which has the same phase as i1 and which has an amplitude that is proportional to the amplitude of i1.


Therefore, a power-supply controller, such as the controller 20 of FIG. 1, may obtain from IFB1 an accurate representation of the instantaneous phase and amplitude of the phase current i1.


In a similar manner, the capacitors C2-Cn respectively generate the sense voltages IFB2-IFBn, from which a power-supply controller, such as the controller 20 of FIG. 1, may obtain accurate representations of the instantaneous phases and amplitudes of the phase currents i2-in.



FIG. 3 is a schematic diagram of a two-phase (n=2) version of the power-supply portion of FIG. 2.


Referring to FIG. 3, an embodiment of a technique for calculating values for R11, R12, R21, R22, C1, and RC1 (if present) is presented. To simplify the presentation, it is assumed that R11=R22=R1, R21=R12=R2, LC1=LC2=LC, LLlk1=Llk2=Llk, DCR1=DCR2=DCR, and RC1=RC2=∞ (i.e., RC1 and RC2 are omitted) in equations (1)-(16) below. It is, however, understood that the disclosed embodiment may be extrapolated to a more general embodiment of FIGS. 2-3 for R11≠R22, R21≠R12, LC1≠LC2, Llk1≠Llk2, DCR1≠DCR2, RC1≠RC2≠∞, and n>2.


Still referring to FIG. 3, the following equations are derived from the general relationship between the currents through and the voltages across reverse-coupled inductors the windings 181 and 182 are reversed coupled when a positive current flowing through the winding 181 into the node 11 induces a positive current in the winding 182 also flowing into the node 11.






V
1
=s·(Llk+LCi1−s·LC·i2+DCR·i1   (1)






V
2
=s·(Llk+LCi2−s·LC·i1+DCR·i2 and   (2)










i
2

=



V
2

+

s
·
Lc
·

i
1





s
·

(


L
lk

+

L
C


)


+
DCR






(
3
)







where V1 and V2 are the voltages at nodes INT1 and INT2, respectively.


From equations (1)-(3), one may derive the following equation for i1:










i
1

=




V
1

·

[


s
·

(


L
lk

+

L
C


)


+
DCR

]


+

s
·

L
C

·

V
2






[


s


(


L
lk

+

L
C


)


+
DCR

]

2

-


[

s
·

L
C


]

2







(
4
)







Furthermore, where R11=R1 and R21=R2 are the resistors coupled to the capacitor C1, one may derive the following equation for the voltage IFB1 across C1:










I

FB





1


=





R
1


1
+

s
·

R
1

·

C
1







R
1


1
+

s
·

R
1

·

C
1




+

R
2



·

V
1


+




R
2


1
+

s
·

R
2

·

C
1







R
2


1
+

s
·

R
2

·
C



+

R
1



·

V
2







(
5
)







Because the voltage VDCR1 across DCR1 equals i1·DCR1, VDCR1 has the same phase as i1, and has an amplitude that is proportional (by a factor DCR1) to the amplitude of i1; as discussed above in conjunction with FIG. 1, these attributes are suitable for IFB1.


Unfortunately, DCR1 is a modeled component, and one does not have physical access to the voltage VDCR1 across it.


But, one can set IFB1=VDCR1=i1·DCR1 according to the following equation, which is derived from equations (4) and (5):













R
1

·

V
1


+


R
2

·

V
2





R
1

+

R
2

+

s
·

R
1

·

R
2

·

C
1




=





V
1

·

[


s
·

(


L
lk

+

L
C


)


+
DCT

]


+

s
·

L
C

·

V
2





[


s


(


L
lk

+

L
C


)


+

s
·

L
C


+
DCR

]

·

[


s
·

L
lk


+
DCR

]



·
DCR





(
6
)







From equation (6), one can derive the following two equations:












R
1

·

V
1




R
1

+

R
2

+

s
·

R
1

·

R
2

·

C
1




=




V
1

·

[


s
·

(


L
lk

+

L
C


)


+
DCR

]




[


s


(


L
lk

+

L
C


)


+

s
·

L
C


+
DCR

]

·

[


s
·

L
lk


+
DCR

]



·
DCR





(
7
)









R
2

·

V
2




R
1

+

R
2

+

s
·

R
1

·

R
2

·

C
1




=



s
·

L
C

·

V
2




[


s


(


L
lk

+

L
C


)


+

s
·

L
C


+
DCR

]

·

[


s
·

L
lk


+
DCR

]



·
DCR





(
8
)







Referring to FIG. 1, if one assumes that the controller 20 switches the transistors 22 and 24 at a relatively high frequency, e.g., 100 KHz or higher (this assumption applies in many applications of multiphase power supplies), then one may assume that s(Llk+LC) and sLlk are much greater than DCR. Applying these assumptions, equations (7) and (8) respectively reduce to the following equations:












R
1

·

(

1
+

s
·


L
lk

DCR



)




(


R
1

+

R
2


)

·

(

1
+

s
·



R
1

·

R
2




R
1

+

R
2



·
C


)



=



L
lk

+

L
C




L
lk

+

2


L
C








(
9
)









R
2

·

(

1
+

s
·


L
lk

DCR



)




(


R
1

+

R
2


)

·

(

1
+

s
·



R
1

·

R
2




R
1

+

R
2



·
C


)



=


L
C



L
lk

+

2


L
C








(
10
)







From equations (9) and (10), one may derive the following design equations for the sensor circuit 141 of FIG. 3:











R
1



R
1

+

R
2



=



L
lk

+

L
C




L
lk

+

2


L
C








(
11
)








R
2



R
1

+

R
2



=


L
C



L
lk

+

2


L
C








(
12
)








L
lk

DCR

=




R
1

·

R
2




R
1

+

R
2



·

C
1






(
13
)







Therefore, by selecting the components R11=R1, R21=R2, and C1 (LC1=LC, Llk1=Llk, and DCR1=DCR are assumed to be known quantities for purposes of this disclosure) of the sensor circuit 141 such that they satisfy the design equations (11)-(13), the results are that IFB1≈i1·DCR1, and therefore, that IFB1 has approximately the same phase as i1, and has an amplitude that is approximately proportional to (i.e., that has approximately the same amplitude profile as) the amplitude of i1. Furthermore, because at least in some applications the design equation (12) may be redundant, one may design the sensor circuit 141 by selection component values that satisfy only the equations (11) and (13).



FIGS. 4A-4D are respective timing diagrams of IFB1, i1, IFB2, and i2 of FIG. 3 for a two phase embodiment of the power-supply 10 of FIG. 1 for the following component values, which satisfy the design equations (11)-(13): Llk1=Llk2=200 nanohenries (nH), LC1=LC2=500 nH, DCR1=DCR2=2 milliohms (mΩ), C1=C2=0.01 microfonds (μF), R11=R22=17 kiloohms (KΩ), and R12=R21=24 KΩ. Although IFB1 and IFB2 are voltages, the timing diagrams of FIGS. 4A and 4C are in units of Amperes (current) because IFB1 and IFB2 respectively represent the phase currents i1 and i2. For purposes of plotting only, IFB1 and IFB2 have been normalized by setting DCR1=DCR2=1 such that IFB1 has the same amplitude profile and phase as i1, and IFB2 has the same amplitude profile and phase as i2. Of course the power-supply controller 20 (FIG. 1) may adjust the amplitude of the IFB1 and IFB2 within the controller by a scale factor other than unity.


Referring again to FIGS. 1-4D, alternate embodiments of the disclosed technique for designing the sensor circuits 141-14n are contemplated. For example, equations (1)-(13) may be extrapolated for the design of the power supply 10 having more than n=2 magnetically coupled phases 121 and 122 (i.e., for n>2). But the equations (1)-(13) may also be suitable for an embodiment of the power supply 10 having only pairs of magnetically coupled phases 12, e.g., phase 121 coupled to phase 122 only, phase 123 coupled to phase 124 only, and so on. Furthermore, one may modify the equations (1)-(13) to cover an embodiment of the power supply 10 where one or more components of the sensor circuit 14 and winding 18 of one phase 12 have different values than the corresponding one or more components of the sensor circuit 14 and winding 8 of another phase 12. Moreover, one may modify equations (9)-(13) so that they are not simplified based on the assumption that the controller 20 switches the phases 12 at a relatively high frequency. In addition, although the sensor circuits 14 are described as being useful to sense the currents through magnetically coupled phases 12, one may use the sensor circuits 14 or similar sensor circuits to sense the currents through magnetically uncoupled phases. Furthermore, the disclosed technique, or a modified version thereof, may be suitable for designing the sensor circuits of a multiphase power supply other than a buck converter. Moreover, although an embodiment of a technique for designing the sensor circuit 14, is disclosed the same or a similar embodiment may be used to design the sensor circuit 142. In addition, although the sensor circuits 141-14n are disclosed as each being coupled to the intermediate nodes INT1-INT2, the sensor circuits may be coupled to other non-output nodes of phases 121-12n. The output node of a phase 12 is the node where all of the phases are coupled together, for example the node 11 in FIG. 2 where the filter inductor 28 is omitted.


Referring again to FIG. 3, one may wish to include the optional resistor RC1 in the sensor circuit 141 to scale the voltage IFB1 such that K1·IFB1=i1·DCR1, and thus IFB1=(i1·DCR1)/K1, where K1≦1 (K1=1 when RC1 is omitted). When RC1 is present and n=n, then the design equations (11) and (13) may be respectively modified into the following equations, assuming that the values of LC, Llk, and DCR are the same for each winding 181-18n(because the design equation (12) may redundant as discussed above, the equation into which one may modify equation (12) when RC1 is present is omitted for brevity):











R
11



R
11

+

R
21

+

+

R

n





1




=



L
lk

+

L
C




L
lk

+

nL
C







(
14
)








L
lk

DCR

=




R
11

·

R
21

·

·

R

n





1


·

RC
1




R
11

+

R
21

+

+

R

n





1




·

C
1






(
15
)







And K1 is given by the following equation:










K
1

=



(


R
11

+

R
21

+

+

R

n





1



)

·

RC
1





(


R
11

+

R
21

+

+

R

n





1



)

·

RC
1


+


R
11

·

R
21

·

·

R

n





1









(
16
)







The modified design equations for the components of the sensor circuits 142-14n and the equations for the scale factors K2-Kn may be respectively similar to equations (14)-(16). Furthermore, equations (14)-(16) may be modified where LC, Llk, and DCR are not the same for each winding 181-18n.



FIG. 5 is schematic diagram of a portion of a two-phase (n=2) version of the power supply 10 of FIG. 1 including the windings 181 and 182 (which we magnetically coupled) and another embodiment of the sensor circuits 141 and 142. For purposes of discussion, it is assumed that the filter inductor 28 is omitted from the power supply 10. For brevity, only the sensor circuit 141 is discussed, it being understood that the other sensor circuit 142 is similar except for possibly the values of the components that compose the sensor circuit 142.


The sensor 141 includes a capacitor C1 across which the sense signal IFB1 (here a voltage signal) is generated, an optional scaling resistor RC1 across the capacitor C1, a resistor R1 coupled to the capacitor C1, and a resistor R11, which is coupled between the phase intermediate node INT1 and the resistor R1. The resistors R11 and R1 couple to C1 a signal (a current in this embodiment) that represents the portion of the phase current i1 that the switching transistors 221 and 241 (FIG. 1) cause to flow through the winding 181.


Similarly, the sensor circuit 142 includes a capacitor C2 across which the sense signal IFB2 (here a voltage signal) is generated, an optional scaling resistor RC2 across the capacitor C2, a resistor R2 coupled to the capacitor C2, and a resistor R22, which is coupled between the phase intermediate node INT2 and the resistor R2. The resistors R22 and R2 couple to C2 a signal (a current in this embodiment) that represents the portion of the phase current i2 that the switching transistors 222 and 242 (FIG. 1) cause to flow through the winding 182.


The sensor circuits 141 and 142 also “share” a resistor R12, which is coupled between the resistors R1 and R2 and also between the resistors R11 and R22. The resistors R22, R12, and R1 couple to C1 a signal (a current in this embodiment) that represents the portion of the phase current i1 that the phase current i2 magnetically induces in the winding 181. That is, the resistors R22, R12, and R1 couple to C1 a current that is proportional to the portion of i1 that i2 magnetically induces in the winding 181. Similarly, the resistors R11, R12, and R2 couple to C2 a signal (a current in this embodiment) that represents the portion of the phase current i2 that the phase current i1 magnetically induces in the winding 182.


One may extrapolate the sensor circuit 141 for use in the power supply 10 (FIG. 1) where n>2 by including in the sensor circuit a respective resistive network between the node INT1 and all the other nodes INT2-INTn, where each resistive network may be similar to the network of resistors R11, R12, and R22, except possibly for the values of these resistors. The resistor R1 would be coupled to the respective nodes of these resistive networks corresponding the node between R11 and R22 in FIG. 5. And the resistors corresponding to the resistor R2 in FIG. 5 would be respectively coupled to the nodes corresponding to the node between R12 and R22 in FIG. 5.


One may extrapolate the sensor circuit 142 for use in the power supply 10 (FIG. 1) where n>2 in a similar manner, and the sensor circuits 143-14n may each be similar to the sensor circuits 141 and 142, except possibly for the values of the resistors.


Still referring to FIG. 5, in an embodiment one may derive design equations for the sensor circuit 141 in a manner similar to that presented above in conjunction with FIG. 3. Assuming an embodiment of the sensor circuit 141 where Lc1=Lc2=Lc, Llk1=Llk2=Llk, DCR1=DCR2=DCR, R11=R22=RA, and R12=RB, the design equations for such an embodiment are as follows:











R
A



R
A

+

R
B



=


L
C



L
lk

+

2


L
C








(
17
)








L
lk

DCR

=


R
1

·
C





(
18
)







K
1

=


RC
1



R
1

+

RC
1







(
19
)







Referring again to FIGS. 1 and 5, alternate embodiments of the disclosed technique for designing the sensor circuits 141-14n of FIG. 5 are contemplated. For example, equations (17)-(19) may be modified for the design of the power supply 10 having more than n=2 magnetically coupled phases 121 and 122 (i.e., for n>2). But the equations (17)-(19) may also be suitable for an embodiment of the power supply 10 having only pairs of magnetically coupled phases 12, e.g., phase 121 coupled to phase 122 only, phase 123 coupled to phase 124 only, and so on. Furthermore, one may modify the equations (17)-(19) to cover an embodiment of the power supply 10 where one or more components of the sensor circuit 14 and winding 18 of one phase 12 have different values than the corresponding one or more components of the sensor circuit 14 and winding 18 of another phase 12. Moreover, one may modify equations (17)-(19) so that they are not simplified based on the assumption that the controller 20 switches the phases 12 at a relatively high frequency. In addition, although the sensor circuits 14 of FIG. 5 are described as being useful to sense the currents through magnetically coupled phases 12, one may use the sensor circuits 14 or similar sensor circuits to sense the currents through magnetically uncoupled phases. Furthermore, the disclosed technique, or a modified version thereof, may be suitable for designing the sensor circuits of a multiphase power supply other than a buck converter. Moreover, although an embodiment of a technique for designing the sensor circuit 14, is disclosed, the same or a similar embodiment may be used to design the sensor circuit 142. In addition, although the sensor circuits 141-142 are disclosed as each being coupled to the intermediate nodes INT1-INT2, the sensor circuits 141-142 (and 143-14n of present) may be coupled to other non-output nodes of the phases 121-122 (and 123-12n of present).



FIG. 6 is a block diagram of an embodiment of a system 40 (here a computer system), which may incorporate a multiphase power supply 42 (such as the multiphase power supply 10 of FIG. 1) that includes one or more phase-current sensor circuits that are the same as or that are similar to embodiments of one or more of the current sensor circuits 14 of FIGS. 2, 3, and 5.


The system 40 includes computer circuitry 44 for performing computer functions, such as executing software to perform desired calculations and tasks. The circuitry 44 typically includes a controller, processor, or one or more other integrated circuits (ICs) 46, and the power supply 42, which provides power to the IC(s) 46—these IC(s) compose(s) the load of the power supply. The power supply 42, or a portion thereof, may be disposed on the same IC die as one or more of the ICs 46, or may be disposed on a different IC die.


One or more input devices 48, such as a keyboard or a mouse, are coupled to the computer circuitry 44 and allow an operator (not shown) to manually input data thereto.


One or more output devices 100 are coupled to the computer circuitry 44 to provide to the operator data generated by the computer circuitry. Examples of such output devices 50 include a printer and a video display unit.


One or more data-storage devices 52 are coupled to the computer circuitry 44 to store data on or retrieve data from external storage media (not shown). Examples of the storage devices 52 and the corresponding storage media include drives that accept hard and floppy disks, tape cassettes, compact disk read-only memories (CD-ROMs), and digital-versatile disks (DVDs).


From the foregoing it will be appreciated that, although specific embodiments have been described herein for purposes of illustration, various modifications may be made without deviating from the spirit and scope of this disclosure. Furthermore, where an alternative is disclosed for a particular embodiment, this alternative may also apply to other embodiments even if not specifically stated.

Claims
  • 1. A power supply, comprising: a supply output node operable to carry a regulated output voltage;first phase paths each having a respective phase-path output node coupled to the supply output node, having a respective phase-path non-output node, and operable to carry a respective phase current; andsensor circuits each having a respective first sensor node coupled to the phase-path non-output nodes and each operable to generate a respective sense signal that represents the phase current flowing through a respective one of the first phase paths.
  • 2. The power supply of claim 1 wherein the first phase paths are magnetically coupled to one another.
  • 3. The power supply of claim 1 wherein: the first phase paths each comprise a respective inductor coupled between the phase-path non-output and output nodes; andwherein the inductor of each first phase path is magnetically coupled to the inductors of the other first phase paths.
  • 4. The power supply of claim 1 wherein each of the sensor circuits is operable to generate as the respective sense signal a respective voltage that represents an amplitude and a phase of the phase current flowing through a respective one of the first phase paths.
  • 5. The power supply of claim 1 wherein each of the sensor circuits: comprises a respective second sensor node coupled to the supply output node; andis operable to generate as the respective sense signal a respective voltage between the first and second sensor nodes.
  • 6. The power supply of claim 1 wherein each of the sensor circuits: comprises a respective second sensor node coupled to the supply output node; andcomprises a respective component coupled between the first and second sensor nodes.
  • 7. The power supply of claim 1 wherein each of the sensor circuits: comprises a respective second sensor node coupled to the supply output node; andcomprises a respective capacitor coupled between the first and second sensor nodes.
  • 8. The power supply of claim 1 wherein each of the sensor circuits: comprises a respective second sensor node coupled to the supply output node; andcomprises a respective capacitor and a respective resistor coupled in parallel between the first and second sensor nodes.
  • 9. The power supply of claim 1 wherein each of the sensor circuits comprises: a respective second sensor node coupled to the supply output node;a respective first resistor coupled to the first sensor node;a respective capacitor and a respective second resistor coupled in parallel between the first resistor and the second sensor node; andrespective third resistors each coupled between the first resistor and a phase-path non-output node of a respective one of the phase paths.a first resistor.
  • 10. The power supply of claim 1 wherein each of the sensor circuits further comprises components each coupled between the first sensor node and a phase-path non-output node of a respective one of the first phase paths.
  • 11. The power supply of claim 1 wherein each of the sensor circuits further comprises resistors each coupled between the first sensor node and a phase-path non-output node of a respective one of the first phase paths.
  • 12. The power supply of claim 1, further comprising resistors each coupled between respective pairs of the first sensor nodes of the first phase paths.
  • 13. The power supply of claim 1, further comprising a second phase path having a respective phase-path non-output node, a respective phase-path output node coupled to the supply output node, and operable to carry a respective phase current, the second phase path being magnetically uncoupled from the first phase paths.
  • 14. The power supply of claim 1, further comprising: phase-path drivers each coupled to a phase-path non-output node of a respective one of the first phase paths; anda controller coupled to the sensor circuits and the phase-path drivers and operable to regulate the output voltage by controlling the phase-path drivers in response to the sense signals.
  • 15. The power supply of claim 1, further comprising: phase-path drivers each coupled to a phase-path non-output node of a respective one of the first phase paths; anda controller coupled to the supply output node, the sensor circuits, and the phase-path drivers and operable to regulate the output voltage by controlling the phase-path drivers in response to the output voltage and the sense signals.
  • 16. The power supply of claim 1, further comprising: wherein each of the sensor circuits comprises a respective second sensor node; anda filter coupled between the second sensor nodes of the sensor circuits and the supply output node.
  • 17. The power supply of claim 1, further comprising: a reference node;wherein each of the sensor circuits comprises a respective second sensor node;a filter inductor coupled between the second sensor nodes of the sensor circuits and the supply output node; anda filter capacitor coupled between the reference node and the supply output node.
  • 18. The power supply of claim 1, further comprising: a reference node;wherein each of the sensor circuits comprises a respective second sensor node coupled to the supply output node; anda filter capacitor coupled between the reference node and the supply output node.
  • 19. A system, comprising: a power supply, including a supply output node operable to carry a regulated output voltage,phase paths each having a respective phase-path non-output node, a respective phase-path output node coupled to the supply output node, and each operable to carry a respective phase current,sensor circuits each having a respective first sensor node coupled to the phase-path non-output nodes and each operable to generate a respective sense signal that represents the phase current flowing through a respective one of the phase paths,phase-path drivers each coupled to a phase-path input node of a respective one of the phase paths, anda power-supply controller coupled to the sensor circuits and the phase-path drivers and operable to regulate the output voltage by controlling the phase-path drivers in response to the sense signals; anda load coupled to the supply output node of the power supply.
  • 20. The system of claim 19 wherein: the power-supply controller is disposed on a first integrated-circuit die; andthe load is disposed on a second integrated-circuit die.
  • 21. The system of claim 19 wherein: the power-supply controller is disposed on an integrated-circuit die; andthe load is disposed on the same integrated-circuit die.
  • 22. The system of claim 19 wherein the load comprises an integrated circuit.
  • 23. A method, comprising: driving first and second power-supply phase paths with respective first and second driving signals to generate an output voltage;generating from the first and second driving signals a first sense signal that represents a first phase-path current flowing through the first power-supply phase path; andregulating the output voltage in response to the first sense signal.
  • 24. The method of claim 23, further comprising magnetically coupling the first power-supply phase path to the second power-supply phase path.
  • 25. The method of claim 23 wherein generating the first sense signal comprises generating the first sense signal across a first impedance by coupling the first and second drive signals to the first impedance via respective second impedances.
  • 26. The method of claim 23 wherein generating the first sense signal comprises generating the first sense signal substantially equal to a first voltage across a capacitor by coupling the first and second drive signals to the capacitor via respective resistors.
  • 27. The method of claim 23 wherein generating the first sense signal comprises generating the first sense signal substantially equal to a first voltage across a parallel combination of a first resistor and a capacitor by coupling the first and second drive signals to the parallel combination via respective second resistors.
  • 28. The method of claim 23, further comprising: generating from the first and second driving signals a second sense signal that represents a second phase-path current flowing through the second power-supply phase path; andwherein regulating the output voltage comprises regulating the output voltage in response to the first and second sense signals.
  • 29. The method of claim 23, further comprising: driving a third power-supply phase path with a third driving signal to generate the output voltage;wherein generating the first sense signal comprises generating the first sense signal from the first, second, and third driving signals;generating from the first, second, and third driving signals second and third sense signals that respectively represent second and third phase-path currents flowing through the second and third power-supply phase paths; andregulating the output voltage in response to the first, second, and third sense signals.
CLAIM OF PRIORITY

This application claims priority to U.S. Provisional Application Ser. No. 60/964,792 filed on Aug. 14, 2007 and U.S. Provisional Application Ser. No. 61/072,287 filed on Mar. 27, 2008, which are incorporated by reference.

Provisional Applications (2)
Number Date Country
60964792 Aug 2007 US
61072287 Mar 2008 US