Claims
- 1. An amplifying circuit for amplifying an input signal, comprising:
- (a) an operational amplifier having a first input terminal to which the input signal is input, a second input terminal to which a constant voltage is applied, and an output terminal;
- (b) a series arrangement composes of a resistor and a transistor, with one terminal of the resistor being connected to the output terminal of the operational amplifier, the other terminal of the resistor being connected to an emitter of the transistor, and a collector of the transistor being connected to the first input terminal of the operational amplifier, and a constant voltage being added to a base of the transistor; and
- (c) a capacitor connected between the emitter and base of the transistor,
- whereby said operational amplifier operates to maintain a constant feed-back amount for a high-frequency component of the input signal and operates to increase a feed back amount for a low frequency component of the input signal, resulting in improved signal-to-noise ratio of the amplifying circuit.
- 2. An amplifying circuit according to claim 1, further comprising a parallel arrangement of a resistor and a capacitor connected in parallel to the series arrangement of the resistor and capacitor.
- 3. An amplifying circuit according to claim 1, wherein the transistor is a PNP type transistor.
- 4. An amplifying circuit according to claim 1, wherein the transistor is an NPN type transistor.
Priority Claims (1)
Number |
Date |
Country |
Kind |
03-004766 |
Jan 1991 |
JPX |
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Parent Case Info
This is a continuation application under 37 CFR 1.62 of prior application Ser. No. 820,973, filed Jan. 15, 1992 and now abandoned.
US Referenced Citations (3)
Foreign Referenced Citations (1)
Number |
Date |
Country |
57-170607 |
Oct 1982 |
JPX |
Non-Patent Literature Citations (1)
Entry |
FETs in RC Network tune active filter, Delagrange, p. 76 Electronics, Dec. 7th, 1970. |
Continuations (1)
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Number |
Date |
Country |
Parent |
820973 |
Jan 1992 |
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