Patent Application
20080169845
The invention relates generally to the field of CMOS image sensors, and in particular to such sensors having a differential difference amplifier for buffering, amplification and single-ended to differential signal conversion.
Referring to
Each sample and hold circuit 80 includes a pair of capacitors 90a and 90b each electrically connected to the pixel column bus 75 respectively via switches 100a and 100b. Each capacitor 90a and 90b is respectively, electrically connected to a buffer amplifier 110a and 100b for storing the charge from the capacitors 90a and 90b and for isolating the signal from the capacitors 90a and 90b from the local bus 120. The buffer amplifiers 110a and 110b are preferably selected for unity gain, but other gains may be desirable based on the pixel array size. The buffer amplifiers 110a and 110b are respectively, electrically connected to the local bus 120 through switches 115a and 115b and eventually to the global bus 130 via switches 140a and 140b that passes the signal to the differential correlated double sampling amplifier 150 (CDS). The CDS 150 typically includes an amplifier, a switched capacitor network and a clock generator circuit (all of which are not shown for simplicity). The sample and hold circuit 80 typically includes a bias transistor (M) 155 for providing current for the amplifier.
Although the prior art is satisfactory, the switched capacitor network inherently includes switching noise and KT/C noise associated with capacitors. The switching between the ON and OFF states also significantly slows down the speed.
The present invention is directed to overcoming one or more of the problems set forth above. Briefly summarized, according to one aspect of the present invention, the invention resides in a CMOS image sensor comprising (a) a photosensitive region for collecting charge in response to incident light; (b) a charge-to-voltage mechanism for receiving the charge from the photosensitive region and converting the charge to a voltage; (c) an amplifier for receiving and amplifying the voltage; (d) a sample and hold circuit comprising (i) a first capacitor one for receiving the voltage and a second capacitor for receiving a reset level; (e) a first bus for receiving the voltage from the first capacitor and a second bus for receiving the reset level from the second capacitor; (f) a differential difference amplifier for receiving the image voltage and the reset level and for determining a difference level between the image voltage and the reset level and for removing offset of the amplifier; and (g) first and second switches respectively connected to the first and second bus for providing an electrical path for removing charge from each bus.
The above and other objects of the present invention will become more apparent when taken in conjunction with the following description and drawings wherein identical reference numerals have been used, where possible, to designate identical elements that are common to the figures.
The present invention includes the advantages of high speed, low fixed pattern noise and low temporal noise.
a is a schematic symbol for a single-ended DDA; and
b is a schematic symbol for a differential-ended DDA having a closed loop configuration.
Before discussing the present invention in detail, it is instructive to note that the present invention is preferably used in, but not limited to, an active pixel sensor. Active pixel sensor refers to an active electrical element within the pixel, other than transistors functioning as switches. For example, the floating diffusion or the amplifier are active elements.
Referring to
Referring to
Each sample and hold circuit 200 includes a pair of capacitors 330a and 330b each electrically connected to the pixel column bus 320 respectively via a pair of switches 340a and 340b. The switch 340a is closed, and the capacitor 330a receives the reset signal level from the reset transistor 300 for resetting the charge level on the capacitor 330a to a known reference level. The switch 340a is opened. Then the reset transistor (RG) 300 is turned OFF and the transfer gate (TG) 280 is turned ON for passing the image signal to the floating diffusion (FD) 270 which is sensed by the amplifier (M3) 290. Switch 340b is closed for passing the image signal from the amplifier 290 to the capacitor 330b. Each capacitor 330a and 330b is electrically connected to the local bus 210 via switches 220a and 220b. When the particular sample and hold circuit 200 is addressed, the two switches 220a and 220b are closed for passing the signal to the DDA 250 (withy switches 240a and 240b closed) via the global bus 230 which includes two distinct lines for respectively passing the charge from the capacitors 330a and 330b. The DDA 250 will amplify the signal and convert the signal to a fully differential signal at the output of the DDA 250. The DDA 250 runs continuously so that it is low noise and high speed since it does not include a lot of switches as in the CDS 150 of the prior art.
The sample and hold circuit 200 includes a bias transistor 350 for providing current for the amplifier 290. A charge clearing circuit 360 is electrically connected to ground for clearing the charge from both the local 210 and global buses 230 before passing charge from the capacitors 330a and 330b so that any residual charge is removed.
Referring to
The invention has been described with reference to a preferred embodiment. However, it will be appreciated that variations and modifications can be effected by a person of ordinary skill in the art without departing from the scope of the invention.
