Patent Application
20080068084
Some of the purposes of the invention having been stated, others will appear as the description proceeds, when taken in connection with the accompanying drawing, in which the differential amplifier circuit of this invention is shown in
While the present invention will be described more fully hereinafter with reference to the accompanying drawings, in which a preferred embodiment of the present invention is shown, it is to be understood at the outset of the description which follows that persons of skill in the appropriate arts may modify the invention here described while still achieving the favorable results of the invention. Accordingly, the description which follows is to be understood as being a broad, teaching disclosure directed to persons of skill in the appropriate arts, and not as limiting upon the present invention.
Referring now to
The differential amplifier has a plurality of transistors, conductive traces coupling those transistors, and resistors. A differential pair of transistors, T0 and T1, serve as points for input of voltage signals into the amplifier, buffering an input differential voltage, input positive (VP) and input negative (VN). A bias Vmid is controllably applied through a voltage buffer which forms a biasing circuit.
The bias applied is controlled by a coupling circuit including a transistor T2 operatively connected to the differential pair and the biasing circuit. The coupling circuit recognizes a powering down event for the differential amplifier circuit and applies a biasing voltage from the biasing circuit to the differential amplifier circuit during the recognized powering down event, the biasing voltage protecting the differential amplifier circuit against degradation otherwise possible due to voltages imposed during the powering down event.
More particularly, and referring to element T0 in the FIGURE, the drain-source voltage (Vds=Von−Vsrc), drain-gate voltage (Vdg=Von−Vp) and drain-body voltage (Vdb=Von−Vsrc) can all become VTT−0 volts if the node Vsrc isn't set by a voltage buffer and goes to zero volts. This would be an issue when VTT is greater than the voltage allowed for the T0 element, which can occur in a high swing driver in recent CMOS technologies. The presence of the coupling circuit and biasing circuit of this invention protects against the degradation of the semiconductor elements which would occur where this voltage difference is imposed during a power down sequence.
In particular, the apparatus of this invention has a differential amplifier circuit as described and illustrated. Connected to the amplifier circuit are a biasing circuit and a coupling circuit. The coupling circuit recognizes a powering down event for the differential amplifier and applies a biasing voltage from the biasing circuit to the differential amplifier circuit during the recognized powering down event, the biasing voltage protecting the differential amplifier circuit against degradation otherwise possible due to voltages imposed during the powering down event. During a powering down event, the current flowing through the resistors R0 and R1 goes to zero. Thus, there is no voltage drop across the resistors and voltage Vop=Von=Vtt absent the intervention of this invention.
The biasing voltage is applied through a buffer, and may be derived in a number of differing ways. What is shown is exemplary only, as it is recognized and contemplated that the biasing voltage can be derived from a number of sources and through a number of pathways other than from Vtt and applied other than through a buffer circuit precisely as shown. The invention here is the intervention rather than the specifics of derivation of the biasing voltage.
Expressed as a method, the present invention contemplates employing a differential amplifier circuit in an environment where a minimum output amplitude must be met for compliance with a communication protocol and protecting the differential amplifier circuit from degradation otherwise possibly occurring by coupling a biasing circuit to the differential amplifier circuit through a coupling circuit which recognizes a powering down event for the differential amplifier circuit and applying a biasing voltage from the biasing circuit to the differential amplifier circuit during the recognized powering down event, the biasing voltage protecting the differential amplifier circuit against degradation otherwise possible due to voltages imposed during the powering down event.
In the drawings and specifications there has been set forth a preferred embodiment of the invention and, although specific terms are used, the description thus given uses terminology in a generic and descriptive sense only and not for purposes of limitation.
