1. Field of the Invention
The present invention relates to signal converting circuits, and more particularly to a signal converting circuit which can interconvert RS232 (also know as EIA232) signals with I2C signals.
2. General Background
I2C (Inter-Integrated-Circuit) is a low-bandwidth, short-distance, two-wire interface for communication amongst ICs and peripherals. I2C was defined by Philips Semiconductor in the early 1980's. The BUS physically consists of 2 active wires and a ground connection. The active wires, SDA and SCL, are both bidirectional. Where SDA is the serial data line and SCL is the serial clock line. But if the transfer distance is too long, the I2C signal may suffer distortion or possibly not be received by a receiver. The RS232 model allows long distance data transmission up to 1000 meters. To obtain the advantages of long distance transmission of signals, a converting circuit is required for converting the signal from the I2C interface to the RS232 interface at the sending end and converting the signal from the RS232 interface to the I2C interface at the receiving end.
What is needed is a signal converting circuit which can interconvert RS232 signals with I2C signals.
An exemplary signal converting circuit adapted for converting RS232 signals into I2C signals and vice versa, the signal converting circuit includes a voltage level converter circuit, a power circuit, a signal separation circuit, a signal modifying circuit, and a clamping circuit. The voltage level converter circuit has a first input end connected to an SDA line of an I2C interface, and an output end connected to a receiving pin of an RS232 interface. The power circuit has an input end connected to a request-to-send pin of the RS232 interface and a power supply respectively, and an output end connected to a second input end of the voltage level converter circuit. The signal separation circuit separates a signal into two separate signals, and an input end of the separation circuit is connected to a transmitted data pin of the RS232 interface. The signal modifying circuit has a first input end connected to a first output end of the signal separation circuit, a second input end connected to the output end of the power circuit, and a controlling end connected to the request-to-send pin of the RS232 interface. The clamping circuit has a first end connected to the second output end of the signal separation circuit, a second output end connected to the output end of the signal modifying circuit, a first output end connected to the SDA line of the I2C interface and the second output end connected to an SCL line of the I2C interface. The clamping circuit limits the signals sent from the signal separation circuit and the signal modifying circuit to the specific voltage of the SDA line and SCL line.
It is simple and economical to use the signal converting circuit to convert RS232 signals into I2C signals and vice versa.
Other advantages and novel features will become more apparent from the following detailed description when taken in conjunction with the accompanying drawings, in which:
Referring to
The signal converting circuit 1 includes a voltage level converter circuit 10, a power circuit 11, a signal separation circuit 12, a signal modifying circuit 13, and two clamping circuits 14, 15.
The first and fourth pins 31, 34 of the RS232 interface 3 are connected to two inputs of the power circuit 11 consecutively, and the fourth pin 34 is also connected to an input of the signal modifying circuit 13, and the second pin 32 is connected to an input of the signal separation circuit 12. Output of the power circuit 11 is separately connected to inputs of the signal modifying circuit 13 and the voltage level converter circuit 10. An output of the signal modifying circuit 13 is connected to an input of the clamping circuit 15. An output of the clamping circuit 15 is connected to an SCL line of the I2C interface 2. Outputs of the signal separation circuit 12 are connected to inputs of the signal modifying circuit 13 and the clamping circuit 14 consecutively. An output of the clamping circuit 14 is connected with an SDA line of the I2C interface 2. The SDA line of the I2C interface 2 is also connected to an input of the voltage level converter circuit 10. An output of the voltage level converter circuit 10 is connected to the third pin 33 of the RS232 interface 3. The SDA line can send and receive signals, while the SCL line receives signals only.
Referring to
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The signal separation circuit 12 includes a resistor R3 and a diode D3. An end of the resistor R3 is coupled to the second pin 32 of the RS232 interface 3, the other end of the resistor R3 is the output end of the signal separation circuit 12 and connected to the clamping circuit 14. An anode of the diode D3 is connected to the second pin 32 of the RS232 interface 3, and the other end is the output end of the signal separation circuit 12 and is connected to the signal modifying circuit 13. The signal modifying circuit 13 includes a resistor R4, a resistor R5, and a transistor Q2. An end of the resistor R4 is coupled to the fourth pin 34 of the RS232 interface 3, the other end of the resistor R4 is connected to a gate of the transistor Q2. A source of the transistor Q2 is grounded, a drain of the transistor Q2 is connected to an end of the resistor R5, and the other end of the resistor R5 is connected to the cathode of the diode D3 of the signal separation circuit 12. The clamping circuit 14 is a zener diode D1, an anode of the zener diode D1 is grounded, and a cathode of the zener diode D1 is connected to the SDA line and the resistor R3 of the signal separation circuit 12. The clamping circuit 15 is a zener diode D2, an anode of the zener diode D2 is grounded, and a cathode of the zener diode D2 is connected with the SCL line of the I2C interface 2 and the drain of the transistor Q2 of the signal modifying circuit 13.
When the I2C interface 2 transmits signals to the RS232 interface 3, the second pin 32 and the fourth pin 34 of the RS232 interface 3 do not work. The first pin 31 is connected to a voltage, the diode D5 is turned on, the voltage of the cathode of the diode D5 is at a high level. Signals from the SDA line of the I2C interface 2 are sent to the gate of the transistor Q1 via the resistor R1 which limits the current flow to the gate of the transistor Q1. When the signal sent from the I2C interface 2 is at a low level, the transistor Q1 is turned off, the voltage of the drain of the transistor Q1 is equal to the voltage of the cathode of the diode D5, that is at a high level, so the voltage of the third pin 33 of the RS232 interface is at a high level. When the signal sent from the I2C interface 2 is at a high level, the transistor Q1 is turned on, the voltage of the drain of the transistor Q1 is at a low level, so the voltage of the third pin 33 of the RS232 interface is at a low level. The capacitor C1 is for wave filtering.
When the RS232 interface 3 transmits signals to the I2C interface 2, the signals are transmitted to a node between the resistor R3 and the diode D3 then are separated and follow two paths: one is transmitted to the resistor R3, the other transmitted to the diode D3. A signal is sent to the cathode of the zener diode D1 of the clamping circuit 14 via the resistor R3 which limits the current flow to the zener diode D1. If the signal transmitted to the zener diode D1 is at a high voltage, the zener diode D1 clamps the high voltage to an SDA line's specific voltage, and the signal is then sent to the SDA line. If the signal transmitted to the zener diode D1 is at a low voltage, the low voltage signal is sent to the SDA line directly. In this way, the signal from the RS232 interface 3 is transmitted to the I2C interface 2.
When the signal sent to the diode D3 is high voltage, the diode D3 is turned on, the cathode of the diode D3 is at high level, at this time, if the signal sent from the fourth pin 34 is at a high level, the transistor Q2 is turned on, so the signal transmitted to the SCL line is at a low level. If the signal sent from the fourth pin 34 is at a low level, the transistor Q2 is turned off, the high voltage at the cathodes of the diodes D3 and D5 is sent to the cathode of the zener diode D2 via the resistor R5. The high voltage is higher than the avalanche voltage of the zener diode D2, the zener diode D2 clamps the high voltage to an SCL line's specific voltage, and the signal is then sent to the SDA line.
When the signal sent to the diode D3 is low voltage, the diode D3 is turned off, at this time, if the signal sent from the fourth pin 34 is at a high level, the transistor Q2 is turn on, so the signal transmitted to the SCL line is at a low level. If the signal sent from the fourth pin 34 is at a low level, the transistor Q2 is turned off, the high voltage at the cathode of the diode D5 is sent to the cathode of the zener diode D2 via the resistor R5. The high voltage is higher than the avalanche voltage of the zener diode D2, the zener diode D2 clamps the high voltage to an SCL line's specific voltage, and the signal is then sent to the SDA line.
It is believed that the present embodiment and its advantages will be understood from the foregoing description, and it will be apparent that various changes may be made thereto without departing from the spirit and scope of the invention or sacrificing all of its material advantages, the example hereinbefore described merely being a preferred or exemplary embodiment of the invention.
Number | Date | Country | Kind |
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2004 1 0077630 | Dec 2004 | CN | national |
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20060132215 A1 | Jun 2006 | US |