The present invention relates to a signal generation device and an elevator.
Optical encoders are generally known in each of which an A-phase signal and a B-phase signal, which are different in phase by 90 degrees in electrical angle, are output as analog signals being substantially sinusoidal waves. Additionally, magnetic encoders each using a magnetoresistive element and a magnetic recording medium are also known.
Conventionally, a technique of controlling an applied voltage of a magnetoresistive device by feedback control to suppress amplitude fluctuation of an A-phase signal and a B-phase signal output from a magnetic encoder, which are each a sinusoidal signal, based on a deviation between a maximum output voltage and a reference voltage of the sinusoidal signal is known. Conventionally, a technique to improve resolution of a magnetic encoder as follows: causing a magnetoresistive element to output a sinusoidal signal with less distortion by setting an interval between the magnetoresistive element and a magnetic recording medium to a predetermined value; converting the sinusoidal signal into a pulse waveform; and multiplying the pulse waveform using a multiplication circuit is known. The optical encoders are composed of dedicated optical system components requiring microfabrication technique, and thus are expensive in many cases. Although the resolution is determined by the number of times (the number of cycles) of appearance of a waveform of one electrical angle cycle in each of the A-phase signal and the B-phase signal in one mechanical angle cycle, the number of cycles of the A-phase signal and the B-phase signal in the optical encoder depends on the number of scale tracks provided in a scale disk, and thus the resolution is difficult to be changed without changing hardware.
Magnetic encoders of a type using a magnetoresistive element and a magnetic recording medium may deteriorate in angle detection accuracy when distortion occurs in a sinusoidal signal due to uneven magnetization of the magnetic recording medium, for example. Mechanical encoders of this type are difficult to change resolution without changing hardware because the number of cycles of the A-phase signal and the B-phase signal depends on the magnetic recording medium.
An aspect of an exemplary signal generation device of the present invention includes a processing device that calculates angle information indicating a mechanical angle of a rotary shaft, and generates a first signal in which a waveform of one electrical angle cycle appears N times (N is an integer of one or more) in one mechanical angle cycle, and a second signal different in phase by 90 degrees in electrical angle from the first signal, based on a calculation result of the angle information.
An aspect of an exemplary elevator of the present invention includes: a car suspended by a rope; a hoisting machine that raises the car by hoisting the rope; and the signal generation device according to the above aspect that calculates angle information indicating a mechanical angle of a rotary shaft of the hoisting machine and generates at least the first signal and the second signal based on a calculation result of the angle information.
The above and other elements, features, steps, characteristics and advantages of the present disclosure will become more apparent from the following detailed description of the preferred embodiments with reference to the attached drawings.
Hereinafter, an embodiment of the present invention will be described in detail with reference to the drawings.
The sensor unit 10 includes three magnetic sensors 11, 12, and 13, for example. Each of the magnetic sensors 11, 12, and 13 is a Hall sensor that detects magnetic flux intensity changing in accordance with a rotation angle of a rotary shaft, and outputs an analog signal indicating a detection result of the magnetic flux intensity as a magnetic flux detection signal. The rotary shaft in the present embodiment is a rotor shaft of a three-phase brushless DC motor, for example. The three-phase brushless DC motor is equipped with a control board that supplies a drive current to a three-phase coil. The magnetic sensors 11, 12, and 13 are each disposed on the control board while facing a rotor magnet in an axial direction of the rotor shaft. When viewed from the axial direction of the rotor shaft, the magnetic sensors 11, 12, and 13 are disposed at regular intervals along a rotation direction of the rotor shaft. The regular interval is an interval of 120 degrees, for example.
The magnetic sensor 11 outputs a magnetic flux detection signal Hu indicating a detection result of magnetic flux intensity in a U-phase to the processing device 20. The magnetic sensor 12 outputs a magnetic flux detection signal Hv indicating a detection result of magnetic flux intensity in a V-phase to the processing device 20. The magnetic sensor 13 outputs a magnetic flux detection signal Hw indicating a detection result of magnetic flux intensity in a W-phase to the processing device 20. The three magnetic flux detection signals Hu, Hv, and Hw are each different in phase by 120 degrees in electrical angle.
The processing device 20 calculates angle information indicating a mechanical angle of a rotary shaft, and generates a first signal VA in which a waveform of one electrical angle cycle appears N times (N is an integer of one or more) in one mechanical angle cycle, and a second signal VB different in phase by 90 degrees in electrical angle from the first signal, based on a calculation result of the angle information. In the following description, the first signal VA may be referred to as an “A-phase signal”, and the second signal VB may be referred to as a “B-phase signal”. In the present embodiment, the A-phase signal VA is a sine wave signal, and the B-phase signal VB is a cosine wave signal.
The processing device 20 further generates a third signal VC in which a waveform of one electrical angle cycle appears once in one mechanical angle cycle, and a fourth signal VD different in phase by 90 degrees in electrical angle from the third signal VC, based on the calculation result of the angle information. In the following description, the third signal VC may be referred to as a “C-phase signal”, and the fourth signal VD may be referred to as a “D-phase signal”. In the present embodiment, the C-phase signal VC is a sine wave signal, and the D-phase signal VD is a cosine wave signal.
The processing device 20 further generates a fifth signal VR indicating a reference position of one mechanical angle cycle based on the calculation result of the angle information. In the following description, the fifth signal VR may be referred to as an “R-phase signal”. The R-phase signal VR is a waveform that is bilaterally symmetrical within a range of ±α degrees about a mechanical angle of 0 degrees as a center and that has a vertex appearing at a mechanical angle of 0 degrees. Available examples of a waveform of the R-phase signal VR include a waveform represented by a sigmoid function, a rectangular wave, a triangular wave, a sine wave, and the like.
The processing device 20 outputs the A-phase signal VA, the B-phase signal VB, the C-phase signal VC, the D-phase signal VD, and the R-phase signal VR to the filter circuit 50.
The processing device 20 includes a first processing device 30 that calculates angle information and generates the A-phase signal VA and the B-phase signal VB based on a calculation result of the angle information, and a second processing device 40 that generates the C-phase signal VC, the D-phase signal VD, and the R-phase signal VR based on the calculation result of the angle information obtained from the first processing device 30. The first processing device 30 and the second processing device 40 communicate the calculation result of the angle information to each other. The first processing device 30 and the second processing device 40 are each a processor IC such as a micro processing unit (MPU), for example. In the following description, the first processing device 30 may be referred to as a “main MPU”, and the second processing device 40 may be referred to as a “sub MPU”.
The main MPU 30 calculates the angle information indicating the mechanical angle of the rotary shaft based on the magnetic flux detection signals Hu, Hv, and Hw output from the sensor unit 10, and generates the A-phase signal VA and the B-phase signal VB based on a calculation result of the angle information. The main MPU 30 transmits the calculation result of the angle information to the sub MPU 40. The main MPU 30 includes an A/D converter 31, a timer 32, a first calculation unit 33, a first storage unit 34, a first D/A converter 35, and a first communication I/F 36.
The magnetic flux detection signals Hu, Hv, and Hw output from the sensor unit 10 are input to the A/D converter 31 of the main MPU 30. The A/D converter 31 converts each of the magnetic flux detection signals Hu, Hv, and Hw into digital data by sampling at a predetermined sampling frequency, and outputs digital data on the magnetic flux detection signals Hu, Hv, and Hw to the first calculation unit 33.
The timer 32 outputs an interrupt signal INT to the first calculation unit 33 at a predetermined cycle. Specifically, the timer 32 increments a timer count value in synchronization with a clock signal (not illustrated), and outputs the interrupt signal INT and resets the timer count value when the timer count value reaches a timer set value TRES. In this manner, the cycle at which the interrupt signal INT is output from the timer 32 is determined by the timer set value TRES. The timer set value TRES is set in the timer 32 by the first calculation unit 33.
The first calculation unit 33 is a processor core that performs various kinds of processing according to a program stored in advance in the first storage unit 34. Although details will be described later, when receiving the interrupt signal INT from the timer 32, the first calculation unit 33 executes interrupt processing of calculating an angle estimation value θest as angle information based on the digital data on the magnetic flux detection signals Hu, Hv, and Hw received from the A/D converter 31. The first calculation unit 33 generates an A-phase digital signal DVA and a B-phase digital signal DVB based on the calculation result of the angle estimation value θest and outputs the A-phase digital signal DVA and the B-phase digital signal DVB to the first D/A converter 35 during execution of the interrupt processing. The first calculation unit 33 also transmits digital data indicating the calculation result of the angle estimation value θest to the sub MPU 40 via the first communication I/F 36 during the execution of the interrupt processing.
The first storage unit 34 includes a nonvolatile memory that stores in advance programs, setting data, and the like necessary for causing the first calculation unit 33 to perform various kinds of processing, and a volatile memory that is used as a temporary storage destination of data when the first calculation unit 33 performs the various kinds of processing. Examples of the nonvolatile memory include an electrically erasable programmable read-only memory (EEPROM) and a flash memory. Examples of the volatile memory include a random access memory (RAM).
The first D/A converter 35 is a two-channel D/A converter, for example. The first D/A converter 35 generates the A-phase signal VA by converting the A-phase digital signal DVA output from the first calculation unit 33 into an analog signal. The first D/A converter 35 generates the B-phase signal VB by converting the B-phase digital signal DVB output from the first calculation unit 33 into an analog signal. The first D/A converter 35 outputs the A-phase signal VA and the B-phase signal VB to the filter circuit 50.
The first communication I/F 36 is a serial communication interface that communicates with a second communication I/F 41 of the sub MPU 40 in conformity with a serial peripheral interface (SPI) communication standard, for example. The first communication I/F 36 transmits digital data output from the first calculation unit 33 to the second communication I/F 41 of the sub MPU 40. The first communication I/F 36 receives the digital data transmitted from the second communication I/F 41 of the sub MPU 40, and outputs the received digital data to the first calculation unit 33. The digital data transmitted from the first calculation unit 33 to the sub MPU 40 via the first communication I/F 36 includes digital data indicating the calculation result of the angle estimation value @est.
The sub MPU 40 generates the C-phase signal VC, the D-phase signal VD, and the R-phase signal VR based on the calculation result of the angle information transmitted from the main MPU 30, or the calculation result of the angle estimation value θest. The sub MPU 40 includes the second communication I/F 41, a second calculation unit 42, a second storage unit 43, and a second D/A converter 44.
The second communication I/F 41 is a serial communication interface that communicates with the first communication I/F 36 of the main MPU 30 in conformity with the SPI communication standard, for example. The second communication I/F 41 transmits digital data output from the second calculation unit 42 to the first communication I/F 36 of the main MPU 30. The second communication I/F 41 receives the digital data transmitted from the first communication I/F 36 of the main MPU 30, and outputs the received digital data to the second calculation unit 42.
The second calculation unit 42 is a processor core that performs various kinds of processing according to a program stored in advance in the second storage unit 43. When receiving the calculation result of the angle estimation value θest from the main MPU 30 via the second communication I/F 41, the second calculation unit 42 generates a C-phase digital signal DVC, a D-phase digital signal DVD, and an R-phase digital signal DVR based on the received calculation result of the angle estimation value θest, and outputs them to the second D/A converter 44.
The second storage unit 43 includes a nonvolatile memory that stores in advance programs, setting data, and the like necessary for causing the second calculation unit 42 to perform various kinds of processing, and a volatile memory that is used as a temporary storage destination of data when the second calculation unit 42 performs the various kinds of processing. Examples of the nonvolatile memory includes an EEPROM and a flash memory. Examples of the volatile memory include a RAM.
The second D/A converter 44 is a three-channel D/A converter, for example. The second D/A converter 44 generates the C-phase signal VC by converting the C-phase digital signal DVC output from the second calculation unit 42 into an analog signal. The second D/A converter 44 generates the D-phase signal VD by converting the D-phase digital signal DVD output from the second calculation unit 42 into an analog signal. The second D/A converter 44 generates the R-phase signal VR by converting the R-phase digital signal DVR output from the second calculation unit 42 into an analog signal. The second D/A converter 44 outputs the C-phase signal VC and the D-phase signal VD, and the R-phase signal VR to the filter circuit 50.
The filter circuit 50 includes a first low-pass filter 51, a second low-pass filter 52, a third low-pass filter 53, a fourth low-pass filter 54, and a fifth low-pass filter 55. The first low-pass filter 51, the second low-pass filter 52, the third low-pass filter 53, the fourth low-pass filter 54, and the fifth low-pass filter 55 are each a secondary RC low-pass filter, for example.
The first low-pass filter 51 is provided in a transmission path of the A-phase signal VA output from the main MPU 30 of the processing device 20. The first low-pass filter 51 passes frequency components equal to or lower than a predetermined cutoff frequency among frequency components included in the A-phase signal VA output from the main MPU 30 to the output circuit 60. The first low-pass filter 51 outputs a signal having a sine waveform smoother than that of the A-phase signal VA received by the first low-pass filter 51. Although the signal output from the first low-pass filter 51 is different from the A-phase signal VA received by the first low-pass filter 51 as described above, the signal output from the first low-pass filter 51 is also referred to as an “A-phase signal VA” in the present embodiment for convenience of description.
The second low-pass filter 52 is provided in a transmission path of the B-phase signal VB output from the main MPU 30 of the processing device 20. The second low-pass filter 52 passes frequency components equal to or lower than a predetermined cutoff frequency among frequency components included in the B-phase signal VB output from the main MPU 30 to the output circuit 60. The second low-pass filter 52 outputs a signal having a sine waveform smoother than that of the B-phase signal VB received by the second low-pass filter 52. Although the signal output from the second low-pass filter 52 is different from the B-phase signal VB received by the second low-pass filter 52 as described above, the signal output from the second low-pass filter 52 is also referred to as a “B-phase signal VB” in the present embodiment for convenience of description.
The third low-pass filter 53 is provided in a transmission path of the C-phase signal VC output from the sub MPU 40 of the processing device 20. The third low-pass filter 53 passes frequency components equal to or lower than a predetermined cutoff frequency among frequency components included in the C-phase signal VC output from the sub MPU 40 to the output circuit 60. The third low-pass filter 53 outputs a signal having a sine waveform smoother than that of the C-phase signal VC received by the third low-pass filter 53. Although the signal output from the third low-pass filter 53 is different from the C-phase signal VC received by the third low-pass filter 53 as described above, the signal output from the third low-pass filter 53 is also referred to as a “C-phase signal VC” in the present embodiment for convenience of description.
The fourth low-pass filter 54 is provided in a transmission path of the D-phase signal VD output from the sub MPU 40 of the processing device 20. The fourth low-pass filter 54 passes frequency components equal to or lower than a predetermined cutoff frequency among frequency components included in the D-phase signal VD received from the sub MPU 40 to the output circuit 60. The fourth low-pass filter 54 outputs a signal having a sine waveform smoother than that of the D-phase signal VD received by the fourth low-pass filter 54. Although the signal output from the fourth low-pass filter 54 is different from the D-phase signal VD received by the fourth low-pass filter 54 as described above, the signal output from the fourth low-pass filter 54 is also referred to as a “D-phase signal VD” in the present embodiment for convenience of description.
The fifth low-pass filter 55 is provided in a transmission path of the R-phase signal VR output from the sub MPU 40 of the processing device 20. The fifth low-pass filter 55 passes frequency components equal to or lower than a predetermined cutoff frequency among frequency components included in the R-phase signal VR output from the sub MPU 40 to the output circuit 60. The fifth low-pass filter 55 outputs a signal having a sine waveform smoother than that of the R-phase signal VR received by the fifth low-pass filter 55. Although the signal output from the fifth low-pass filter 55 is different from the R-phase signal VR received by the fifth low-pass filter 55 as described above, the signal output from the fifth low-pass filter 55 is also referred to as an “R-phase signal VR” in the present embodiment for convenience of description.
The output circuit 60 generates and outputs a differential signal of each of the A-phase signal VA, the B-phase signal VB, the C-phase signal VC, the D-phase signal VD, and the R-phase signal VR output from the filter circuit 50. The output circuit 60 includes a first differential output circuit 61, a second differential output circuit 62, a third differential output circuit 63, a fourth differential output circuit 64, and a fifth differential output circuit 65. The first differential output circuit 61 generates a differential signal of the A-phase signal VA received from the first low-pass filter 51. The differential signal output from the first differential output circuit 61 includes a positive side A-phase signal At in phase with the A-phase signal VA input from the first low-pass filter 51 to the first differential output circuit 61, and a negative side A-phase signal A− in opposite phase with the positive side A-phase signal At.
The second differential output circuit 62 generates a differential signal of the B-phase signal VB output from the second low-pass filter 52. The differential signal output from the second differential output circuit 62 includes a positive side B-phase signal B+ in phase with the B-phase signal VB input from the second low-pass filter 52 to the second differential output circuit 62, and a negative side B-phase signal B− in opposite phase with the positive side B-phase signal B+.
The third differential output circuit 63 generates a differential signal of the C-phase signal VC output from the third low-pass filter 53. The differential signal output from the third differential output circuit 63 includes a positive side C-phase signal C+ in phase with the C-phase signal VC input from the third low-pass filter 53 to the third differential output circuit 63, and a negative side C-phase signal C− in opposite phase with the positive side C-phase signal C+.
The fourth differential output circuit 64 generates a differential signal of the D-phase signal VD received from the fourth low-pass filter 54. The differential signal output from the fourth differential output circuit 64 includes a positive side D-phase signal D+ in phase with the D-phase signal VD input from the fourth low-pass filter 54 to the fourth differential output circuit 64, and a negative side D-phase signal D− in opposite phase with the positive side D-phase signal D+.
The fifth differential output circuit 65 generates a differential signal of the R-phase signal VR output from the fifth low-pass filter 55. The differential signal output from the fifth differential output circuit 65 includes a positive side R-phase signal R+ in phase with the R-phase signal VR input from the fifth low-pass filter 55 to the fifth differential output circuit 65, and a negative side R-phase signal R− in opposite phase with the positive side R-phase signal R+.
Hereinafter, operation of the signal generation device 1 configured as described above will be described in detail with reference to
When the signal generation device 1 is switched from a power-off state to a power-on state, each of the first calculation unit 33 of the main MPU 30 and the second calculation unit 42 of the sub MPU 40 performs predetermined initialization processing. For example, the first calculation unit 33 reads out the timer set value TRES of the timer 32 from the first storage unit 34 as one piece of the initialization processing, and sets the read-out timer set value TRES in the timer 32. The first calculation unit 33 also resets a value of an interrupt frequency count to be described later to “0” as one piece of the initialization processing.
As illustrated in
As illustrated in
When the rotary shaft rotates, the magnetic flux detection signals Hu, Hv, and Hw different in phase by 120 degrees from each other in electrical angle are output from the sensor unit 10. As illustrated in
As illustrated in
The interrupt processing illustrated in
The first calculation unit 33 executes an angle acquisition processing of acquiring a current value of the absolute angle θ of the rotary shaft as one processing of the long-period processing (step S2). Specifically, the first calculation unit 33 acquires a value of the global variable gwTheta as a current value Theta of the absolute angle θ in step S2. As illustrated in
Next, as one processing of the long-period processing, the first calculation unit 33 executes function calculation processing of calculating an absolute angle function expressing the absolute angle θ as a linear function of time based on the current value Theta of the absolute angle θ and a previous value Theta_prev of the absolute angle θ (steps S3 and S4). The previous value Theta_prev of the absolute angle θ is a value of the absolute angle θ calculated in a control cycle before a cycle immediately before the current control cycle.
Specifically, as one of the function calculation processing, the first calculation unit 33 executes intercept calculation processing of calculating an intercept of the absolute angle function by executing delay compensation on the current value Theta of the absolute angle θ (step S3). The current value Theta of the absolute angle θ includes a time delay component as described below. As described above, the current value Theta of the absolute angle θ is a value of the absolute angle θ calculated in the control cycle immediately before the current control cycle. Thus, the current value Theta of the absolute angle θ has a time delay corresponding to one control cycle. The current value Theta of the absolute angle θ has a time delay caused by a response delay of the magnetic sensors 11, 12, and 13. Additionally, when a low-pass filter is provided for the magnetic flux detection signals Hu, Hv, and Hw, the current value Theta of the absolute angle θ has a time delay caused by frequency characteristics of the low-pass filter.
In step S3, the first calculation unit 33 performs delay compensation on the current value Theta of the absolute angle θ having a time delay component as described above. In
In step S3, the first calculation unit 33 calculates, the delay-compensated absolute angle θnew based on Expression (2) above as an intercept of the absolute angle function. The first calculation unit 33 acquires the calculation result of the delay compensated absolute angle θnew as an intercept Theta_new_low. As the time delay Tdelay included in Expression (2) above, a calculation value obtained by executing a simulation in consideration of a factor of the time delay described above may be used, or an actual measurement value obtained by performing an experiment may be used.
Next, as one of the function calculation processing, the first calculation unit 33 executes slope calculation processing of calculating a slope of the absolute angle function by subtracting the previous value Theta_prev from the current value Theta of the absolute angle θ (step S4). Specifically, the first calculation unit 33 calculates a slope Theta_extr of the absolute angle function based on Expression (3) below in step S4.
When the first calculation unit 33 executes the function calculation processing including steps S3 and S4 described above, an absolute angle function θ(count) expressed by Expression (4) below is finally obtained.
The above processing from step S2 to step S4 is the long-period processing repeatedly executed in a cycle equal to the control cycle Tperiod. Subsequently, the short-period processing will be described.
As one of the short-period processing, the first calculation unit 33 executes an angle estimation value calculation processing of calculating an estimation value of the absolute angle θ as the angle estimation value θest based on the absolute angle function calculated by the function calculation processing (step S5). Specifically, the first calculation unit 33 acquires a value of θ(count) calculated by substituting a current value of the interrupt frequency count into Expression (4) above as the angle estimation value θest in step S5.
In
Upon calculating the angle estimation value θest corresponding to the value of the current interrupt frequency count based on the absolute angle function θ(count) obtained by the long-period processing as described above, the first calculation unit 33 calculates an instantaneous value Va of the A-phase signal VA based on Expression (5) below (step S6) and calculates an instantaneous value Vb of the B-phase signal VB based on Expression (6) below (step S7). In Expressions (5) and (6), K and N are each a constant. N is the number of appearances (the number of cycles) of a waveform of one electrical angle cycle in each of the A-phase signal VA and the B-phase signal VB in one mechanical angle cycle. As described above, the resolution is determined by the number of cycles N of each of the A-phase signal VA and the B-phase signal VB. For example, N is 2048.
The first calculation unit 33 outputs digital data indicating the calculation result of the instantaneous value Va of the A-phase signal VA to the first D/A converter 35 as the A-phase digital signal DVA, and outputs digital data indicating the calculation result of the instantaneous value Vb of the B-phase signal VB to the first D/A converter 35 as the B-phase digital signal DVB. The first calculation unit 33 may acquire the instantaneous value Va of the A-phase signal VA and the instantaneous value Vb of the B-phase signal VB corresponding to the angle estimation value θest by referring to table data stored in advance in the first storage unit 34.
Then, the first calculation unit 33 transmits digital data indicating the calculation result of the angle estimation value θest to the sub MPU 40 via the first communication I/F 36 (step S8). After executing processing in step S8, the first calculation unit 33 executes interrupt frequency update processing of updating the interrupt frequency count (step S9). Specifically, the first calculation unit 33 increments the value of the interrupt frequency count in step S9.
Next, the first calculation unit 33 determines whether the interrupt frequency count is equal to a predetermined threshold value Cth (step S10). The threshold value Cth is obtained by adding “1” to the maximum value “Cm” of the interrupt frequency count. When the determination is “Yes” in step S10, or when the interrupt frequency count is equal to the threshold value Cth (=Cm+1), the first calculation unit 33 resets the interrupt frequency count to the initial value “0” and ends the interrupt processing (step S11). In contrast, when the determination is “No” in step S10, or when the interrupt frequency count is not equal to the threshold value Cth, the first calculation unit 33 ends the interrupt processing without executing processing in step S11.
When the first calculation unit 33 repeatedly executes interrupt processing as described above in the occurrence cycle TINT of the interrupt signal INT, the A-phase signal VA that is an analog signal of a sine wave and the B-phase signal VB that is an analog signal of a cosine wave (or the B-phase signal VB different in phase by 90 degrees in electrical angle from the A-phase signal VA) are output from the first D/A converter 35 to the filter circuit 50. For example, when the number of cycles N of each of the A-phase signal VA and the B-phase signal VB is 2048, a waveform of one electrical angle cycle appears 2048 times in each of the A-phase signal VA and the B-phase signal VB output in one mechanical angle cycle, or in a period in which the angle estimation value θest changes from 0 degrees to 360 degrees.
When the first calculation unit 33 repeatedly executes interrupt processing as described above in the occurrence cycle TINT of the interrupt signal INT, digital data indicating the calculation result of the angle estimation value θest is transmitted from the main MPU 30 to the sub MPU 40 in substantially the same cycle as the occurrence cycle TINT of the interrupt signal INT.
When the determination is “Yes” in step S21, or when the calculation result of the angle estimation value θest is received from the main MPU 30, the second calculation unit 42 calculates the instantaneous value Vc of the C-phase signal VC based on Expression (7) below (step S22) and calculates the instantaneous value Vd of the D-phase signal VD based on Expression (8) below (step S23). In Expressions (7) and (8), K is a constant.
The second calculation unit 42 outputs digital data indicating the calculation result of the instantaneous value Vc of the C-phase signal VC to the second D/A converter 44 as the C-phase digital signal DVC, and outputs digital data indicating the calculation result of the instantaneous value Vd of the D-phase signal VD to the second D/A converter 44 as the D-phase digital signal DVD. The second calculation unit 42 may acquire the instantaneous value Vd of the C-phase signal VC and the instantaneous value Vd of the D-phase signal VD corresponding to the angle estimation value θest by referring to table data stored in advance in the second storage unit 43.
The second calculation unit 42 further calculates an instantaneous value Vr of the R-phase signal VR based on a predetermined function (step S24). As illustrated in
The second calculation unit 42 outputs digital data indicating the calculation result of the instantaneous value Vr of the R-phase signal VR to the second D/A converter 44 as the R-phase digital signal DVR. The second calculation unit 42 may acquire the instantaneous value Vr of the R-phase signal VR corresponding to the angle estimation value θest by referring to table data stored in advance in the second storage unit 43. After step S24 ends, the second calculation unit 24 returns to step S21 and waits until receiving a next calculation result of the angle estimation value θest from the main MPU 30.
When the second calculation unit 42 executes signal generation processing as described above every time the angle estimation value θest is received from the main MPU 30, the C-phase signal VC being an analog signal of a sine wave and the D-phase signal VD being an analog signal of a cosine wave (or the D-phase signal VD different in phase by 90 degrees in electrical angle from the C-phase signal VC) are output from the second D/A converter 44 to the filter circuit 50. A waveform of one electrical angle cycle appears once in each of the C-phase signal VC and the D-phase signal VD output in one mechanical angle cycle, or in the period in which the angle estimation value θest changes from 0 degrees to 360 degrees.
When the second calculation unit 42 executes signal generation processing as described above every time the angle estimation value θest is received from the main MPU 30, the R-phase signal VR being an analog signal indicating the reference position of one mechanical angle cycle, or a position where the angle estimation value θest becomes 0 degrees, is output from the second D/A converter 44 to the filter circuit 50.
As described above, the A-phase signal VA output from the main MPU 30 is shaped into a signal having a smooth sine waveform by the first low-pass filter 51 of the filter circuit 50, and is then input to the first differential output circuit 61 of the output circuit 60. The B-phase signal VB output from the main MPU 30 is shaped into a signal having a smooth cosine waveform by the second low-pass filter 52 of the filter circuit 50, and is then input to the second differential output circuit 62 of the output circuit 60.
The C-phase signal VC output from the sub MPU 40 is shaped into a signal having a smooth sine waveform by the third low-pass filter 53 of the filter circuit 50, and is then input to the third differential output circuit 63 of the output circuit 60. The D-phase signal VD output from the sub MPU 40 is shaped into a signal having a smooth cosine waveform by the fourth low-pass filter 54 of the filter circuit 50, and is then input to the fourth differential output circuit 64 of the output circuit 60. The R-phase signal VR output from the sub MPU 40 is shaped into a signal having a smooth waveform by the fifth low-pass filter 55 of the filter circuit 50, and is then input to the fifth differential output circuit 65 of the output circuit 60.
Then, the first differential output circuit 61 outputs the positive side A-phase signal At in phase with the A-phase signal VA input from the first low-pass filter 51 to the first differential output circuit 61, and the negative side A-phase signal A− in opposite phase with the positive side A-phase signal A+, as illustrated in
As illustrated in
As illustrated in
As described above, the signal generation device 1 of the present embodiment includes the processing device 20 that calculates the angle information indicating the mechanical angle of the rotary shaft, and generates the A-phase signal VA in which a waveform of one electrical angle cycle appears N times (N is an integer of one or more) in one mechanical angle cycle, and the B-phase signal VB different in phase by 90 degrees in electrical angle from the A-phase signal VA, based on a calculation result of the angle information.
The present embodiment enables the processing device 20 to be composed of an inexpensive general-purpose microcomputer, and thus enables providing the signal generation device 1 capable of generating at least the A-phase signal VA and the B-phase signal VB with a simple and low-cost configuration as compared with a conventional optical encoder. Although the number of cycles of the A-phase signal and the B-phase signal in the conventional optical encoder depends on the number of scale tracks provided in a scale disk, and thus resolution is difficult to be changed without changing hardware, the present embodiment enables the resolution to be changed without changing the hardware because the number of cycles N of the A-phase signal and the B-phase signal can be set by software. Additionally, the A-phase signal and the B-phase signal can be generated using a D/A converter generally mounted on a general-purpose microcomputer that can be used as the processing device 20, so that the A-phase signal and the B-phase signal with less distortion can be generated.
The signal generation device 1 of the present embodiment further includes the first low-pass filter 51 provided in the transmission path of the A-phase signal VA output from the processing device 20 and the second low-pass filter 52 provided in the transmission path of the B-phase signal VB output from the processing device 20.
This configuration enables obtaining the A-phase signal VA and the B-phase signal VB each having a smooth waveform from which a high frequency component caused by DA conversion using the processing device 20 is removed.
The signal generation device 1 of the present embodiment further includes the first differential output circuit 61 that generates a differential signal of the A-phase signal VA output from the first low-pass filter 51, and the second differential output circuit 62 that generates a differential signal of the B-phase signal VB output from the second low-pass filter 52.
As described above, outputting the A-phase signal VA and the B-phase signal VB as differential signals enables a counterpart device to acquire the A-phase signal VA and the B-phase signal VB in which in-phase noise is reduced.
The processing device 20 in the present embodiment further generates the C-phase signal VC in which a waveform of one electrical angle cycle appears once in one mechanical angle cycle, and the D-phase signal VD different in phase by 90 degrees in electrical angle from the C-phase signal VC, based on the calculation result of the angle information.
The C-phase signal VC and the D-phase signal VD can be used to detect an absolute position using the counterpart device. Although it is difficult to determine the absolute position in one mechanical angle cycle only with the A-phase signal VA and the B-phase signal VB, a waveform of one electrical angle cycle appears once in one mechanical angle cycle in the C-phase signal VC and the D-phase signal VD, and thus enabling determination of the absolute position in one mechanical angle cycle using the C-phase signal VC and the D-phase signal VD.
The signal generation device 1 of the present embodiment further includes the third low-pass filter 53 provided in the transmission path of the C-phase signal VC output from the processing device 20 and the fourth low-pass filter 54 provided in the transmission path of the D-phase signal VD output from the processing device 20.
This configuration enables obtaining the C-phase signal VC and the D-phase signal VD each having a smooth waveform from which a high frequency component caused by DA conversion using the processing device 20 is removed.
The signal generation device 1 of the present embodiment further includes the third differential output circuit 63 that generates a differential signal of the C-phase signal VC output from the third low-pass filter 53, and the fourth differential output circuit 64 that generates a differential signal of the D-phase signal VD output from the fourth low-pass filter 54.
As described above, outputting the C-phase signal VC and the D-phase signal VD as differential signals enables the counterpart device to acquire the C-phase signal VC and the D-phase signal VD in which in-phase noise is reduced.
The processing device 20 in the present embodiment further generates the R-phase signal VR indicating the reference position of one mechanical angle cycle based on the calculation result of the angle information.
This configuration enables providing the R-phase signal VR indicating the reference position of one mechanical angle cycle (e.g., a position of 0 degrees in the mechanical angle) to the counterpart device.
The processing device 20 in the present embodiment includes the first processing device 30 that calculates angle information and generates the A-phase signal VA and the B-phase signal VB based on a calculation result of the angle information, and the second processing device 40 that generates the C-phase signal VC, the D-phase signal VD, and the R-phase signal VR based on the calculation result of the angle information obtained from the first processing device 30.
This configuration enables an inexpensive general-purpose microcomputer having a two-channel D/A converter to be used as the first processing device 30, and an inexpensive general-purpose microcomputer having a three-channel D/A converter to be used as the second processing device 40.
The first processing device 30 and the second processing device 40 in the present embodiment communicate the calculation result of the angle information to each other.
As a result, when the first processing device 30 is provided with a function of calculating the angle information, for example, the first processing device 30 may transmit the calculation result of the angle information to the second processing device 40, and thus the second processing device 40 is not required to be provided with the function of calculating the angle information. That is, a calculation load of a processor core of the second processing device 40 is reduced, so that a less expensive general-purpose microcomputer with low specifications can be used as the second processing device 40.
The signal processing device 1 of the present embodiment further includes the fifth low-pass filter 55 provided in the transmission path of the R-phase signal VR output from the processing device 20.
This configuration enables obtaining the R-phase signal VR having a smooth waveform from which a high frequency component caused by DA conversion using the processing device 20 is removed.
The signal processing device 1 of the present embodiment further includes the fifth differential output circuit 65 that generates a differential signal of the R-phase signal VR output from the fifth low-pass filter 55.
As described above, outputting the R-phase signal VR as a differential signal enables the counterpart device to acquire the R-phase signal VR in which in-phase noise is reduced.
The signal processing device 1 of the present embodiment further includes the plurality of magnetic sensors 11, 12, and 13 each of which detects a change in magnetic flux due to rotation of the rotary shaft, and the processing device 20 calculates angle information based on signals output from the plurality of magnetic sensors 11, 12, and 13.
This configuration enables providing a magnetic encoder capable of generating at least the A-phase signal VA and the B-phase signal VB with a simple and low-cost configuration as compared with the conventional optical encoder.
Next, a second embodiment of the present invention will be described.
As illustrated in
In the second embodiment, a signal generation device 1A capable of reducing the synchronization deviation 40 of the R-phase signal VR with respect to the A-phase signal VA and the B-phase signal VB will be described.
As illustrated in
The processing device 20A includes a main MPU 30A and a sub MPU 40A. The main MPU 30A is identical to the main MPU 30 of the first embodiment in that angle information indicating a mechanical angle of a rotary shaft, or the angle estimation value θest is calculated based on magnetic flux detection signals Hu, Hv, and Hw output from the sensor unit 10, and the A-phase signal VA and the B-phase signal VB are generated based on a calculation result of the angle estimation value θest. In contrast, the main MPU 30A is different from the main MPU 30 of the first embodiment in generating the R-phase signal VR in addition to the A-phase signal VA and the B-phase signal VB.
The sub MPU 40A is identical to the sub MPU 40 of the first embodiment in generating the C-phase signal VC and the D-phase signal VD based on the calculation result of the angle estimation value θest transmitted from the main MPU 30A. In contrast, the sub MPU 40A is different from the sub MPU 40 of the first embodiment in not generating the R-phase signal VR.
The filter circuit 50A is identical to the filter circuit 50 of the first embodiment in including a first low-pass filter 51, a second low-pass filter 52, a third low-pass filter 53, and a fourth low-pass filter 54. In contrast, the filter circuit 50A is different from the filter circuit 50 of the first embodiment in that a fifth low-pass filter 55 is not provided.
The output circuit 60A is identical to the output circuit 60 of the first embodiment in including a first differential output circuit 61, a second differential output circuit 62, a third differential output circuit 63, and a fourth differential output circuit 64. In contrast, the output circuit 60A is different from the output circuit 60 of the first embodiment in including a fifth differential output circuit 65A that generates a differential signal of the R-phase signal VR output from the main MPU 30A instead of the fifth differential output circuit 65 of the first embodiment.
The main MPU 30A is identical to the main MPU 30 of the first embodiment in including an A/D converter 31, a timer 32, a first storage unit 34, a first D/A converter 35, and a first communication I/F 36. In contrast, the main MPU 30A is different from the main MPU 30 of the first embodiment in including a first calculation unit 33A instead of the first calculation unit 33 of the first embodiment. The main MPU 30A is different from the main MPU 30 of the first embodiment in further including a calculation circuit 37, a switch 38, and an output port 39.
The first calculation unit 33A has at least the same function as the first calculation unit 33 of the first embodiment. That is, when receiving an interrupt signal INT from the timer 32, the first calculation unit 33A executes interrupt processing of calculating the angle estimation value θest as angle information based on digital data on the magnetic flux detection signals Hu, Hv, and Hw received from the A/D converter 31. The first calculation unit 33A generates an A-phase digital signal DVA and a B-phase digital signal DVB based on the calculation result of the angle estimation value θest and outputs the A-phase digital signal DVA and the B-phase digital signal DVB to the first D/A converter 35 during execution of the interrupt processing. The first calculation unit 33A also transmits digital data indicating the calculation result of the angle estimation value θest to the sub MPU 40A via the first communication I/F 36 during the execution of the interrupt processing. The functions of the first calculation unit 33A as described above have been described in the first embodiment, so that description thereof in the second embodiment will be omitted.
Although details will be described later, the first calculation unit 33A has a function of controlling the switch 38 in addition to the above-described functions.
The calculation circuit 37 adds or multiplies the A-phase signal VA output from the first low-pass filter 51 and the B-phase signal VB output from the second low-pass filter 52. For example, the calculation circuit 37 is an analog addition circuit or an analog multiplication circuit. Configurations of the analog adder circuit and the analog multiplier circuit are generally well known. Thus, a detailed description of the configuration of the calculation circuit 37 is omitted.
The output port 39 is a port through which an output signal VR0 of the calculation circuit 37 is output as the R-phase signal VR. The output port 39 is electrically connected to an input terminal of the fifth differential output circuit 65A, and the fifth differential output circuit 65A receives the R-phase signal VR output through the output port 39.
The switch 38 electrically connects the calculation circuit 37 and the output port 39 when the angle estimation value θest indicates a mechanical angle in a range from a first mechanical angle θ1 to a second mechanical angle θ2. In other words, the first calculation unit 33A causes the switch 38 to be turned on when the angle estimation value θest indicates the mechanical angle in the range from the first mechanical angle θ1 to the second mechanical angle θ2. As a result, the calculation circuit 37 and the output port 39 are electrically connected, and the calculation circuit 37 outputs the output signal VR0 through the output port 39 as the R-phase signal VR.
As illustrated in
However, as understood from
As described above, the second embodiment enables providing the signal generation device 1A capable of reducing the synchronization deviation 40 of the R-phase signal VR with respect to the A-phase signal VA and the B-phase signal VB.
Hereinafter, the description will be continued while returning to
The second calculation unit 42A is identical to the second calculation unit 42 of the first embodiment in having a function of generating the C-phase digital signal DVC and the D-phase digital signal DVD based on the calculation result of the angle estimation value θest received from the main MPU 30A via the second communication I/F 41 and of outputting the C-phase digital signal DVC and the D-phase digital signal DVD to the second D/A converter 44A. In contrast, the second calculation unit 42A is different from the second calculation unit 42 of the first embodiment in not having a function of generating the instantaneous value Vr of the R-phase signal VR, or the R-phase digital signal DVR, based on a predetermined function such as a sigmoid function.
The second D/A converter 44A is different from the second D/A converter 44 of the first embodiment in being a two-channel D/A converter. The second D/A converter 44A generates the C-phase signal VC by converting the C-phase digital signal DVC output from the second calculation unit 42A into an analog signal. The second D/A converter 44A generates the D-phase signal VD by converting the D-phase digital signal DVD output from the second calculation unit 42A into an analog signal.
As described above, the second embodiment enables reduction in calculation load (calculation time, memory size, and the like) of the second calculation unit 42A, improvement in real-time property, and reduction in cost of the sub MPU 40A because the second calculation unit 42A of the sub MPU 40A is not required to calculate the instantaneous value Vr of the R-phase signal VR based on the predetermined function. Additionally, the second embodiment enables cost reduction of the sub MPU 40A as compared with the first embodiment in which a three-channel D/A converter is used as the second D/A converter 44 because a two-channel D/A converter can be used as the second D/A converter 44A of the sub MPU 40A.
The present invention is not limited to the above embodiments, and the configurations described herein can be appropriately combined within a range not conflicting with one another.
For example, the first embodiment exemplifies an aspect in which the processing device 20 includes the first processing device 30 that calculates angle information and generates the A-phase signal VA and the B-phase signal VB based on a calculation result of the angle information, and the second processing device 40 that generates the C-phase signal VC, the D-phase signal VD, and the R-phase signal VR based on the calculation result of the angle information obtained from the first processing device 30.
The present invention is not limited thereto, and when the C-phase signal VC and the D-phase signal VD are unnecessary, for example, the processing device may include a first processing device that calculates angle information and generates the A-phase signal VA and the B-phase signal VB based on the calculation result of the angle information, and a second processing device that generates the R-phase signal VR based on the calculation result of the angle information obtained from the first processing device. This configuration enables an inexpensive general-purpose microcomputer having a two-channel D/A converter to be used as the first processing device and the second processing device.
Alternatively, an inexpensive general-purpose microcomputer having a three-channel D/A converter may be used as the processing device to generate the A-phase signal VA, the B-phase signal VB, and the R-phase signal VR using the processing device alone. When an inexpensive general-purpose microcomputer having a five-channel D/A converter can be used as the processing device, all of the A-phase signal VA, the B-phase signal VB, the C-phase signal VC, the D-phase signal VD, and the R-phase signal VR may be generated by the processing device alone. When the R-phase signal VR is unnecessary, the processing device may include a first processing device that generates the A-phase signal VA and the B-phase signal VB, and a second processing device that generates the C-phase signal VC and the D-phase signal VD. When the C-phase signal VC, the D-phase signal VD, and the R-phase signal VR are unnecessary, an inexpensive general-purpose microcomputer having a two-channel D/A converter may be used as the processing device to generate the A-phase signal VA and the B-phase signal VB using the processing device alone.
Although the first and second embodiments each exemplify an aspect in which the three magnetic sensors 11, 12, and 13 are used, the magnetic sensors may be appropriately changed in type, number, placement, and the like in accordance with a type of the rotary shaft or contents of an angle calculation algorithm.
The application example of the present invention is not limited to the elevator 100, and the present invention can be widely applied to a device driven by a motor such as a robot, for example.
The present technique can have configurations below.
An aspect of the present invention provides a signal generation device capable of generating at least a first signal and a second signal with a simple and low-cost configuration as compared with a conventional optical encoder, and an elevator including the signal generation device. Thus, the present invention has industrial applicability.
Features of the above-described preferred embodiments and the modifications thereof may be combined appropriately as long as no conflict arises.
While preferred embodiments of the present disclosure have been described above, it is to be understood that variations and modifications will be apparent to those skilled in the art without departing from the scope and spirit of the present disclosure. The scope of the present disclosure, therefore, is to be determined solely by the following claims.
Number | Date | Country | Kind |
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2021-194064 | Nov 2021 | JP | national |
This is the U.S. national stage of application No. PCT/JP2022/044003, filed on Nov. 29, 2022, and priority under 35 U.S.C. § 119 (a) and 35 U.S.C. § 365 (b) is claimed from Japanese Patent Application No. 2021-194064, filed on Nov. 30, 2021.
Filing Document | Filing Date | Country | Kind |
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PCT/JP2022/044003 | 11/29/2022 | WO |