Claims
- 1. A signal line drive circuit, comprising:
a scanning section for outputting timing signals to respective signal line drive sections provided in accordance with a plurality of signal lines, the timing signals specifying timings of the signal line drive sections being operated in accordance with an input signal, wherein, the scanning section includes:
a plurality of shift registers of respective systems; and control means for controlling operation or non-operation of at least one of the shift registers of respective systems, in accordance with signal line resolution of the input signal.
- 2. The signal line drive circuit as defined in claim 1, wherein the signal line drive sections are sampling circuits for sampling the input signal at timings specified by the respective timing signals, and the signal line drive circuit is operated as a data signal line drive circuit.
- 3. The signal line drive circuit as defined in claim 1, further comprising an additional signal line drive section which drives at least one of signal lines driven by the signal line drive sections.
- 4. A display device, comprising:
a plurality of data signal lines; a plurality of scanning signal lines intersecting with the plurality of data signal lines; pixels corresponding to respective pairs of the plurality of data signal lines and the plurality of scanning signal lines; a scanning signal line drive circuit for driving the plurality of scanning signal lines; and a data signal line drive circuit for outputting output signals, which correspond to respective sampling results supplied from sampling circuits provided in accordance with the plurality of data signal lines, to the plurality of data signal lines,
wherein, the scanning signal drive circuit is provided with a scanning section for outputting timing signals to respective signal line drive sections provided in accordance with the plurality of scanning signal lines, the timing signals specifying timings of the signal line drive sections being operated in accordance with an input signal, and the scanning section includes a plurality of shift registers of respective systems and control means for controlling operation or non-operation of at least one of the shift registers of respective systems, in accordance with signal line resolution of the input signal.
- 5. The display device as defined in claim 4, wherein the pixels, the data signal line drive circuit, and the scanning signal line drive circuit are formed on a single substrate.
- 6. The display device as defined in claim 5, wherein active elements constituting the pixels, the data signal line drive circuit, and the scanning signal line drive circuit are polycrystalline silicon thin-film transistors.
- 7. The display device as defined in claim 6, wherein the active elements are formed on a glass substrate, by a process at a temperature not more than 600° C.
- 8. A display device, comprising:
a plurality of data signal lines; a plurality of scanning signal lines intersecting with the plurality of data signal lines; pixels corresponding to respective pairs of the plurality of data signal lines and the plurality of scanning signal lines; a scanning signal line drive circuit for driving the plurality of scanning signal lines; and a data signal line drive circuit for outputting output signals, which correspond to respective sampling results supplied from sampling circuits provided in accordance with the plurality of data signal lines, to the plurality of data signal lines,
wherein, the data signal drive circuit is provided with a scanning section for outputting timing signals to respective signal line drive sections provided in accordance with the plurality of data signal lines, the timing signals specifying timings of the signal line drive sections being operated in accordance with an input signal, and the scanning section includes a plurality of shift registers of respective systems and control means for controlling operation or non-operation of at least one of the shift registers of respective systems, in accordance with signal line resolution of the input signal.
- 9. The display device as defined in claim 8, wherein the pixels, the data signal line drive circuit, and the scanning signal line drive circuit are formed on a single substrate.
- 10. The display device as defined in claim 9, wherein active elements constituting the pixels, the data signal line drive circuit, and the scanning signal line drive circuit are polycrystalline silicon thin-film transistors.
- 11. The display device as defined in claim 10, wherein the active elements are formed on a glass substrate, by a process at a temperature not more than 600° C.
- 12. The display device as defined in claim 8, further comprising an additional signal line drive section which drives at least one of signal lines driven by the signal line drive sections.
- 13. A signal line drive circuit, comprising:
a scanning section for outputting timing signals to respective signal line drive sections provided in accordance with a plurality of signal lines, the timing signals specifying timings of the signal line drive sections being operated in accordance with an input signal, wherein, the scanning section includes:
first and second shift registers each belonging to a different system; and control means which causes the first and second shift registers to be operated in case of high-resolution mode, and causes the first shift register to be stopped in case of low-resolution mode in which mode an input signal whose signal line resolution is lower than that of an input signal in the case of high-resolution mode is supplied.
- 14. The signal line drive circuit as defined in claim 13, wherein the signal line drive sections are sampling circuits for sampling the input signal at timings specified by the timing signals, and the signal line drive circuit is operated as a data signal line drive circuit.
- 15. The signal line drive circuit as defined in claim 13, wherein:
the signal line drive sections are sampling circuits for sampling the input signal at timings specified by the timing signals; the scanning section includes switching means which switches signals paths, for achieving an arrangement such that, (i) in the case of high-resolution mode, shifted signals are transmitted from respective stages of the second shift register to the corresponding sampling circuits and from respective stages of the first shift register to the corresponding sampling circuits, and (ii) in the case of low-resolution mode, shifted signals are transmitted from respective stages of the second shift register to the corresponding sampling circuits and the sampling circuits corresponding to respective stages of the first shift register; and the signal line drive circuit is operated as a data signal line drive circuit.
- 16. The signal line drive circuit as defined in claim 13, in which the first and second shift registers are operated in sync with clock signals each transmitted via a different clock signal line,
the signal line drive circuit further comprising clock signal control means which stops supply of the clock signals to the first shift register in the case of low-resolution mode, and supplies the clock signal specifying different shift timings to the first and second shift registers, in the case of high-resolution mode.
- 17. The signal line drive circuit as defined in claim 13, further comprising an additional signal line drive section which drives at least one of signal lines driven by the signal line drive sections.
- 18. A display device, comprising:
a plurality of data signal lines; a plurality of scanning signal lines intersecting with the plurality of data signal lines; pixels corresponding to respective pairs of the plurality of data signal lines and the plurality of scanning signal lines; a scanning signal line drive circuit for driving the plurality of scanning signal lines; and a data signal line drive circuit for outputting output signals, which correspond to respective sampling results supplied from sampling circuits provided in accordance with the plurality of data signal lines, to the plurality of data signal lines,
wherein, the scanning signal drive circuit is provided with a scanning section for outputting timing signals to respective signal line drive sections provided in accordance with the plurality of scanning signal lines, the timing signals specifying timings of the signal line drive sections being operated in accordance with an input signal, and the scanning section includes:
first and second shift registers each belonging to a different system; and control means which causes the first and second shift registers to be operated in case of high-resolution mode, and causes the first shift register to be stopped in case of low-resolution mode in which mode an input signal whose signal line resolution is lower than that of an input signal in the case of high-resolution mode is supplied.
- 19. The display device as defined in claim 18, wherein the pixels, the data signal line drive circuit, and the scanning signal line drive circuit are formed on a single substrate.
- 20. The display device as defined on claim 19, wherein active elements constituting the pixels, the data signal line drive circuit, and the scanning signal line drive circuit are polycrystalline silicon thin-film transistors.
- 21. The display device as defined in claim 20, wherein the active elements are formed on a glass substrate, by a process at a temperature not more than 600° C.
- 22. A display device, comprising:
a plurality of data signal lines; a plurality of scanning signal lines intersecting with the plurality of data signal lines; pixels corresponding to respective pairs of the plurality of data signal lines and the plurality of scanning signal lines; a scanning signal line drive circuit for driving the plurality of scanning signal lines; and a data signal line drive circuit for outputting output signals, which correspond to respective sampling results supplied from sampling circuits provided in accordance with the plurality of data signal lines, to the plurality of data signal lines,
wherein, the data signal drive circuit is provided with a scanning section for outputting timing signals to respective signal line drive sections provided in accordance with the plurality of data signal lines, the timing signals specifying timings of the signal line drive sections being operated in accordance with an input signal, and the scanning section includes:
first and second shift registers each belonging to a different system; and control means which causes the first and second shift registers to be operated in case of high-resolution mode, and causes the first shift register to be stopped in case of low-resolution mode in which mode an input signal whose signal line resolution is lower than that of an input signal in the case of high-resolution mode is supplied.
- 23. The display device as defined in claim 22, wherein the pixels, the data signal line drive circuit, and the scanning signal line drive circuit are formed on a single substrate.
- 24. The display device as defined in claim 23, wherein active elements constituting the pixels, the data signal line drive circuit, and the scanning signal line drive circuit are polycrystalline silicon thin-film transistors.
- 25. The display device as defined in claim 24, wherein the active elements are formed on a glass substrate, by a process at a temperature not more than 600° C.
- 26. The display device as defined in claim 22, further comprising an additional signal line drive section which drives at least one of signal lines driven by the signal line drive sections.
- 27. A signal line drive circuit, comprising:
a scanning section for outputting timing signals to respective signal line drive sections provided in accordance with a plurality of signal lines, the timing signals specifying timings of the signal line drive sections being operated in accordance with an input signal, wherein, the scanning section includes:
a shift register; and control means which (i) determines whether or not a shifted signal is shifted bypassing at least one stage of the shift register, in accordance with signal line resolution of the input signal, and (ii) stops operation of the stage which has been bypassed.
- 28. The signal line drive circuit as defined in claim 27, wherein, the control means causes a shifted signal to be shifted without bypassing any one of stages of the shift register, in case of high-resolution mode, and causes a shifted signal to be shifted bypassing either odd-number-th stages or even-number-th stages of the shift register, in case of low-resolution mode in which mode an input signal whose signal line resolution is lower than that of input signal in the high-resolution mode is supplied.
- 29. The signal line drive circuit as defined in claim 28, wherein:
the signal line drive sections are sampling circuits for sampling the input signal at timings specified by the timing signals; the scanning section includes switching means which switches signal paths, for achieving an arrangement such that, (i) in the case of high-resolution mode, shifted signals are transmitted from each stage of the shift register to the corresponding sampling circuits, and (ii) in the case of low-resolution mode, shifted signals are transmitted from either the even-number-th stages or the odd-number-th stages of the shift register to the sampling circuits corresponding to both the even-number-th stages and the odd-number-th stages; and the signal line drive circuit is operated as a data signal line drive circuit.
- 30. The signal line drive circuit as defined in claim 27, further comprising clock signal control means for controlling frequency of the clock signal in accordance with the signal line resolution.
- 31. The signal line drive circuit as defined in claim 27, further comprising an additional signal line drive section which drives at least one of signal lines driven by the signal line drive sections.
- 32. A display device, comprising:
a plurality of data signal lines; a plurality of scanning signal lines intersecting with the plurality of data signal lines; pixels corresponding to respective pairs of the plurality of data signal lines and the plurality of scanning signal lines; a scanning signal line drive circuit for driving the plurality of scanning signal lines; and a data signal line drive circuit for outputting output signals, which correspond to respective sampling results supplied from sampling circuits provided in accordance with the plurality of data signal lines, to the plurality of data signal lines,
wherein, the scanning signal drive circuit is provided with a scanning section for outputting timing signals to respective signal line drive sections provided in accordance with the plurality of scanning signal lines, the timing signals specifying timings of the signal line drive sections being operated in accordance with an input signal, and the scanning section includes:
a shift register; and control means which (i) determines whether or not a shifted signal is shifted bypassing at least one stage of the shift register, in accordance with signal line resolution of the input signal, and (ii) stops operation of the stage which has been bypassed.
- 33. The display device as defined in claim 32, wherein the pixels, the data signal line drive circuit, and the scanning signal line drive circuit are formed on a single substrate.
- 34. The display device as defined in claim 33, wherein active elements constituting the pixels, the data signal line drive circuit, and the scanning signal line drive circuit are polycrystalline silicon thin-film transistors.
- 35. The display device as defined in claim 34, wherein the active elements are formed on a glass substrate, by a process at a temperature not more than 600° C.
- 36. A display device, comprising:
a plurality of data signal lines; a plurality of scanning signal lines intersecting with the plurality of data signal lines; pixels corresponding to respective pairs of the plurality of data signal lines and the plurality of scanning signal lines; a scanning signal line drive circuit for driving the plurality of scanning signal lines; and a data signal line drive circuit for outputting output signals, which correspond to respective sampling results supplied from sampling circuits provided in accordance with the plurality of data signal lines, to the plurality of data signal lines,
wherein, the data signal drive circuit is provided with a scanning section for outputting timing signals to respective signal line drive sections provided in accordance with the plurality of data signal lines, the timing signals specifying timings of the signal line drive sections being operated in accordance with an input signal, and the scanning section includes:
a shift register; and control means which (i) determines whether or not a shifted signal is shifted bypassing at least one stage of the shift register, in accordance with signal line resolution of the input signal, and (ii) stops operation of the stage which has been bypassed.
- 37. The display device as defined in claim 36, wherein the pixels, the data signal line drive circuit, and the scanning signal line drive circuit are formed on a single substrate.
- 38. The display device as defined in claim 37, wherein active elements constituting the pixels, the data signal line drive circuit, and the scanning signal line drive circuit are polycrystalline silicon thin-film transistors.
- 39. The display device as defined in claim 38, wherein the active elements are formed on a glass substrate, by a process at a temperature not more than 600° C.
- 40. The display device as defined in claim 36, further comprising an additional signal line drive section which drives at least one of signal lines driven by the signal line drive sections.
- 41. A signal line drive circuit, comprising:
a first signal line drive circuit provided with a scanning section for outputting timing signals to respective signal line drive sections provided in accordance with a plurality of signal lines, the timing signals specifying timings of the signal line drive sections being operated in accordance with an input signal, wherein, the scanning section includes:
first and second shift registers each belonging to a different system; control means which causes the first and second shift registers to be operated in case of high-resolution mode, and causes the first shift register to be stopped in case of low-resolution mode in which mode an input signal whose signal line resolution is lower than that of an input signal in the case of high-resolution mode is supplied; and a second signal line drive circuit which shares at least one of the plurality of signal lines with the first signal line drive circuit.
- 42. The signal line drive circuit as defined in claim 41,
wherein the signal line drive sections are sampling circuits for sampling the input signal at timings specified by the timing signals, and the signal line drive circuit is operated as a data signal line drive circuit.
- 43. The signal line drive circuit as defined in claim 42,
wherein, the scanning section includes switching means which switches signals paths, for achieving an arrangement such that, (i) in the case of high-resolution mode, signals are transmitted from respective stages of the second shift register to the corresponding sampling circuits and from respective stages of the first shift register to the corresponding sampling circuits, and (ii) in the case of low-resolution mode, signals are transmitted from respective stages of the second shift register to the corresponding sampling circuits and the sampling circuits corresponding to respective stages of the first shift register.
- 44. The signal line drive circuit as defined in claim 41, in which the first and second shift registers are operated in sync with clock signals each transmitted via a different clock signal line,
the signal line drive circuit further comprising clock signal control means which stops supply of the clock signals to the first shift register in the case of low-resolution mode, and supplies the clock signal specifying different shift timings to the first and second shift registers, in the case of high-resolution mode.
- 45. An image display device, comprising:
a plurality of data signal lines; a plurality of scanning signal lines intersecting with the plurality of data signal lines; pixels provided in a matrix manner and corresponding to respective pairs of the plurality of data signal lines and the plurality of scanning signal lines; a scanning signal line drive circuit for sequentially driving the plurality of scanning signal lines; and a signal line drive circuit provided with a first signal line drive circuit and a second signal line drive circuit,
wherein, the first signal line drive circuit is a data signal line drive circuit which outputs signals, which correspond to respective sampling results supplied from sampling circuits provided in accordance with the plurality of data signal lines, to the plurality of data signal lines, the data signal drive circuit is provided with a scanning section for outputting timing signals to respective signal line drive sections provided in accordance with the plurality of data signal lines, the timing signals specifying timings of the signal line drive sections being operated in accordance with an input signal, and the scanning section includes:
first and second shift registers each belonging to a different system; and control means which causes the first and second shift registers to be operated in case of high-resolution mode, and causes the first shift register to be stopped in case of low-resolution mode in which mode an input signal whose signal line resolution is lower than that of an input signal in the case of high-resolution mode is supplied, the second signal line drive circuit sharing at least one of the plurality of data signal lines with the first signal line drive circuit.
- 46. The image display device as defined in claim 45, wherein the pixels, the data signal line drive circuit, and the scanning signal line drive circuit are formed on a single substrate.
- 47. The image display device as defined in claim 46, wherein active elements constituting the pixels, the data signal line drive circuit, and the scanning signal line drive circuit are polycrystalline silicon thin-film transistors.
- 48. The image display device as defined in claim 45, wherein the active elements are formed on a glass substrate, by a process at a temperature not more than 600° C.
Priority Claims (3)
Number |
Date |
Country |
Kind |
2001-366979 |
Nov 2001 |
JP |
|
2002-142519 |
May 2002 |
JP |
|
2002-262141 |
Sep 2002 |
JP |
|
Parent Case Info
[0001] This is a continuation in part application of a U.S. patent application Ser. No. 10/304,608 titled “SIGNAL LINE DRIVE CIRCUIT AND DISPLAY DEVICE USING THE SAME” filed on Nov. 26, 2002.
Continuation in Parts (1)
|
Number |
Date |
Country |
Parent |
10304608 |
Nov 2002 |
US |
Child |
10440077 |
May 2003 |
US |