This application is based upon and claims the benefit of priority from Japanese Patent Application No. 2008-163773, filed Jun. 23, 2008, the entire contents of which are incorporated herein by reference.
1. Field
One embodiment of the present invention relates to a signal processing device and a signal processing method that decodes encoded information. Further, there is provided an invention that is effective for use in, e.g., a decoding device that decodes encoded information, a decoding method, a decoding program, a recording medium thereof, and a reproducing apparatus including the decoding device.
2. Description of the Related Art
In recent years, an amount of digital information stored in a storage device is exponentially increased as various kinds of information including image information, audio information, programs, and others are digitized. With this increase, development of a storage device suitable for realization of high capacity and high density has been advanced.
It is expected that the signal-to-noise ratio of a reproduction signal is degraded when realization of high capacity and high density of a storage device advances. Therefore, to obtain the same signal reading grade as that in the conventional technology, signal processing technologies that can improve a quality of a reproduction signal even in a region having a low signal-to-noise ratio or correct an error are required.
As one of such signal processing technologies, an iterative decoding scheme utilizing an error correcting code, e.g., a turbo code or a low-density parity check (LDPC) code is attracting attention in recent years, and application of the iterative decoding scheme to a storage field are actively studied. According to the iterative decoding scheme, since an obtained reproduction signal can be repeatedly decoded, an error correcting capability close to a theoretical characteristic limit (a Shannon limit) can be obtained.
Furthermore, not only the error correcting code technology, e.g., the iterative decoding scheme but also a structure of a modulation code or a demodulation method suitable for recording/reproduction in a high-capacity storage are studied and developed. Patent Document 1 (JP-A 1997-197947) and other schemes are proposed in relation to a structure of a modulation code, and Patent Document 2 (JP-A 2007-272973) and other schemes are proposed in regard to a demodulation method. The iterative decoding scheme utilizing an error correcting code, e.g., a turbo code or an LDPC code is disclosed in Patent Document 3 (JP-A 2003-168264).
However, the conventional technology has the following problem. In a demodulator disclosed in Patent Document 2, since an a posteriori value of error correction code (ECC) data is calculated based on probabilities of all patterns of a demodulation code, a demodulation calculation amount is dependent on the number of patterns of demodulation data. Therefore, since the number of patterns of the demodulation code raised to the mth power) exponentially rises when the number of bits m of information data is increased, a noticeable increase in demodulation calculation amount is a problem.
A general architecture that implements the various feature of the invention will now be described with reference to the drawings. The drawings and the associated descriptions are provided to illustrate embodiments of the invention and not to limit the scope of the invention.
Various embodiments according to the invention will be described hereinafter with reference to the accompanying drawings.
An embodiment according to the present invention provides a decoding device that has a calculation amount smaller than that in the conventional technology and enables decoding with a high error correcting capability in a signal processing system that iteratively perform decoding in a demodulator and a turbo/LDPC decoder.
A decoding device in an embodiment according to the present invention is characterized by selecting modulation data having a high possibility of transmission from 2̂m (=2 raised to the mth power) types of modulation data based on an a posteriori value of ECC data input to a demodulator when performing demodulation for a second or subsequent time and obtaining an a posteriori value of the ECC data based on the selected modulation data.
That is, the present invention is a signal processing device that performs iterative processing between the demodulator that demodulates data of n (>m) bits obtained by modulating data of m bits based on a predetermined modulation rule into data of m bits and an ECC decoder, carries out maximum a posteriori probability decoding, and estimates information data from a reception signal for modulation data based on this processing.
Moreover, this signal processing device is characterized by having a module that performs calculation of modulation data having a pattern that is assumed to have a high probability as modulation data to be decoded alone from all patterns of the modulation data to be decoded and thereby calculates an a posteriori value after demodulation when calculating the a posteriori value after demodulation based on an a priori value fed back from the ECC decoder.
In the signal processing device, an amount of calculation is small, and decoding with a high error correcting capability can be performed.
The decoding device that is a premise of the present invention will be first explained.
When recording data, information data to be recorded is encoded into ECC data by, e.g., a turbo encoder or an LDPC encoder 11. Then, the ECC data is input to a modulator 12 to be converted into modulation data. At last, a recording head 13 is utilized to record the modulation data in a recording medium 14, thereby terminating the processing. As the recording medium, there is, e.g., a hologram storage medium.
When reproducing recorded data, information consisting of two-dimensional page data recorded in the hologram storage medium is read through a reproducing head 15 to generate a reproduction signal corresponding to the two-dimensional page data. A position detector 16 detects a position of an image with respect to the generated reproduction signal, and then an image corrector 17 or an equalizer 18 corrects the reproduction signal.
In demodulation processing and an error correction processing part, a reception signal for the modulation data output from the equalizer 18 is first input to a demodulator 19 to calculate an a posteriori value of the ECC data. Then, the a posteriori value of the ECC data calculated in the demodulator 19 is input to a turbo/LDPC decoder 20, and iterative decoding is executed in the decoder 20 to obtain an a posteriori value of information data. Additionally, the a posteriori value of the information data is subjected to hard determination, and the processing is terminated upon determining the information data.
A modulation method for the information data and a calculation method for the a posteriori value of the ECC data in the demodulator will now be explained.
Although various methods have been conventionally proposed as the modulation method, 2:4 modulation will be explained as an example.
As indicated by a position of a code (a) in
As explained above, in 2:4 demodulation, data bits are not processed one by one but they are processed in units of two bits at the time of recording and reproduction.
In the demodulator 19, when calculating each a posteriori value of the ECC data, each a posteriori value of the ECC data consisting of two bits is calculated from a reception signal of four bits.
A reception signal of four bits is first input to a PPOS(x1=0, x2=0) calculation module 19a to a PPOS(x1=1, x2=1) calculation module 19d. When this reception signal is input, the respective calculation modules 19a to 19d output an a posteriori probability PPOS(x1=0, x2=0) that x1=0 and x2=0 are achieved to an a posteriori probability PPOS(x1=1, x2=1) that x1=1 and x2=1 are achieved.
Then, the respective a posteriori probabilities are input to an addition module 19e to output an a posteriori probability PPOS(x1=0) that x1=0 is achieved, an a posteriori probability PPOS(x1=1) that x1=1 is achieved, an a posteriori probability PPOS(x2=0) that x2=0 is achieved, and an a posteriori probability PPOS(x2=1) that x2=1 is achieved. At last, an a posteriori value calculation module 19f obtains an a posteriori value VPOS(x1) of x1 and an a posteriori value VPOS(x2) of x2 from the respective a posteriori probabilities, thereby terminating the calculation of the a posteriori values.
Several patterns of a calculation method for a posteriori probabilities output from the PPOS(x1=0, x2=0) calculation module 19a to PPOS(x1=1, x2=1) calculation module 19d are introduced in Patent Document 2. A method utilizing Euclidean distances of a reception signal and modulation data will be explained here.
Euclidean distances yd(C1) to yd(C4) of the reception signal and respective pieces of modulation data are as represented by Expressions 1 to 4.
yd(C1)=√{square root over (r12+(r2−1)2+r32+r42)} Expression 1
yd(C2)=√{square root over ((r1−1)2+r22+r32+r42)} Expression 2
yd(C3)=√{square root over (r12+r22+r32+(r4−1)2)} Expression 3
yd(C4)=√{square root over (r12+r22+(r3−1)2+r42)} Expression 4
The Euclidean distances affect respective a posteriori probabilities. When noise included in the reception signal for the modulation data is additive white gaussian noise having an average value of zero and a standard deviation of σ, probabilities PPOS(x1=0, x2=0) to PPOS(x1=1, x2=1) are as represented by Expressions 5 to 8.
Since the standard deviation σ of noise varies depending on a noise amount produced by, e.g., a reproducing head, it must be specifically obtained. Noise included in the reception signal for the modulation data that can be a basis for calculation of a value of σ can be obtained as follows. That is, known modulation data is prepared in advance, recording and reproduction are performed to obtain a reception signal for the modulation data, and a difference between the known modulation data and the reception signal is calculated, whereby the noise can be obtained. Therefore, there is a method of determining a standard deviation of this difference signal as σ.
If a fact that σ does not vary in accordance with each medium is confirmed in advance, an appropriate value may be stored in the apparatus in advance, and this value may be used for calculation.
When PPOS(x1=0, x2=0) to PPOS(x1=1, x2=1) are utilized, PPOS(x1=0) to PPOS(x2=1) calculated by the addition module 19e are as represented by Expressions 9 to 12.
P
pos(x1=0)=Ppos(x1=0,x2=0)+Ppos(x1=0,x2=1) Expression 9
P
pos(x1=1)=Ppos(x1,x2=0)+Ppos(x1=1,x2=1) Expression 10
P
pos(x2=0)=Ppos(x1=0,x2=0)+Ppos(x1=1,x2=0) Expression 11
P
pos(x=1)=Ppos(x1=0,x2=1)+Ppos(x1=1,x2=1) Expression 12
When PPOS(x1=0) to PPOS(x2=1) are utilized, VPOS(x1) and VPOS(x2) calculated by the a posteriori value calculation module 19f are as represented by Expressions 13 and 14.
Consideration will now be given to a signal processing system in which technologies disclosed in Patent Document 2 and Patent Document 3 are combined and iterative decoding is carried out between a demodulator 30 and a turbo/LDPC decoder 32. In this case, it can be considered that the signal processing system has a structure depicted in
A recording medium 14, a reproducing head 15, a position detector 16, an image corrector 17, and an equalizer 18 are the same as those in the structure depicted in
A reproduction signal for demodulation data output from an adaptive equalizer 18 and an a priori value of ECC data are first input to a demodulator 30 to obtain an a posteriori value of the ECC data. After respective pieces of data are reordered by a deinterleaver 31, the a posteriori value of the ECC data output from the demodulator 30 is input to a turbo/LDPC decoder 32.
In the turbo/LDPC decoder 32, iterative decoding is carried out in the decoder based on the input a posteriori value of the ECC data.
When the number of iterations between the demodulator 30 and the turbo/LDPC decoder 32 has reached a predetermined number of times, or when an error is not detected as a consequence of performing a CRC or an error check based on a check matrix with respect to a decoding result, the turbo/LDPC decoder 32 calculates an a posteriori value of information data and terminates the decoding processing.
Contrary, when the number of iterations between the demodulator 30 and the turbo/LDPC decoder 32 does not reach the predetermined number of times and an error is detected as a consequence of performing a CRC or an error check based on a check matrix, the turbo/LDPC decoder 32 updates and outputs the a posteriori value of the ECC data.
When the a posteriori value of the ECC data is calculated, a subtracter 33 subtracts the a posteriori value of the ECC data before updating that is input to the turbo/LDPC decoder 32 from the a posteriori value of the ECC data after updating that is output from the turbo/LDPC decoder 32 in order to obtain an a priori value of the ECC data that is used in the demodulator 30. A subtraction result is an external value of the ECC data.
The external value of the ECC data is input to the demodulator 30 as an a priori value of the ECC data after respective pieces of data are reordered by an interleaver 34. The a priori value of the ECC data input to the demodulator 30 and the reproduction signal for the modulation data are utilized for recalculation of the a posteriori value of the ECC data in the demodulator 30.
The above-explained operation continues until the number of iterations between the demodulator 30 and the turbo/LDPC decoder 32 reaches the predetermined number of times or until an error is no longer detected by the CRC or the error check based on a check matrix.
A calculation method for the a posteriori value of the ECC data in the demodulator 30 will now be explained.
An a priori probability of each ECC data is first calculated from an a priori value of the ECC data of two bits input to the demodulator 30. The a priori probability is obtained by an a priori probability calculation module 30g. An a priori probability calculation module 30g outputs an a priori probability that x1 is zero, an a priori probability that x1 is one, an a priori probability that x2 is zero, and an a priori probability that x2 is one.
Assuming that an a priori value Vpri(x1) of ECC data x1 is Expression 15, an a priori probability Ppri(x1=0) that x1 is zero becomes Expression 16, and an a priori probability Ppri(x1=1) that ECC data is one becomes Expression 17. An a priori probability of another piece of ECC data x2 is obtained in the same manner.
After the a priori probability is obtained from the a priori value of each ECC data, each a priori probability is input to each of a PPOS(0,0) calculation module 30a to a PPOS(1,1) calculation module 30d. For example, when inputting to the PPOS(0,0) calculation module 30a, Ppri(x1=0) and Ppri(x2=0) are input to an integrator 30h to be multiplied, and then a value of Ppri(x1=0)×Ppri(x2=0) is input to the PPOS(0,0) calculation module 30a.
Further, when inputting to the PPOS(0,1) calculation module 30b, Ppri(x1=0) and Ppri(x2=1) are input to an integrator 30i to be multiplied, and then a value of Ppri(x1=0)×Ppri(x2=1) is input to the PPOS(0,1) calculation module 30b. Furthermore, when inputting to the PPOS(1,0) calculation module 30c, Ppri(x1=1) and Ppri(x2=0) are input to an integrator 30j to be multiplied, and then a value of Ppri(x1=1)×Ppri(x2=0) is input to the PPOS(1,0) calculation module 30c. Additionally, when inputting to the PPOS(1,1) calculation module 30d, Ppri(x1=1) and Ppri(x2=1) are input to an integrator 30k to be multiplied, and then a value of Ppri(x1=1)×Ppri(x2=1) is input to the PPOS(1,1) calculation module 30d.
After the respective a priori probabilities are input to the probability calculation module, a posteriori probabilities PPOS(x1=0, x2=0) to PPOS(x1=1, x2=1) are calculated from the a priori probabilities and the reproduction signal. The respective a posteriori probabilities are as represented by Expressions 18 to 21. Here, P′POS(x1=0, x2=0) to P′POS(x1=1, x2=1) in Expressions 18 to 21 are the same as Expressions 5 to 8, respectively.
P
pos(x1=0,x2=0)=Ppri(x1=0)*Ppri(x2=0)*P′pos(x1=0,x2=0) Expression 18
P
pos(x1=1,x2=0)=Ppri(x1=1)*Ppri(x2=0)*P′pos(x1=1,x2=0) Expression 19
P
pos(x1=0,x2=1)=Ppri(x1=0)*Ppri(x2=1)*P′pos(x1=0,x2=1) Expression 20
P
pos(x1=1,x2=1)=Ppri(x1=1)*Ppri(x2=1)*P′pos(x1=1,x2=1) Expression 21
After the respective a posteriori probabilities PPOS(x1=0, x2=0) to PPOS(x1=1, x2=1) are obtained, a posteriori values of the ECC data are calculated. A posteriori values VPOS(x1) and VPOS(x2) of respective pieces of data are as represented by Expressions 22 and 23.
When performing demodulation for the first time, which one of a probability that the ECC data is zero and a probability that the ECC data is one is high is unknown. Therefore, an initial value of the a priori value of the ECC data is determined as zero. When the a priori value is set to zero, both the a priori probability that the ECC data is zero and the a priori probability that the same is one are 0.5. If a data distribution of the ECC data is biased and how this data is biased is known, the a priori value may be set to an appropriate value.
Further, as explained above, the external value of the ECC data fed back from the turbo/LDPC decoder is directly assigned to the a priori value of the ECC data when performing demodulation for the second or subsequent time.
As explained above, the a priori probability calculation module 30g and the integrators 30h to 30k are provided in the demodulator 30. Furthermore, since each a posteriori value of the ECC data is calculated based on probabilities of all patterns of the modulation code, it can be understood that a modulation calculation amount is dependent on the number of patterns of the modulation data. Therefore, since the number of patterns (2̂m) of the modulation code exponentially rises when an information data bit number m is increased, there is a problem of an extreme increase in demodulation calculation amount.
Considering a signal processing system that performs iterative decoding between the demodulator and the turbo/LDPC decoder, the above-explained problem adversely affects a decoding calculation amount of the signal processing system.
Thus, the present invention provides an ingenious signal processing system explained below.
A basic flow of the entire signal processing system is substantially the same as that in the conventional technology. A recording medium 14, a reproducing head 15, a position detector 16, an image corrector 17, and an equalizer 18 are the same as those in the structure depicted in
An a posteriori value of ECC data demodulated in a demodulator 40 is input to a turbo/LDPC decoder 42 to be decoded through a deinterleaver 41. The a posteriori value of the ECC data obtained in this turbo/LDPC decoder 42 is input to a subtracter 43 and also input to an interleaver 45. The subtracter 43 subtracts the a posteriori value of the ECC data before updating from the posterior value of the ECC data after updating and inputs an output (an output as an external value of the ECC data) to an interleaver 44. Moreover, an output from the interleaver 45 is also input to the demodulator 40 as an a posteriori value of the ECC data.
In the apparatus according to the present invention, as data that is fed back to the demodulator 40 in a calculation method for an a posteriori value of the ECC data when performing demodulation for the second time, there are not only an a priori value of the ECC data but also an a posteriori value of the ECC data. Demodulation carried out for the first time is the same as that in the method explained in conjunction with
It is to be noted that the entire block is controlled by a controller 46, and an operation clock, an operation timing, and others are integrally controlled.
An outline of the modulation method carried out for the second or subsequent time in the present invention will now be explained.
A reliability calculation module 401 first determines an address having high reliability of an a priori value and binary ECC data at this address based on an a priori value of the ECC data fed back from the interleaver 44 (steps SA1, SA2, SA3, and SA9 in
Subsequently, various operations of respective parts in the reliability calculation module 401, the data selection module 402, and the a posteriori value calculation module 403 as primary modules in the demodulator 40 will now be explained.
A procedure of calculating reliability of each modulation data in the reliability calculation module 401 will be first explained.
The address for the ECC data means, e.g., an address given to the ECC data in each block in units of demodulation processing. For example, in case of a 2-4 modulation scheme, this address is an address associated with the foregoing data x1 or x2.
The binary ECC data (associated with an address having a set reliability flag) determined by the data determination module 4011 is input to the reliability calculation module 4013. Furthermore, the address having the set reliability flag obtained by the data address extraction module 4012 is transmitted to the reliability calculation module 4013 and the a posteriori calculation module 403.
Then, the data determination module 4011, the data address extraction module 4012, and the reliability calculation module 4013 will now be explained with reference to
In
First, when obtaining the address having high reliability of an a priori value, an absolute value converter 5011 obtains an absolute value of the a priori value of the ECC data, and a comparator 5013 determines whether this absolute value is larger than a threshold value. The threshold value is stored in a threshold value register 5012. When the absolute value of the a priori value of the ECC data is larger than the threshold value, the a priori value of the ECC data is considered to have high reliability, and a reliability flag is set. When the reliability flag is set, a storage switch 5014 is turned on, and the address of the ECC data is stored in a data address storage module 5015.
On the other hand, when obtaining the binary ECC data for this address, the a priori value of the ECC data is first input to a hard determination module 5016, and an output from the hard determination module 5016 is determined as binary ECC data. This method is the same as a method of determining binary information data from an a posteriori value of information data. Additionally, the ECC data at the address having high reliability alone is stored in a data storage module 5018 through a storage switch 5017 based on the reliability flag output from the comparator 5013
Determining reliability based on the threshold value in this manner enables storing both the address having high reliability and the ECC data at this address. These pieces of data are supplied to the reliability calculation module 4013.
After obtaining the address having high reliability and the binary ECC data at this address, the reliability calculation module 4013 depicted in
The reliability of each modulation data is calculated based on a Hamming distance between ECC data obtained from an a priori value and the ECC data for each modulation data at an address having a set reliability flag. In this embodiment, the highest reliability is provided when the Hamming distance is zero, and the reliability is lowered as the distance is increased.
The ECC data extraction module 5022 receives the ECC data (which is currently a processing target) for each modulation data and the address having the set reliability flag (which is output from the above-explained data address extraction module 4012).
Then, the ECC data for each modulation data at this address is obtained. Further, the Hamming distance calculator 5021 calculates a Hamming distance between the ECC data obtained from the a priori value (data from a feedback system) and the ECC data for each modulation data at this address. At last, the reliability converter 5020 converts the Hamming distance into reliability of the modulation data, thereby terminating calculation of reliability for each modulation data. This reliability of each modulation data is input to the data selection module 402.
After the reliability calculation module 401 outputs reliability of each modulation data, the data selection module 402 depicted in
After selecting the modulation data having high reliability, the a posteriori value calculation module 403 depicted in
The a posteriori value update determination module 4032 receives an address having a set reliability flag from the reliability calculation module 401 and a modulation data group having set selection flags from the data selection module 402. The a posteriori value update determination module 4032 supplies a non-update target address to the a posteriori extractor 4033. The a posteriori extractor 4033 selects an a posteriori value of the ECC data from the interleaver 45 based on the non-update target address, outputs the a posteriori value of the ECC data at the non-update target address, and supplies this value to the data combiner 4034. This data combiner 403 also receives an a posteriori value of the ECC data at an update target address calculated by the a posteriori calculator 4031.
As explained above, the a posteriori calculation module 403 sorts each address at which an a posteriori value is updated (an update target address) and each address at which an a posteriori value is not updated (a non-update target address) based on the selected modulation data group and the addresses having set reliability flags. As to an a posteriori value of the ECC data at an update target address, a value is obtained in the same format as Expressions 18 to 23 and then updated by the a posteriori value calculator 4031. In regard to an a posteriori value of the ECC data at a non-update target address, the a posteriori value extractor 4033 extracts a value associated with a corresponding address from a posteriori values of the ECC data fed back from the interleaver 45.
Furthermore, the data combiner 4034 combines the a posteriori value of the ECC data output from the a posteriori value calculator 4031 with the a posteriori value of the ECC data output from the a posteriori value extractor 4033 to be determined as an a posteriori value of the ECC data after demodulation, and supplies the obtained value to the deinterleaver 41. Then, the demodulation calculation is terminated.
In regard to how to sort addresses, several patterns can be considered. First, there is a method of determining all addresses having set reliability flags as non-update target addresses. Besides, it is possible to adopt a method of determining addresses having the same data as non-update target addresses when such addresses are found at the time of checking the ECC data for selected modulation data.
As explained above, the calculation method for an a posteriori value of the ECC data in the a posteriori value calculator 4031 depicted in
Adopting the foregoing embodiment enables narrowing down modulation data based on an a priori value of ECC data at the time of demodulation carried out for the second time, thus decreasing a decoding calculation amount and increasing a decoding speed. Additionally, considering data corresponding to one page in hologram recording, demodulation calculation can be substantially simplified with respect to a part that has a high quality of a reception signal and also has high reliability of an a posteriori value or an a priori value, and demodulation calculation can be concentrated on a part that has a low quality of a reception signal and has low reliability of an a posteriori value or an a priori value.
Further, Patent Document 2 describes a method of calculating a probability of each modulation data from a reception signal for each modulation data and utilizing the modulation data having a high probability alone for calculation of an a posteriori value, but this embodiment utilizes an a priori value of ECC data to make a selection without using a reception signal, thereby decreasing a calculation amount for the selection. Furthermore, since calculation for an a posteriori value itself is not carried out in regard to an address having high reliability, a calculation amount at this address can be substantially zero. These effects become more prominent when the number m of pieces of input data is increased.
Specific numerical values will now be taken as an example to explain operations in the present invention. Table 1 in
Assuming that a threshold value of the reliability determination flag is a value in Table 1 in
When a determination on an a posteriori value calculation address is as shown in Table 3 in
A reception signal for modulation data depicted in
After calculating a posteriori values of the ECC data in the demodulator and reordering the a posteriori values of the ECC data in the deinterleaver, the reordered data is input as communication path values of the ECC data to the turbo/LDPC decoder to correct an error. Although a description on particulars will be omitted, it is assumed that an error is detected as a result of error correction and the a posteriori values of the ECC data (x1, x2) are respectively calculated as values [−4 −0.2].
Then, the input communication path values of the ECC data are subtracted from the a posteriori values of the ECC data calculated by the decoder in order to obtain a priori values of the ECC data that are input to the demodulator, thereby obtaining external values of the ECC data. The values are [−4 −0.2]−[−1.2 −0.1072]=[−2.8 −0.0928]. Further, the values are reordered by the interleaver, and they are input as a priori values of the ECC data to the demodulator.
Subsequently, the second modulation is performed. First, the reliability calculation module obtains an address that the reliability flag is set and reliability of each modulation from the a priori values ([−2.8 −0.0928]) of the ECC data input to the demodulator.
The data address extraction module obtains an address that the reliability flag is set. Since absolute values of the a priori values of the ECC data are [2.8 0.0928], an address of x1 alone becomes an address that the reliability flag is set. Furthermore, the address of x1 alone becomes a storage target, and the data determination module obtains x1=0 from the a priori value (−2.8) of the ECC data x1.
That is, the address of x1 becomes the address that the reliability flag is set, and the ECC data at this address becomes zero.
Upon receiving results output from the data address extraction module and the data determination module, reliability of each modulation data is calculated. First, ECC data for each modulation data at the address having the set reliability flag is obtained. Respective pieces of ECC data having codes C1 to C4 at the address of x1 are [0, 1, 0, 1], respectively. Then, Hamming distances between respective pieces of extracted ECC data and the ECC data output from the data determination module are calculated. The Hamming distances are [0, 1, 0, 1], respectively. At last, reliability for each modulation data is calculated from the Hamming distances. The reliabilities of the respective pieces of modulation data become [1 0 1 0] from Table 2 in
That is, the codes C1 and C3 with which the ECC data x1=0 is attained are regarded as respective pieces of modulation data having high reliability. Then, the operation in the reliability calculation module is terminated.
After the reliability calculation module obtains the address having the set reliability flag and the reliability of each modulation data, the data selection module narrows down the modulation data. Based on the reliability of each modulation data ([1, 0, 1, 0]) and the threshold value for the modulation data selection shown in Table 1 in
After the modulation data is selected, the a posteriori value calculation module calculates the a posteriori value of each ECC data. First, a fine calculation address and a simple calculation address are determined. The a posteriori value update determination module determines from a determination standard shown in Table 3 that the a posteriori value of x1 is not updated but the a posteriori value of x2 is updated. As the a posteriori value of x1, the a posteriori value input to the demodulator is directly input to the data combiner. The a posteriori value of x2 is calculated in the same format as Expressions 15 to 23 by utilizing the selected codes C1 and C3 alone by an a posteriori value fine calculator. Then, the a posteriori value of x2 can be obtained as represented by Expression 24. Here, P′POS(x1=0, x2=0) and P′POS(x1=0, x2=1) in Expression 24 are the same as those in Expressions 5 and 7.
A method of determining a threshold value required to determine reliability of the a priori value of the ECC data will now be explained. The threshold value required to determine reliability of the a priori value of the ECC data is determined based on noise included in a reception signal for the ECC data and a set value of an error rate of the ECC data at an address determined to have high reliability.
The error rate of the ECC data at the address determined to have high reliability will now be explained. The error rate is equal to an error rate of ECC data when the threshold value required to determine reliability of the ECC data is set at a give value, and it is calculated from a probability distribution of a reception signal for the ECC data.
Assuming that Expression 25 represents a probability distribution of the reception signal when the ECC data is zero and Expression 26 represents a probability distribution of the reception signal when the ECC data is one, an a priori value of the ECC data when the reception signal for the ECC data is (0.5−a) and an a priori value of the ECC data when the reception signal is (0.5+a) are represented by Expression 27.
Therefore, in the example depicted in
In regard to an error rate when the threshold value required to determine reliability of the ECC data is (a/σ2), it is good enough to obtain a probability that an a priori value of the ECC data becomes equal to or above (a/σ2), i.e., the reception signal for the ECC data becomes equal to or above (0.5+a) when the ECC data is zero. This probability is as represented by Expression 28 when an error function erfc is used.
Therefore, an error rate B of the ECC data at an address having high reliability when the threshold value required to determine reliability is as represented by Expression 29. Contrary, the threshold value A that attains the error rate B of the ECC data at the address having high reliability is as represented by Expression 30 when an inverse function of the error function erfc is erfc−1.
That is, when setting the threshold value required to determine reliability of the a priori value of the ECC data, it is good enough to set the error rate of the ECC data at the address having high reliability and set the threshold value based on Expression 30.
The noise included in the reception signal for the ECC data is obtained by previously preparing a correspondence table of noise included in a reception signal for modulation data and the noise included in the reception signal for the ECC data, measuring the noise included in the reception signal for the modulation data at the time of reproduction, and then performing calculation based on the prepared correspondence table and the measured noise.
A method of creating the correspondence table of the noise included in the reception signal for the modulation data and the noise included in the reception signal for the ECC data will now be explained.
At the time of decoding, the ECC data can be obtained by demodulating the reception signal for the modulation data. Therefore, the modulation data obtained by modulating the known ECC data and noise included in the reception signal for the modulation data are prepared, the reception signal including the set noise is demodulated to obtain an a posteriori value of the ECC, and the noise included in the reception signal for the ECC is calculated from the a posteriori value. Further, a plurality of types of noise are set, and the same operation is repeated, thereby bringing the correspondence table to completion.
A method of calculating noise included in a reception signal for ECC data from an a posteriori value of the ECC data will now be explained.
The noise included in the reception signal for the ECC data can be obtained by converting a distribution of the a posteriori value of the ECC data into a distribution of the reception signal for the ECC data and calculating a probability density function of the reception signal distribution.
It is assumed that one type of noise included in the reception signal for the modulation data is set and a distribution of the a posteriori value of the ECC data obtained by demodulating the reception signal is as shown in
Now, since the ECC data is known, the distribution depicted in
Subsequently, as shown in
After the a posteriori value (−b) that maximizes the proportion of the data is obtained, the a posteriori value of the ECC data is converted into the reception signal for the ECC data.
When the a posteriori value of the ECC data is zero, each of a probability that the ECC data is zero and a probability that the same is one is 50% based on a definition of the a posteriori value. Therefore, whether the ECC data is zero or one cannot be determined. This state is the same as a state where the reception signal for the ECC data takes an intermediate value 0.5 between zero and one and the ECC data cannot be determined from the reception signal. Therefore, a state where the a posteriori value of the ECC data is zero is regarded as the state where the reception signal for the ECC data is 0.5. Further, a state where the a posteriori value (−b) maximizing the proportion of the data is provided is regarded as the state where the reception signal for the ECC data is zero. As a result of this conversion, a distribution of the reception signal for the ECC data is as shown in
After the a posteriori value of the ECC data is converted into the reception signal for the ECC data, a probability distribution of the reception signal is obtained.
For example, in a case where the noise included in the reception signal for the ECC data is white gaussian noise, a probability density function of the reception signal in a situation where the ECC data is zero is as represented by Expression 31 when a dispersion value σ2 of the noise is obtained (
Therefore, when the ECC data is zero, the probability density function of the noise included in the reception signal for the ECC data is as represented by Expression 32.
In the above-explained operation, when the same calculation is carried out in regard to a case where the ECC data is one, a probability density function of the noise included in the ECC data can be obtained.
Further, when a plurality of types of noise included in the reception signal for the modulation data are set and the same operation is performed, a correspondence table of the noise included in the reception signal for the modulation data and the noise included in the reception signal for the ECC data is brought to completion.
Although the noise included in the reception signal for each of the modulation data and the ECC data is assumed as white gaussian noise in this embodiment, the present invention is not restricted to the white gaussian noise, and the present invention can be likewise carried out in any other noise distribution.
Furthermore, the present invention can be likewise carried out in a situation where properties of noise provided in the reception signal when the ECC data is zero are different from those of noise provided in the reception signal when the ECC data is one or a situation where a probability that the ECC data appears as zero is different from a probability that the same appears as one. However, in such a case, it is desirable to prepare two type of threshold values required to determine reliability of the ECC data, i.e., a positive value and a negative value.
Moreover, although the embodiment using the 2:4 modulation code has been explained, the present invention is not restricted to the 2:4 modulation code and it can be likewise carried out even if any other modulation code is used.
While certain embodiments of the inventions have been described, these embodiments have been presented by way of example only, and are not intended to limit the scope of the inventions. Indeed, the novel methods and systems described herein may be embodied in a variety of other forms; furthermore, various omissions, substitutions and changes in the form of the methods and systems described herein may be made without departing from the spirit of the inventions. The accompanying claims and their equivalents are intended to cover such forms or modifications as would fall within the scope and spirit of the inventions.
Number | Date | Country | Kind |
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2008-163773 | Jun 2008 | JP | national |