The present invention relates to a signal transmitting apparatus and method thereof, and more particularly to a pre-distortion method to reduce the power of CIM3 signal of a signal transmitting apparatus.
In a wireless communications system, the transmitter is used to transmit a wireless signal to the target receiver. When the power of wireless signal is larger, the transmission range is longer. Meanwhile, when the bandwidth of wireless signal is wider, the transmission rate is higher. However, the non-linear characteristic of the transmitter may cause some problems to the wireless system when the power and bandwidth of wireless signal are higher. For the example of LTE (Long Term Evolution) wireless system, a passive mixer is normally used to un-convert the wireless signal into an RF (Radio Frequency) signal, and a programmable gain amplifier or a power amplifier is used to power-up the RF signal for transmission. However, the non-linear characteristic of the passive mixer may introduce distortion around the frequency of the carrier frequency, i.e. the so called in-band distortion. Meanwhile, the passive mixer also generates harmonic signals at the 3rd harmonic frequency of the carrier frequency. Then, the non-linearity of the amplifier may fold the higher order harmonic signals back to the 1st order frequency (i.e. the carrier frequency) of the wireless signal, i.e. the so called CIM3 (Counter 3rd order intermodulation) folding back distortion. As a result, the power-up RF signal is distorted. Moreover, when the data rate of the wireless signal is reduced, e.g. only a partial RB (Resource Block) are used to transmit data, the CIM3 effect is more severe, and the CIM3 signal may affect the adjacent channels nearby the channel of the LTE wireless system. Therefore, how to reduce the effects caused by the non-linear characteristic of a wireless transmitter is an urgent problem in this field.
One of the objectives of the present invention is to provide a pre-distortion method to reduce the power of CIM3 signal of a signal transmitting apparatus.
According to a first embodiment of the present invention, a signal transmitting apparatus is disclosed. The signal transmitting apparatus comprises a first converting device, a second converting device, an amplifying device, and a processing device. The first converting device is arranged to generate an up-converted in-phase signal according to an in-phase digital signal and a first pre-distortion signal. The second converting device is arranged to generate an up-converted quadrature signal according to a quadrature digital signal and a second pre-distortion signal. The amplifying device is arranged to generate an amplified signal according to the up-converted in-phase signal and the up-converted quadrature signal. The processing device is arranged to generate the first pre-distortion signal at least according to a first combination signal combined by a cube of the in-phase digital signal and a multiplication of the in-phase digital signal and a square of the quadrature digital signal, and to generate the second pre-distortion signal at least according to a second combination signal combined by a cube of the quadrature digital signal and a multiplication of the quadrature digital signal and a square of the in-phase digital signal.
According to a second embodiment of the present invention, a signal transmitting method is disclosed. The signal transmitting method comprises the steps of: generating an up-converted in-phase signal according to an in-phase digital signal and a first pre-distortion signal; generating an up-converted quadrature signal according to a quadrature digital signal and a second pre-distortion signal; generating an amplified signal according to the up-converted in-phase signal and the up-converted quadrature signal; generating the first pre-distortion signal at least according to a first combination signal combined by a cube of the in-phase digital signal and a multiplication of the in-phase digital signal and a square of the quadrature digital signal; and generating the second pre-distortion signal at least according to a second combination signal combined by a cube of the quadrature digital signal and a multiplication of the quadrature digital signal and a square of the in-phase digital signal.
These and other objectives of the present invention will no doubt become obvious to those of ordinary skill in the art after reading the following detailed description of the preferred embodiment that is illustrated in the various figures and drawings.
Certain terms are used throughout the description and following claims to refer to particular components. As one skilled in the art will appreciate, electronic equipment manufacturers may refer to a component by different names. This document does not intend to distinguish between components that differ in name but not function. In the following description and in the claims, the terms “include” and “comprise” are used in an open-ended fashion, and thus should be interpreted to mean “include, but not limited to . . . ”. Also, the term “couple” is intended to mean either an indirect or direct electrical connection. Accordingly, if one device is coupled to another device, that connection may be through a direct electrical connection, or through an indirect electrical connection via other devices and connections.
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More specifically, the processing device 108 generates the first combination signal (i.e. I3−3I·Q2) by subtracting a triple (i.e. 3I·Q2) of the multiplication of the in-phase digital signal I and the square of the quadrature digital signal Q from the cube of the in-phase digital signal I, and generates the second combination signal (i.e. Q3−3Q·I2) by subtracting a triple (i.e. 3Q·I2) of the multiplication of the quadrature digital signal Q and the square of the in-phase digital signal I from the cube of the quadrature digital signal Q. According to the embodiment of the present invention, the processing device 108 further multiplies the first combination signal by a compensation coefficient α to generate the first pre-distortion signal I′, and multiplies the second combination signal by the compensation coefficient α to generate the second pre-distortion signal Q′. Then, the processing device 108 further shifts the first combination signal by a compensation phase φ to generate the first pre-distortion signal I′, and shifts the second combination signal by the compensation phase φ to generate the second pre-distortion signal Q′.
Accordingly, the pre-distorted in-phase digital signal I″ and the pre-distorted quadrature digital signal Q″ outputted by the processing device 108 can be expressed by the following equations (1) and (2) respectively:
I″=I+I′, (1)
Q″=Q+Q′. (2)
According to the above embodiment, to generate the first pre-distortion signal I′ and the second pre-distortion signal Q′, the processing device 108 comprises a first computing circuit 1081, a second computing circuit 1082, a third computing circuit 1083, a first combining circuit 1084, and a second combining circuit 1085. The first computing circuit 1081 is arranged to generate a first signal term (i.e. α(I3−3I·Q2)) and a second signal term (i.e. α(Q3−3Q·I2)) according to the in-phase digital signal I, the quadrature digital signal Q, and the compensation coefficient α. The second computing circuit 1082 is arranged to shift the first signal term by the compensation phase φ to generate the first pre-distortion signal I′. The third computing circuit 1083 is arranged to generate shift the second signal term by the compensation phase φ to generate the second pre-distortion signal Q′. The first combining circuit 1084 is arranged to combine the in-phase digital signal I and the first pre-distortion signal I′ to generate the pre-distorted in-phase digital signal I″. The second combining circuit 1085 is arranged to combine the quadrature digital signal Q and the second pre-distortion signal Q′ to generate the pre-distorted quadrature digital signal Q″.
In addition, the first converting device 102 comprises a first digital-to-analog converting circuit (DAC) 1022 and a first mixing circuit 1024. The first mixing circuit 1024 may be a passive mixer. The first digital-to-analog converting circuit 1022 is arranged to convert the pre-distorted in-phase digital signal I″ into a pre-distorted in-phase analog signal Si. The first mixing circuit 1022 arranged to up-convert the pre-distorted in-phase analog signal Si into the up-converted in-phase signal Sui. The second converting device 104 comprises a second digital-to-analog converting circuit 1042 and a second mixing circuit 1044. The second mixing circuit 1044 may be a passive mixer. The second digital-to-analog converting circuit (DAC) 1042 is arranged to convert the pre-distorted quadrature digital signal Q″ into a pre-distorted quadrature analog signal Sq. The second mixing circuit 1044 is arranged to up-convert the pre-distorted quadrature analog signal Sq into the up-converted quadrature signal Suq. According to the embodiment, the signal transmitting apparatus 100 further comprises a combining circuit 110. The combining circuit 110 is arranged to combine the up-converted in-phase signal Sui and the up-converted quadrature signal Suq into an up-converted signal Su. The amplifying device 106 generates the amplified signal Sa according to the up-converted signal Su.
It should be noted that the compensation coefficient α and the compensation phase φ may be stored in the first computing circuit 1081 or stored in another storing circuit (not shown) in the signal transmitting apparatus 100.
According to embodiment, the first pre-distortion signal I′ and the second pre-distortion signal Q′ are arranged to pre-distort or calibrate the in-phase digital signal I and the quadrature digital signal Q respectively such that the power of CIM3 (Cross 3rd order intermodulation) signal or out-of-band 3rd order intermodulation (OB-IM3) in the amplified signal Sa can be reduced or diminished to an acceptable level. It is noted that the CIM3 or OB-IM3 signal is emerged due to the non-linear characteristic of the first mixing circuit 1024, the second mixing circuit 1044, and the amplifying device 106. More specifically, according to the embodiment, the digital baseband data is z, and the digital baseband data z can be expressed by the following equation (3):
z=I+jQ=γejω
I is the in-phase digital signal, and Q is the quadrature digital signal. Then, the modulating output signal of the first mixing circuit 1024 and the second mixing circuit 1044 (i.e. the up-converted signal Su) can be expressed by the following equation (4):
x=Re[zejω+β·z*ej3ω]=Re[zejω+mej3ω]=½[zejω+z*e−jω+mej3ω+m*e−j3ω]. (4)
ω is the oscillating frequency of the oscillation signal inputting to the first mixing circuit 1024 and the second mixing circuit 1044 for up-converting the pre-distorted in-phase analog signal Si and the pre-distorted quadrature analog signal Sq respectively. The amplified output signal y of the amplifying device 106 (i.e. the amplified signal Sa) can be expressed by the following equation (5):
y=α1x+α3x3. (5)
If the equation (4) is substituted into equation (5), then the signal term at the frequency ω produced by x3 can be expressed by the following equation (6):
x3@ω:(2|z|2+6|m|2)z+3mz*2+(z2+2|m|2)z*. (6)
If m=βz*, then the above equation (6) can be expressed by the following equation (7):
m=βz*:(3+6|β|2)|z|2z+3βz*3. (7)
If z=γejω
z=γejω
If z*=(I−jQ), then the term 3βz*3 in equation (7) can be expressed by the following equation (9):
3βz*3=3β(I−jQ)3=3β(I3−3IQ2+j(Q3−3I2Q)). (9)
According to the above equation (9), it can be seen that the term 3β(I3−3IQ2) can be regarded as the in-phase CIM3 signal appearing in the in-band of the amplified signal Sa, and the term 3β(Q3−3I2Q) can be regarded as the quadrature CIM3 signal appearing in the in-band of the amplified signal Sa. Therefore, to reduce the CMI3 signal of the amplified signal Sa, the present first computing circuit 1081 is arranged to pre-distort the in-phase digital signal I by the first pre-distort signal (i.e. α(I3−3I·Q2)), and to pre-distort quadrature digital signal Q by the second pre-distort signal (i.e. α(Q3−3Q·I2)) as shown in
In addition, when the mixer (i.e. the first mixing circuit 1024 and the second mixing circuit 1044) up-converts the pre-distorted in-phase analog signal Si and the pre-distorted quadrature analog signal Sq by the local oscillation signal, the phase of the 3rd order harmonic signal induced by the mixer is not exactly triple of the phase of the 1st order local oscillation signal. The phase of the 3rd order harmonic signal may be shifted by a phase difference, i.e. phase shift. If the 3rd order harmonic signal has phase shift, the above-mentioned CIM3 signal may also be shifted by the same phase shift. In other words, the first pre-distort signal α(I3−3I·Q2)) and the second pre-distort signal α(Q3−3Q−I2) should be phase-shifted by an appropriate phase (i.e. φ) by the second computing circuit 1082 and the third computing circuit 1083 before combining with the in-phase digital signal I and the quadrature digital signal Q respectively.
More specifically, if the digital baseband data BB is expressed by the following equation (10):
BB=Amejω
and the local oscillation signal, which controls the mixer (i.e. the first mixing circuit 1024 and the second mixing circuit 1044), having a phase shift is expressed by the following equation (11):
LO=ejω
then the modulating output signal of the first mixing circuit 1024 and the second mixing circuit 1044 (i.e. the up-converted signal Su) can be expressed by the following equation (12):
MOD=Re[Amej(ω
The amplified output signal y of the amplifying device 106 (i.e. the amplified signal Sa) can be expressed by the following equation (13):
It can be seen that, in the above equation (13), the same phase shift Φ will appear in the frequency (ωc−3ωm), which is the frequency of the CIM3 signal of the amplified signal Sa. Therefore, to precisely reduce the power of the CMI3 signal of the amplified signal Sa, the present second computing circuit 1082 is arranged to shift the first pre-distort signal (i.e. α(I3−3I·Q2)) by an appropriate phase (i.e. φ) before inputting to the first combining circuit 1084, and the third computing circuit 1083 is arranged to shift the second pre-distort signal (i.e. α(Q3−3Q·I2)) by the appropriate phase (i.e. φ) before inputting to the second combining circuit 1085 as shown in
According to the above description, the compensation coefficient α and the compensation phase φ are the two critical values need to be determined before the signal transmitting apparatus 100 transmits the real data to the receiver.
According to the second embodiment, the first training device 212 is arranged to control the first computing circuit 2081 to sweep the compensation coefficient α by a predetermined coefficient range to accordingly generate the amplified signal Sa′. The detecting device 214 is arranged to detect a power of a CIM3 (Counter inter-modulation signal) in the amplified signal Sa′. The determining device 216 is arranged to determine a specific coefficient from the predetermined coefficient range, wherein the specific coefficient corresponds to a specific power of the CIM3 signal in the amplified signal Sa′. The second training device 218 is arranged to control the second computing circuit 2082 and the third computing circuit 2083 to sweep the compensation phase φ by a predetermined phase range to accordingly generate the amplified signal Sa′, and the determining device 216 is arranged to further determine a specific phase from the predetermined phase range, and the specific phase corresponds to the specific power of the CIM3 signal in the amplified signal Sa′. According to the embodiment, the specific power is a power lower than a threshold power. When the specific coefficient and the specific phase are determined, the specific coefficient and the specific phase can be set to be the compensation coefficient α and the compensation phase φ respectively.
More specifically, to determine the target compensation coefficient α and the target compensation phase φ, a testing signals Sti′, Stq′ is arranged to input to the processing device 208, and the calibration device sweeps the coefficient and the phase to find the appropriate coefficient and phase such that the power of the CIM3 signal in the amplified signal Sa′ is low enough (i.e. lower than a predetermined threshold power) for the system. According to the embodiment, the testing signals Sti′, Stq′ may be a one-tone signal or a modulation signal. For example, the testing signals Sti′, Stq′ may be a LTE modulation signal with one RB.
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According to the embodiment, when the target compensation coefficient α and the target compensation phase φ are determined by the calibration process 300, the target compensation coefficient α and the target compensation phase φ may be stored in a storing circuit or a look-up table. Then, the processing device 208 may directly load the target compensation coefficient α and the target compensation phase φ to pre-distort the real data such that the power of the CIM3 signal in the transmitting signal is lower than the predetermined power level.
Briefly, the present invention pre-distorts the in-phase digital signal I and the quadrature digital signal Q by the signals derived from the above equations in the baseband process such that the power of the CIM3 signal in the transmitting signal can be diminished or at least lower than a predetermined power level.
Those skilled in the art will readily observe that numerous modifications and alterations of the device and method may be made while retaining the teachings of the invention. Accordingly, the above disclosure should be construed as limited only by the metes and bounds of the appended claims.
Filing Document | Filing Date | Country | Kind |
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PCT/CN2015/070871 | 1/16/2015 | WO | 00 |
Publishing Document | Publishing Date | Country | Kind |
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WO2016/112532 | 7/21/2016 | WO | A |
Number | Name | Date | Kind |
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8204456 | Xu | Jun 2012 | B2 |
20050141637 | Domokos | Jun 2005 | A1 |
20050157815 | Kim | Jul 2005 | A1 |
20060240786 | Liu | Oct 2006 | A1 |
20150054585 | Chang | Feb 2015 | A1 |
Number | Date | Country |
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104267385 | Jan 2015 | CN |
2 515 444 | Oct 2012 | EP |
2 779 440 | Sep 2014 | EP |
2 876 852 | May 2015 | EP |
2 339 657 | Feb 2000 | GB |
Entry |
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“International Search Report” mailed on Sep. 9, 2015 for International application No. PCT/CN2015/070871, International filing date:Jan. 16, 2015. |
Number | Date | Country | |
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20170180181 A1 | Jun 2017 | US |