The present disclosure is generally related to solar cells and, more particularly, embodiments of the present disclosure are related to silicon solar cells and methods of fabricating of silicon solar cells.
For many years, effort has been made to utilize the energy from the sun to produce electricity. It is well known that on a clear day the sun provides approximately one thousand watts of energy per square meter almost everywhere on the planet's surface. The historical intention has been to collect this energy by using, for example, an appropriate solar semiconductor device and utilizing the collected energy to produce power by the creation of a suitable voltage and to maximize amperage, which is represented by the flow of electrons. However, to date, many photovoltaic or solar cells typically have low overall efficiency.
The success of the solar cell industry has been impeded due to this lack of efficiency in solar cell fabrication and usage. For example, it is relatively expensive to manufacture the semiconductor materials currently utilized for solar cells and applicable processes. One traditional approach for manufacturing solar cells has included converting low quality silicon wafers from the semiconductor industry into solar cells by known techniques, which include etching of the wafers and subsequent processing of the silicon wafers so that they can function as solar cells. A second technique includes creating relatively thin layers of crystalline and/or amorphous silicon upon an appropriate substrate followed by processing techniques, which ultimately result in the production of a solar cell/solar panel. However, the extensive processes used in the above described approaches have historically been relatively inefficient, making the solar cell industry less than ideal.
Thus, a heretofore unaddressed need exists in the solar cell industry for solar cells and processes for fabricating the solar cells that address the aforementioned deficiencies and/or inadequacies.
Devices, solar cell structures, and methods of fabrication thereof, are disclosed. Briefly described, one exemplary embodiment of the device, among others, includes: a co-fired p-type silicon substrate, wherein the bulk lifetime is about 20 to 125 μs; an n+ layer (emitter) formed on the top-side of the p-silicon substrate; a silicon nitride anti-reflective (AR) layer positioned on the top-side of the n+ layer; a plurality of Ag contacts positioned on portions of the silicon nitride AR layer, wherein the Ag contacts are in electronic communication with the n+ layer; an uniform Al back-surface field (BSF or p+) layer positioned on the back-side of the p-silicon substrate on the opposite side of the p-type silicon substrate as the n+-type emitter layer; and an Al contact layer positioned on the back-side of the Al BSF layer. The device has a fill factor (FF) of about 0.75 to 0.85, an open circuit voltage (VOC) of about 600 to 650 mV, and a short circuit current density (JSC) of about 28 to 36 mA/cm2.
Briefly described, one exemplary embodiment of the solar cell structure includes: a co-fired p-type silicon substrate, wherein the bulk lifetime is about 75 to 125 μs; a n+-type emitter layer formed on the top-side of the p-silicon substrate, wherein the n+-type emitter is about 90 to 120 Ω/sq emitter; a silicon nitride anti-reflective (AR) layer positioned on the top-side of the n+-type emitter layer; a plurality of Ag contacts positioned on portions of the silicon nitride AR layer, wherein the Ag contacts are in electronic communication with the n+-type emitter layer; an Al back surface field (BSF) layer positioned on the back-side of the co-fired p-silicon substrate on the opposite side of the p-type silicon substrate as the n+-type emitter layer; and an Al contact layer positioned on the back-side of the Al back-surface field (BSF) layer. The solar cell has a fill factor (FF) of about 0.78 to 0.81, an open circuit voltage (VOC) of about 640 to 650 mV, a short circuit current density (JSC) of about 34 to 36 mA/cm2, a series resistance (RS) of about 0.8 to 1 Ω-cm2, a shunt resistance of about 1000 to 2000 kΩ, a junction leakage current of about 7 to 10 nA/cm2, and a back surface recombinant velocity (BSRV) of about 200 to 900 cm/s, and wherein the contact resistance (ρC) of the Ag contacts with the n+-type emitter layer is about 1.5 to 2 Ωcm2.
Briefly described, one exemplary embodiment of a method for fabricating a silicon solar cell structure includes: providing a p-silicon substrate having a top-side and a back-side; forming a n+-type emitter layer on the top-side of the p-silicon substrate; forming a silicon nitride anti-reflective (AR) layer on the top-side of the n+-type emitter layer; forming Ag contacts on the silicon nitride anti-reflective (AR) layer using a screen-printing technique; forming an Al contact layer on the back-side of the p-silicon substrate using a screen-printing technique; co-firing of the p-silicon substrate having the n+-type emitter layer, silicon nitride anti-reflective (AR) layer, Ag metal contacts, and Al contact layer; and forming a co-fired silicon solar cell structure. The Ag contacts are in electrical communication with the n+-type emitter layer. An Al back surface field layer (BSF) is formed, and the silicon solar cell has a fill factor of about 0.75 to 0.85, a VOC of about 550 to 650 mV, and a JSC of about 28 to 36 mA/cm2.
Briefly described, one exemplary embodiment of a method for co-firing a silicon solar cell includes: providing a silicon solar cell structure as described above; disposing the p-silicon substrate having the n+-type emitter layer, silicon nitride anti-reflective (AR) layer, Ag metal grid, and Al contact layer, into a belt furnace; heating the belt furnace at a rate of about 50 to 100° C./second to a temperature of about 700 to 900° C.; holding the temperature in the belt furnace at about 700 to 900° C. for about 1 to 5 seconds; and reducing the temperature in the belt furnace at a rate of about 50 to 100° C./second.
Other systems, methods, features, and advantages of the present invention will be or become apparent to one with skill in the art upon examination of the following drawings and detailed description. It is intended that all such additional systems, methods, features, and advantages be included within this description, be within the scope of the present invention, and be protected by the accompanying claims.
Many aspects of the disclosure can be better understood with reference to the following drawings. The components in the drawings are not necessarily to scale, emphasis instead being placed upon clearly illustrating the principles of the present disclosure. Moreover, in the drawings, like reference numerals designate corresponding parts throughout the several views.
In accordance with the purposes(s) of the present disclosure, as embodied and broadly described herein, embodiments of the present disclosure, in one aspect, relate to silicon solar cell structures and methods of fabricating silicon solar cell structure.
In general, embodiments of the silicon (Si) solar cell structure include, but are not limited to, a p-silicon substrate, a n+-type emitter layer formed on the top-side (i.e., top, front, and front-side of the p-silicon substrate) of the p-silicon substrate, a silicon nitride (e.g., SiNx) antireflection (AR) layer positioned on the top-side of the n+-type emitter layer, a plurality of silver (Ag) contacts (which are part of an Ag grid) positioned on portions of the SiNx antireflective layer, an aluminum (Al) back-surface field (BSF) layer positioned on the back-side (i.e., back, rear, and rear-side of the p-silicon substrate) of the p-silicon substrate (i.e., the side opposite the n+-type emitter layer), and an Al contact layer positioned on the back-side of the Al BSF. The Ag contacts are in electronically connected to the n+-type emitter layer.
In general, embodiments of the fabrication of silicon solar cell structure include processes that result in a silicon solar cell structure having unexpected characteristics such as, but not limited to, superior ohmic contact, superior solar cell performance and efficiency, high quality front and back screen printed contacts that can be rapidly produced, increased throughput of a manufacturing line, superior Al back-surface field (BSF), reduced cell processing time and firing steps, and superior surface passivation and maximization of the defect hydrogenation and solar cell bulk lifetime, as compared with other solar cells.
In particular, embodiments of the silicon solar cell structure have unexpected characteristics such as, but not limited to, superior fill factor (FF), superior open circuit voltage (VOC), and superior short circuit current density (JSC). In addition, embodiments of the silicon solar cell structure have additional characteristics such as, but not limited to, superior blue response, superior series resistance (RS), superior shunt resistance, superior junction leakage current density (JO2), superior bulk lifetime, superior back-surface field, superior emitter saturation current density (Joe), superior base saturation current density (Job), superior grid design, gridline width, and gridline shrinkage, and final metal gridline resistivity, as compared with other solar cells.
The silicon solar cell structure can be used, individually or in combination, in solar cells modules. The silicon solar cells modules incorporating one or more silicon solar cell structures can be used in many areas such as, but not limited to, orbiting space satellites, remote telecommunication repeaters, fiber optic amplifiers, remote street signs, telephone booths, outdoor lighting, homes, utility scale power generation, and the like.
Now having described embodiments of the silicon solar cell structure and methods of making the silicon solar cell structure in general, the following figures and the accompanying text describe various embodiments in greater detail.
As mentioned above, the p-silicon substrate can include, but is not limited to, edge-defined film fed grown (EFG) silicon wafer, string ribbon silicon, float zone (FZ) silicon, Czochralski (Cz) grown silicon, and cast multi-crystalline silicon (mc-Si). Due to the treatment processes described herein, the p-silicon substrate initially used (not shown in
The process of forming the n+-type emitter layer, which is known as gettering, and metal contact co-firing involve diffusion of hydrogen from the silicon nitride (SiNx) into the p-silicon substrate to passivate the defects sites (e.g., hydrogenation). A combination of these processes, in part, improves the quality of low quality p-silicon substrate materials (e.g., materials having lifetime of about 0.5 μs). However, good quality p-silicon substrate material (e.g., materials having lifetimes of more than about 150 μs) does not benefit from the hydrogenation.
The n+-type emitter layer can include, but is not limited to, about 55 to 120 Ω/sq emitter, about 60 to 120 Ω/sq emitter, about 65 to 120 Ω/sq emitter, about 70 to 120 Ω/sq emitter, about 75 to 120 Ω/sq emitter, about 80 to 120 f/sq emitter, about 85 to 120 Ω/sq emitter, about 90 to 120 Ω/sq emitter, about 95 to 120 Ω/sq emitter, about 100 to 120 Ω/sq emitter, about 105 to 120 Ω/sq emitter, about 110 to 120 Ω/sq emitter, about 115 to 120 Ω/sq emitter, 55 to 100 Ω/sq emitter, about 60 to 100 Ω/sq emitter, about 65 to 100 Ω/sq emitter, about 70 to 100 Ω/sq emitter, about 75 to 100 Ω/sq emitter, about 80 to 100 Ω/sq emitter, about 85 to 100 Ω/sq emitter, about 90 to 100 Ω/sq emitter, and about 95 to 100 Ω/sq emitter. In particular, the n+-type emitter layer can include, but is not limited to, about 55 Ω/sq emitter, about 60 Ω/sq emitter, about 65 Ω/sq emitter, about 70 Ω/sq emitter, about 75 Ω/sq emitter, about 80 Ω/sq emitter, about 85 Ω/sq emitter, about 90 Ω/sq emitter, about 95 Ω/sq emitter, and about 100 Ω/sq emitter. The n+-type emitter layer can have a thickness of about 0.2 cm to 0.7 μm and about 0.3 μm to 0.5 cm.
The silicon nitride (e.g, SiNx) anti-reflective (AR) layer can be described as a film, coating, and layer. Although, the stoichiometry of the SiNx is not fully understood, an estimate of the value of “x” can be from about 2 to 5. The SiNx anti-reflective (AR) layer can have a thickness of about 700 to 850 Å, about 750 to 850 Å, and about 780 to 800 Å.
The Al contact layer 108 can have a thickness of about 50 to 60 μm, about 30 to 50 μm, and about 15 to 20 μm. It should be noted that the Al contact layer 108 thickness depends, at least in part, on the thickness of the p-silicon substrate used. It also should be noted that a thicker Al contact layer 108 can cause warping of thin p-silicon substrates, which can be detrimental to module assembly and the like.
The Al back-surface field layer 112 should have a uniform BSF, which can be accomplished using the co-firing process described herein. The Al back-surface field layer 112 can have a thickness of about 2 μm to 40 μm, about 2 μm to 30 μm, about 2 μm to 20 μm, about 2 μm to 15 μm, about 2 μm to 10 μm, and about 5 μm to 10 μm.
As indicated above, the co-fired silicon solar cell structure can have characteristics such as, but not limited to, a fill factor (FF) of about 0.75 to 0.85, about 0.78 to 0.83, and about 0.78 to 0.81. The co-fired silicon solar cell can have an open circuit voltage (VOC) of about 550 to 660 mV, about 600 to 660 mV, about 640 to 660 mV, and about 645 to 660 mV. The co-fired silicon solar cell structure can have a short circuit current density (JSC) of about 28 to 39 mA/cm2, about 30 to 39 mA/cm2, about 34 to 39 mA/cm2 and 36 to 39 mA/cm2.
Further, the co-fired silicon solar cell structure can include characteristics such as, but not limited to, a bulk lifetime of about 20 to 400 μs, about 50 to 400 μs, and about 75 to 400 μs. The co-fired silicon solar cell structure can include a series resistance (RS) of about 0.01 to 1 Ω-cm2, about 0.50 to 1 Ω-cm2, and about 0.80 to 1 Ω-cm2. The co-fired silicon solar structure can include a shunt resistance of about 1000 to 5000 kΩ-cm2, about 1000 to 3500 kΩ-cm2, and about 1000 to 2000 kΩ-cm2. The co-fired solar silicon cell structure can include a junction leakage current density (JO2) of about 1 to 10 nA/cm2, about 4 to 10 nA/cm2, and about 7 to 10 nA/cm2. The co-fired silicon solar cell structure can include a contact resistance (ρC) of 0.01 to 3 mΩ-cm2, about 1 to 3 mΩ-c cm2, and about 1.5 to 3 mΩ-cm2. The co-fired silicon solar cell structure can include a back surface recombination velocity (BSRV) of about 200 to 1000 cm/s, about 400 to 1000 cm/s, and about 600 to 900 cm/s, but is should be noted this depends, in part, on the substrate resistivity.
It should be noted that the FF of the co-fired silicon solar cell structure is related, at least in part, to the series resistance (RS), the shunt resistance, and the junction leakage current density (JO2). In an embodiment, after co-firing, the co-fired silicon solar cell structure has a RS of about 0.80 to 1 Ω-cm2, a shunt resistance of about 1000 to 2000 kΩ, and a IO2 of about 7 to 10 nA/cm2, which indicate excellent ohmic contact and thus an excellent FF of 0.78 to 0.81. The co-firing process results in a co-fired silicon solar cell structure with a reduction in junction leakage current, and a decrease in junction leakage current produces increased JSC and an increased VOC. Unexpected silicon solar cell structure characteristics are a result of the co-firing process described herein. For example, hydrogen is transferred from the SiNx layer to the p-silicon substrate where it is retained in the defects (a process called defect passivation) of the solar cell structure. It should be noted that deviation (e.g., longer holding times) from the co-firing process can drive the hydrogen out of the p-silicon substrate, therefore, appropriate selection of process parameters can enhance the characteristics of the silicon solar cell structure. In this regard, increased defect passivation results in a co-fired silicon solar cell structure with increased bulk lifetime and increased solar cell efficiency. In another example, the co-fired silicon solar cell structure also includes an Al back surface field with increased uniformity due, at least in part, to uniform surface wetting with fast ramp-up. It should also be noted, that the excellent BSRV obtained is due, at least in part, to a uniform Al back-surface field layer.
In one embodiment, among others, the co-fired silicon solar cell structure can have characteristics such as, but not limited to, a fill factor (FF) of about 0.78 to 0.81, an open circuit voltage (VOC) of about 640 to 650 mV, and a short circuit current density (JSC) of about 34 to 36 mA/cm2. Further, the silicon solar cell structure can include a bulk lifetime of 75 to 400 μs, a series resistance (RS) of about 0.5 to 1 Ω-cm2, a shunt resistance of about 1000 to 2000 kΩ, a junction leakage current density (JO2) of about 7 to 10 nA/cm2, and a back surface recombination velocity (BSRV) of about 200 to 900 cm/s.
In general, the silicon solar cell structure, prior to co-firing, can be introduced to a belt furnace (described in more detail in Examples 1-8). For clarity, not every step in the process is shown, but one skilled in the art would understand additional steps that may need to be performed. In addition, the steps involved in the process can be performed in different orders, but in general, a p-silicon (p-Si) substrate is provided. An n+-type emitter layer is formed on the top-side of the p-silicon substrate. Then, a SiNx anti-reflective (AR) layer is positioned on the top-side of the n+-type emitter layer. Next, an aluminum (Al) contact layer 108 is screen printed on the back-side of the p-silicon substrate using an Al paste and dried at a temperature (e.g., about 190 to 220° C.). Subsequently, an Ag contact (e.g., part of an Ag metal grid (not shown)) is screen-printed on the top-side of the SiNx anti-reflective (AR) layer 106 using an Ag paste (e.g., PV168 Ag paste) and is dried at a temperature (e.g., about 190 to 220° C.). After the Ag contacts and Al contacts are formed, the structure is subjected to a co-firing process in the belt furnace under conditions described in more detail below, but include a temperature ramp up stage, a temperature holding stage, and a temperature ramp down stage. Post co-firing treatments can also be conducted to complete the silicon solar cell formation process.
In Block 204, a n+-type emitter layer is formed on the top-side of the p-silicon substrate. The n+-type emitter can include n+-type emitters as described above. In forming the n+-type emitter layer, the p-silicon substrate samples can be cleaned and diffused using a liquid POCl3 source in a tube furnace, for example. Spin-on, print-on, and spray-on phosphorus as well as and drive-in (at set temperatures depending on the required emitter sheet resistances) in a belt-furnace, a RTP, or a tube furnace. In Block 206, a SiNx antireflection (AR) layer 106 is positioned on the n+-type emitter. This process includes, but is not limited to, a pretreatment of ammonia plasma in-situ followed by the positioning of a low frequency (e.g., about 50 to 100 kHz) SiNx layer at about 400 to 450° C. in a direct plasma enhanced chemical vapor depostion (PECVD) SiNx reactor at about 750 to 800 A. Further, NH3 and SiH4 gases are present in the PECVD reactor and react to form the SiNx layer. Additional methods include direct PECVD (13.6 MHz) or remote PECVD (2.45 GHz) performed at temperatures between 350-450° C., for example. As a result, a large source of atomic hydrogen is created not only in the SiNx layer but also in a very thin Si layer underneath the SiNx layer. This is a result of high-energy ion bombardment, due to the low frequency SiNx positioning. In another embodiment, another material (e.g., MgF) can also be used to coat the SiNx antireflection (AR) layer to form a double layer AR coating.
In Block 208, aluminum (Al) contacts are screen-printed on the back-side of the p-silicon substrate. The aluminum contact can be positioned using, but not limited to, an Al paste which can be disposed using techniques such as, but not limited to, a process in which Al paste is screen printed on the back of the p-silicon substrate and dried at about 190 to 220° C. to form the Al contact layer on the back-side of the p-silicon substrate. The Al paste can include, but is not limited to FX53-038, and FX53-100.
In Block 210, Ag contacts, are positioned on portions of the SiNx layer using an Ag paste such as, but not limited to, PV168 paste (produced by DuPont) Ferro 3455 and Ferro 3460. The Ag contact can be positioned using techniques such as, but not limited to, a process in which Ag paste is screen-printed on the top-side of the SiNx AR layer. It should also be noted that photolithography and laser grooved techniques can be used to provide front metal contacts to silicon solar cells.
In Block 212, a rapid belt co-firing process can be used to treat the silicon solar cell structure 100. The co-firing process occurs after the positioning of the above described elements including, but not limited to, the p-silicon substrate, the n+-type emitter on the top-side of the p-silicon substrate, the SiNx AR layer on the top-side of the n+-type emitter, the Al contact on the back-side of the p-silicon substrate, the Ag contacts on the top-side of the SiNx AR layer.
The rapid co-firing process involves a simultaneous firing process. The co-firing process includes a temperature ramp up process. The ramp up process is performed at a ramp up rate of about 50 to 100° C./s, about 50 to 80° C./s, and about 50 to 60° C./s to reach the temperature of about 700 to 900° C., about 750 to 850° C., and about 740 to 780° C. Then, the co-firing process includes a temperature holding stage. In the temperature holding phase, the firing and hold time is about 1 to 5 seconds, about 1 to 3 seconds, and about 1 to 2 seconds, each at a temperature of about 700 to 900° C., about 750 to 850° C., and about 740 to 780° C. The shorter holding time results in maximum lifetime enhancement due to the higher retention of the hydrogen in the defect sites. Then, the co-firing process includes a ramp down stage. The ramp down stage includes reducing the temperature according to a ramp down rate of about 50 to 100° C./s, about 50 to 80° C./s, and about 50 to 60° C./s.
The rapid co-firing process is controlled, in part, by the belt speed and temperature setting in each zone of the belt furnace. The temperature in each zone or stage and the belt speed can each be set to achieve the temperature parameters described above. For example, the belt speed can be about 15 to 100 inches per minute (ipm), 50 to 100 ipm, 80 to 100 ipm and 100 to 120 ipm.
Although not intending to be bound by theory, the co-firing process described above, and the way in which the process is conducted, provide unexpected results. For example, the co-firing temperature and time exposed to the temperature allow for the simultaneous formation of front Ag contacts 110 and Al back-surface field 112 (p+ layer). Specifically, the co-firing steps result in the formation of a uniform back-surface field (BSF) 112 (or p+ layer) on the back-side of the co-fired solar cell structure 114. The co-firing process results in the etching of the SiNx by the glass frit contained in the Ag contacts to form a contact with the n+-type emitter layer, which allows n+-type emitter layer of higher sheet resistance values to be used (as described above). Further, the co-firing process produces a solar cell structure with unexpected characteristics such as, but not limited to, an increased defect passivation (in low quality silicon substrates), which results in increased JSC, increased VOC, and increased FF. The co-firing process also results in a more uniform Al BSF and a decreased BSRV. These above-described variables result in an increased solar cell bulk lifetime and increased solar cell efficiency, which are unexpected and are obtained using the ramp up stage, hold stage, and ramp down stage, as described above.
In Block 214, post belt co-firing treatment can be conducted. Following the co-firing event, the Ag contacts 110 can be covered with photoresist, for example, to enable the edge isolation of the cells with the dicing saw and/or a photolithography process followed by etching in, for example, a buffered oxide etchant (BOE) to remove the shunting path. The most common approach is the isolation of the cells using dicing of each silicon wafers, without the use of photolithography and etching thereafter, followed by a forming gas annealing process at about 350 to 450° C. for a specified time of about 15 to 20 minutes, for example.
In Block 302, the belt furnace temperature can be ramped up at a rate of about, for example, 50 to 100° C./s, about 50 to 80° C./s, and about 50 to 60° C./s, as described above. The rate can be achieved, at least in part, by the belt speed, the temperature of the belt furnace, and dimensions of the belt furnace.
In Block 304 the belt furnace can be held at a temperature of about, for example, 700 to 900° C., about 750 to 850° C., and about 740 to 780° C. for about 1 to 5 seconds, about 1 to 3 seconds, and about 1 to 2 seconds.
In Block 306 the belt furnace temperature can be ramped down at rate of, for example, about 50 to 100° C./s, about 50 to 80° C./s, and about 50 to 60° C./s.
Although not intending to be bound by theory, the co-firing process drives the atomic hydrogen from the SiNx layer into the Si underneath on the p-silicon substrate 102 to passivate the defects in it, thus producing an improved bulk minority carrier lifetime. Thus, for example, a 1 second firing of SiNx/Al enhances processing throughput, bulk lifetime, and cell efficiency without sacrificing the Al-BSF quality. The improved BSF results from fast ramp up rates, very short hold time at about 740° C., for example, and fast ramp down rates, thus producing improved bulk lifetime by enhancing the retention of hydrogen at defects. This improvement is characterized by an increased lifetime from about 1 μs to 20-125 μs, for example. The co-firing temperature allows for the simultaneous formation of Ag front side contacts and Al back-surface field (p+) and Al back contacts with the p-silicon substrate using Ag paste and Al paste, respectively. Further, this process produces a back surface recombination velocity (BSRV) value of about 200 to 900 cm/s and solar cell fill factors (FF) of about 0.75-0.80, due to good ohmic contacts.
Good ohmic contacts can be characterized, in part, by contact resistance (ρC), series resistance (RS) and junction leakage current density (JO2) values. The positioning of a low frequency Si3N4 film at about 400 to 450° C. provides surface passivation that lowers the surface recombination velocity (SRV) from about 250,000 cm/s to about 60,000 cm/s. Thus, resulting in a lower emitter saturation current (Joe) 400 to 90 pA/cm2 and increased open circuit voltage (Voc). For example, a co-firing event using PV168 Ag paste, providing good surface passivation gives about 1% higher cell efficiency with 1.96 mA/cm2 higher short circuit current density (Jsc).
Current production of screen-printed cells in production are fabricated on about a 30 to 45 Ω/sq. emitter, resulting in poor surface passivation and blue response. The present disclosure describes processes that includes a lightly-doped emitter including greater than about 55 Ω/sq, about 60 Ω/sq, about 65 Ω/sq, about 70 Ω/sq, about 75 Ω/sq, about 80 Ω/sq, about 85 Ω/sq, about 90 Ω/sq, about 95 Ω/sq, and about 100 Ω/sq emitter, with good surface passivation and thus, an enhanced short circuit current density (JSC) due to better blue response.
In one embodiment, an Ag paste (e.g., PV168 Ag paste that can be purchased from DuPont is used. The PV168 Ag paste is constructed such that it etches through the SiNX layer without excessively etching the Si (emitter) underneath under the conditions of the co-firing process described herein. This allows for better contacts with the n+-type emitter and thus providing a lower Ag crystallite concentration near the junction. In this regard, having no crystallite shunting the junction, results in higher open circuit voltage (VOC) and higher fill factor (FF), and thus a higher efficiency solar cell. After screen-printing, the organic constituents in the pastes are then burnt-out during a burn-out step at a specified belt speed at about 20 to 30 ipm in the belt-furnace with sample temperature reaching about 350 to 450° C. The treated p-silicon substrate is then co-fired at high belt speeds of about 80 to 120 ipm at about 740° C. to 800° C., which is less than the melting point of Ag.
For the purposes of illustration only, the co-fired silicon solar cell structure 100 is described with particular reference to the below-described fabrication method. The fabrication method is described from the point of view shown in
For clarity, some portions of the fabrication process are not included in
In general, the silicon solar cell structure 100 can be formed in a manner described in
Now having described silicon solar cell structure and its methods of fabrication in general, Examples 1 and 8 describe some embodiments of the silicon solar cell structure and uses thereof. While embodiments of the silicon solar cell structure and methods of fabrication are described in connection with Examples 1 and 8 and the corresponding text and figures, there is no intent to limit embodiments of the silicon solar cell structure and its methods of fabrication to these descriptions. On the contrary, the intent is to cover all alternatives, modifications, and equivalents included within the spirit and scope of embodiments of the present disclosure.
It should be noted that ratios, concentrations, amounts, dimensions, and other numerical data may be expressed herein in a range format. It is to be understood that such a range format is used for convenience and brevity, and thus, should be interpreted in a flexible manner to include not only the numerical values explicitly recited as the limits of the range, but also to include all the individual numerical values or sub-ranges encompassed within that range as if each numerical value and sub-range is explicitly recited. To illustrate, a range of “about 0.1% to about 5%” should be interpreted to include not only the explicitly recited range of about 0.1% to about 5%, but also include individual ranges (e.g., 1%, 2%, 3%, and 4%) and the sub-ranges (e.g., 0.5%, 1.1%, 2.2%, 3.3%, and 4.4%) within the indicated range.
It should be emphasized that the above-described embodiments and the following Examples of the present disclosure are merely possible examples of implementations, and are merely set forth for a clear understanding of the principles of the disclosure. Many variations and modifications may be made to the above-described embodiments. All such modifications and variations are intended to be included herein within the scope of this disclosure and protected by the following claims.
Now having described the embodiments of the nanostructure in general, Example 1 describes some embodiments of the nanostructure and uses thereof. The following is a non-limiting illustrative example of an embodiment of the present disclosure that is described in more detail in M. Hilali, J. W. Jeong and A. Rohatgi “A Study of Contact Resistance and Cell Performance of Selective-Emitter Screen-Printed Silicon Solar Cells Using a Self-Doping Paste”, in Proceedings of the 12th Workshop on Crystalline Silicon Solar Cell Materials and Process, Brekenridge, Colorado, pp. 282-285, 2002, which is incorporated herein by reference. This example is not intended to limit the scope of any embodiment of the present disclosure, but rather is intended to provide some experimental conditions and results. Therefore, one skilled in the art would understand that many experimental conditions can be modified, but it is intended that these modifications be within the scope of the embodiments of the present disclosure.
Introduction:
Screen-printed selective-emitter solar cells have been fabricated on FZ Si with efficiencies of about 16.5%. A self-doping paste was used on 100 Ω/sq. emitter to form the selective emitter. A much lower contact resistance was obtained for the self-doping paste PV168 compared to conventional pastes on 100 Ω/sq. Contact resistance for the PV168 self-doping paste on a 100 Ω/sq. was about 1.5 mΩ-cm2, which is comparable to that of a conventional paste on a 40 Ω/sq. emitter (about 0.96 mΩ-cm2). The co-fired selective-emitter cell using PV168 showed about 0.1% improvement in absolute efficiency over the 2-step fired conventional cell. Due to the lightly-doped emitter in the selective-emitter cell, the blue response of the IQE was better, contributing to 0.6 mA/cm2 improvement in the short-circuit current. The fill factors for both conventional and selective-emitter cells were very close, 0.776 and 0.775 respectively, indicating the effectiveness of the self-doping paste PV168. The selective-emitter cells had an unoptimized silicon nitride passivation. Improved oxide or nitride passivation is expected to increase the performance of the selective-emitter cells even further.
Experimental:
Two types of solar cells (4 cm2) were fabricated on p-type 0.6 Ω-cm 300-μm thick (100) float-zone (FZ) Si wafers: one involving conventional pastes (Table 1) and the other involving the self-doping paste PV168 (Table 2). In Table 1 below, the first cell is a conventional screen-printed cell with a 40-45 Ω/sq. homogeneous emitter using the commercially available paste A, which gave a 16.38% efficient cell. This cell was fabricated using a 2-step firing process: 850° C./2 min. for the Al BSF (back-surface field) and 752° C./40 sec. for the front contact firing. The next two cells in Table 1 had 100 Ω/sq. emitter and the front and back contacts were co-fired using screen-printed pastes A and B under identical conditions (900° C.) to those used for firing the self-doping paste PV168. The cells in Table 2 involve the self-doping paste on emitters of different sheet resistance values (100, 110, 120, 130, and 150 Ω/sq.). All the cells in this set were co-fired (front contact and back Al BSF) at 900° C. at the firing conditions optimized to give good ohmic contact on a 100 Ω/sq. emitter. After cleaning the wafers, the emitters for all the cells were diffused in a POCl3 tube furnace. After the removal of the phosphorus glass, a SiNx single layer antireflection coating (SLARC) was deposited with a refractive index of 1.98 and a thickness of 850 Å. The front-contact grid was screen-printed on top of the SiNx, and the front and back metal contacts were either co-fired, or a 2-step firing process was used as explained previously. All screen-printed contacts were fired in a belt-line furnace. In order to assess the quality of the contacts, contact resistance measurements were performed using the transfer length method (TLM) [4] on contact resistance test patterns screen-printed and fired simultaneously with the front-metal grid.
Results and Discussion:
Contact Resistance Analysis: In order to investigate the quality of the front metal contacts, contact resistance measurements were performed.
Cell Data and Analysis: Light and dark I-V measurements were performed to analyze the performance of the cells. As shown in Table 1, the conventional cell with 40 Ω/sq. homogeneous emitter has a fill factor of 0.776 and a reasonably good series resistance of 0.886 Ω-cm2 (cell 2-step-40). Cells A-100 and B-100 in Table 1 are fabricated with conventional pastes A and B on 100 Ω/sq. emitter. These cells showed a very high series resistance and low FFs of 0.5-0.6.
Selective-emitter cells in Table 2 and
Conclusion:
Contact resistance measurements show that the PV168 Ag paste can achieve reasonably low contact resistance on ≧100 Ω/sq. emitter with the appropriate firing conditions. Contact resistance values are comparable (<2 mΩ-cm2) to those of conventional Ag pastes on a 40 Ω/sq. emitter. Screen-printed selective-emitter cells with an efficiency of about 16.5% were achieved on FZ silicon with 0.6 mA/cm2 enhancement in JSC over the conventional 40 Ω/sq. cells. Fill factors were about 0.775 for both selective-emitter and conventional cells. Improved surface passivation and optimized grid design can increase the efficiency of selective-emitter cells significantly over other cells.
Now having described the embodiments of the nanostructure in general, Example 2 describes some embodiments of the nanostructure and uses thereof. The following is a non-limiting illustrative example of an embodiment of the present disclosure that is described in more detail in M. Hilali, A. Rohatgi, S. Asher, “Development of screen-printed silicon solar cells with high fill factors on 100 Ω/sq emtters,” IEEE Trans. Electron. Dev., 51, pp. 948-955 (2004), which is incorporated herein by reference. This example is not intended to limit the scope of any embodiment of the present disclosure, but rather is intended to provide an exemplary set of specific experimental conditions and results. Therefore, one skilled in the art would understand that many experimental conditions can be modified, but it is intended that these modifications be within the scope of the embodiments of the present disclosure.
Introduction:
High-quality screen-printed Ag contacts were achieved on high-sheet resistance emitters (100 Ω/sq.) by rapid alloying of PV168 Ag paste. Excellent specific contact resistance (about 1 mΩ-cm2) in conjunction with high fill factor (0.775) were obtained on 100 Ω/sq. emitters by a 900° C. spike firing of PV168 paste in a belt furnace. The combination of the alloying characteristics of the PV168 Ag paste and optimized single-step rapid low-thermal budget firing resulted in a cost-effective manufacturable process for high-efficiency Si solar cells. In addition, the co-fired 100 Ω/sq. cell showed a slight improvement over the 2-step fired conventional 45 Ω/sq.-emitter cell. Light-doping in the 100 Ω/sq.-emitter cell resulted in better blue response compared to the conventional cell, contributing to 0.7 mA/cm2 improvement in the short-circuit current density.
Experimental:
Screen-printed n+-p-p+ solar cells (4 cm2) were fabricated on single crystal Si using different Ag pastes and firing conditions on 45 and 100 Ω/sq. emitters. P-type, 0.6 Ω-cm, 300-μm thick (100) float-zone (FZ) substrates were used for all the experiments. Silicon wafers were first RCA cleaned followed by POCl3 diffusion to form the n+-emitter. After the phosphorus-glass removal and another, clean PECVD Si3N4 antireflection coating (850 Å with an index of 1.98) was deposited on the emitter. Next, an Al paste was screen-printed on the backside and dried at 200° C. The Ag grid was then screen-printed on top of the Si3N4 film and Ag and Al contacts were co-fired (single firing step) in a lamp-heated 3-zone belt-line furnace. The cells were then isolated using a dicing saw and annealed in forming gas at 400° C. for about 15 min. In addition to the PV168 Ag paste from DuPont, two other commercially available Ag pastes (A and B) were investigated for comparison. Conventional cells with 45 Ω/sq. emitter were also fabricated using a two-step firing process involving Al firing at a set temperature of 850° C. for 2 min. followed by Ag grid firing in a commercial belt-furnace. In order to understand and compare the quality of contacts for different pastes on the low and high-sheet resistance emitters, I-V, IQE, and Suns-Voc measurements [8] were performed to extract cell parameters and compare short- and long-wavelength response. In addition, SIMS measurements were performed on selected samples to determine the Ag and P doping profiles in the silicon directly underneath the Ag grid using a CAMECA IMS-300 ion microscope. The primary ion beam covered an area of 150 μm×150 μm with a 60-μm aperture, which is restricted to a 20 μm diameter SIMS analysis circular area due to the immersion lens system. The samples were bombarded with 5.5 KeV oxygen primary ions for detecting Ag while 14.5 KeV cesium primary ions were used for detecting P. Finally, the contact resistance measurements were performed using the TLM patterns [9], which were printed during the cell fabrication.
Results and Discussion:
Determination of the 45 and 100 Ω/sq. Emitter Doping Profiles:
A Study of Conventional Ag Pastes and Firing Conditions on the Performance of Si cells with Low- and High-Sheet-Resistance Emitters: Before investigating the special PV168 paste from DuPont, two commercial Ag pastes were studied. Currently no cell manufacturer uses high-sheet-resistance emitters (≧60 Ω/sq.) because it is difficult to achieve good screen-printed ohmic contact on them using conventional Ag pastes. This is demonstrated in Table 3, where a commercial Ag paste B gave a high FF of 0.785 on a 45 Ω/sq. emitter but the FF value decreased to 0.48 on 100 Ω/sq. emitter for the identical co-firing condition of 850° C. and 80 ipm belt speed. Similarly, optimum firing conditions for a second commercial paste A on the 45 Ω/sq. emitter were found to be 435/585/750° C. for the three zones in conjunction with 15 ipm belt speed. Table 3 shows that using these conditions, paste A gave better results than paste B on the 100 Ω/sq. emitter but the FF (0.70) and Voc (612 mV) were again much lower compared to the 45 Ω/sq emitter cell (FF=0.79, Voc=622 mV).
In order to understand the significant difference in efficiency and FF for the two sheet resistances, specific contact resistance (ρc) measurements were performed by the TLM method. Specific contact resistance should be below 2 mΩ-cm2.
Optimization of PV168 Ag Paste Firing to Achieve Good Contacts on 100 Ω/sq. Emitter: Paste composition and firing cycle can significantly influence series resistance, junction leakage, and FF. The previous section showed that commercial pastes A and B failed on 100 Ω/sq. emitter. The following sections describe how the impact of set temperature and belt speed lead to the firing conditions that can produce good contacts to 100 Ω/sq. emitter using the PV168 Ag paste.
Effect of Firing Temperature on the Performance of Cells made with PV168 Ag Paste: First the effect of firing temperature on the FF of the cells is examined using high belt speed (≧80 ipm), referred to as “spike firing” in this example.
Effect of Belt Speed on the Performance of Cells made with PV168 Ag Paste: Since the combination of set temperature and belt speed dictate the thermal budget of the sample, the role of belt speed on the contact formation was also examined.
SIMS Analysis of PV168 Ag Contact to 100 Ω/sq. Emitter: SIMS measurements were performed on Si underneath the Ag contacts to gain a better understanding of the success of PV168 screen-printed contacts on 100 Ω/sq. emitters. Ag metal was etched off prior to the SIMS measurements. SIMS data in
It is clear from
Comparison of PV168 Ag Paste with the Other Commercial Ag Pastes at Firing Temperatures Around the Ag—Si Eutectic: The last section demonstrated that the PV168 Ag paste is capable of producing high FFs and cell efficiencies on 100 Ω/sq. emitters, provided spike firing is performed at a set temperature above the Ag—Si eutectic temperature, resulting in sample temperature of about 835° C. for a very short time. PV168 is made by DuPont using a proprietary technology involving a somewhat different Ag particle morphology, content, and frit composition. In order to support that the PV168 is different and superior to conventional pastes for making good contacts to 100 Ω/sq. emitter, two commercial Ag pastes A and B, along with the PV168, were used to fabricate cells on the 100 Ω/sq. emitter using identical firing condition (900° C./80 ipm spike co-firing). Recall that this condition leads to an actual sample temperature of about 835° C. Cell data is shown in Table 4 along with a 45 Ω/sq. emitter cell made with conventional paste A.
In order to improve the basic understanding further, specific contact resistance measurements were performed.
Internal Quantum Efficiency (IQE) Analysis to Support the Benefit of the Lightly-Doped Screen-Printed Emitter Cell Fabricated by a Manufacturable Spike Co-Firing Process:
Significant Enhancement in the Performance of 100 Ω/sq.-Emitter Cell with High-Quality Front-Surface Passivation: In the previous sections, it was demonstrated that screen-printed cells on 100 Ω/sq. emitter can be achieve with good ohmic contact, fill factor, and 0.7 mA/cm2 higher JSC. However, the efficiency improvement over the conventional 45 Ω/sq. emitter was about 0.1% absolute. This was due to somewhat lower Voc of the 100 Ω/sq.-emitter cell because of the lower quality surface passivation. In order to enhance the understanding of this aspect and increase the efficiency gap between the 100 and 45 Ω/sq.-emitter cells, additional device modeling and IQE analyses were performed to quantify the front-surface recombination velocity. In addition, 100 Ω/sq. emitter cells were fabricated with low-frequency deposition of Si3N4 film which gives superior passivation to the high-frequency Si3N4 film deposited by our process schemes.
Matching the measured and calculated short-wavelength IQE gave an effective FSRV of 60,000 cm/s for the low-frequency Si3N4 passivated 100 Ω/sq. emitter. Similarly, IQE matching gave an effective FSRV of 250,000 cm/s and 200,000 cm/s for high-frequency Si3N4 passivated 100 Ω/sq. emitter and 45 Ω/sq. emitter cells, respectively. Furthermore, model calculations in
Conclusion:
Screen-printed solar cells are generally made on 30-60 Ω/sq., due to problems with contacts on high-sheet-resistance emitters. This results in appreciable loss in performance due to heavy-doping effects and high FSRV. This example demonstrates that it is possible to obtain high fill factors on 100 Ω/sq. emitters with a manufacturable single-printing and firing scheme using PV168 Ag paste from DuPont. In this study, fundamental understanding and process optimization involving rapid firing at or above the Ag—Si eutectic temperature resulted in high fill factors of ≧0.775. Two other commercial pastes gave poor contacts on 100 Ω/sq. emitter, when fired using the same conditions, due to excessive Ag penetration near the junction. This is attributed to excessive Si etching by the frit in the pastes at or above the eutectic temperature. Below the eutectic temperature when there is no excessive Ag penetration, high contact resistance becomes the problem. The IQE analysis of a conventional cell on a 45 Ω/sq emitter and our 100 Ω/sq.-emitter cell showed an appreciable improvement in the blue response due to the lightly doped emitter. The rapid co-firing process developed for the PV168 also gave good BSF at no additional cost. Finally it has been shown that an efficiency enhancement of about 0.75% is achievable if the front-surface passivation is improved in the high-sheet resistance 100 l/sq. emitter, resulting in efficiencies in excess of 17%.
Now having described the embodiments of the nanostructure in general, Example 3 describes some embodiments of the nanostructure and uses thereof. The following is a non-limiting illustrative example of an embodiment of the present disclosure that is described in more detail in M. Hilali, V. Meemongkolkiat, and A. Rohatgi, “Advances in Screen-Printed High-Sheet-Resistance Emitter Cells”, Proceedings of the 13th Workshop on Crystalline Silicon Solar Cell Materials and Process, Vail-Colorado, 211-214, 2003, which is incorporated herein by reference. This example is not intended to limit the scope of any embodiment of the present disclosure, but rather is intended to provide some experimental conditions and results. Therefore, one skilled in the art would understand that many experimental conditions can be modified, but it is intended that these modifications be within the scope of the embodiments of the present disclosure.
Introduction:
A combination of paste and firing conditions have been developed to achieve good ohmic contacts to 100 Ω/sq. emitters using screen-printing technology. Different dielectric front-surface passivating layers were investigated to take full advantage of the lightly-doped emitter for screen-printed cells. Using an optimum passivation layer and a simple co-firing process in a belt-furnace an absolute efficiency of 17.48% was achieved on untextured 0.6 Ω-cm FZ Si with an open-circuit voltage (Voc) of 648 mV. The PV168 Ag paste in conjunction with optimum co-firing cycle resulted in a low series resistance of 0.85 Ω-cm2 and a high fill factor of 0.782 on a 100 Ω/sq. emitter. Higher temperature firing to ensure Ag—Si alloying also reduced the shading losses by shrinking the gridline by about 27%.
Experimental:
Silicon solar cells were fabricated on p-type 0.6 Ω-cm FZ Si in order to enhance the influence of the emitter on Voc Samples were cleaned and then diffused in a POCl3 tube furnace to form 100 Ω/sq. emitters with a junction depth of about 0.28 μm. In order to achieve good surface passivation, the samples were coated with different dielectrics including (i) high-frequency (HF) PECVD SiNx, (ii) low-frequency (LF) PECVD SiNx, (iii) oxide/HF-PECVD SiNx stack, and (iv) oxide/LF-PECVD SiNx stack. In the case of stack passivation, about 80 Å rapid-thermal oxide (RTO) was grown prior to SiNx deposition. Al was screen-printed on the back and dried at about 200° C. The Ag metal grid was screen-printed on SiNx using PV168 paste from DuPont. All the cells were then co-fired in a lamp-heated belt furnace at a set temperature about ≧900° C. The cells were then isolated using a dicing saw followed by 400° C. forming-gas-anneal (FGA) for about 15 min. Solar cells were characterized by IV measurements and spectral response. In addition, Photoconductance Decay (PCD) technique was used to obtain Joe values for the 100 Ω/sq. emitter with different dielectrics after firing in order to decouple the impact of base and emitter region on Voc and cell performance.
Results and Discussion:
Surface Passivation of 100 Ω/sq. Emitter Due to Different Dielectrics:
In order to compare the effect of each passivating dielectric on the cell performance, IV and IQE measurements were performed.
Reduction in Shading and Metal Resistivity Compared to Conventional Paste and Firing:
High Efficiency Screen-Printed Cells on 100 Ω/sq. Emitter with Optimized Front-Surface Passivation and Grid Design: In addition to the optimization of the surface passivation, grid design was also optimized for the 100 Ω/sq. emitter. Table 6 shows the improvement in cell performance due to better front-surface passivation along with the improvement due to optimal grid design. On the 100 Ω/sq. emitter, a high FF of 0.782 was achieved for the LF-SiNx passivating layer and 0.777 for the stack passivation. The LF-SiNx passivated cell had a Voc of 643 mV, which is significantly higher than the HF-SiNx passivated cell with a Voc of 629 mV. This enhancement in Voc is in good agreement with the Joe measurements. In the case of the bad passivation using HF-SiNx, the Voc for the 45 Ω/sq. emitter was 635.8 mV, which is greater than that for the 100 Ω/sq.-emitter cell (629.3 mV). These results agree with the model calculations in
Conclusion:
In this example, high quality screen-printed contacts were achieved on 100 Ω/sq. emitters using PV168 Ag paste and rapid co-firing in the belt furnace. Different emitter passivating dielectrics were investigated. Low-frequency SiNx and the stack passivation with RTO/SiNx were found to be very effective, resulting in a Voc of 648 mV. Using this simple and fast contact co-firing scheme using the PV168 paste, FFs of 0.793 were achieved on 45 Ω/sq. emitters and 0.782 on 100 Ω/sq emitters. In addition, the alloyed PV168 paste showed about 27% shrinkage after firing, resulting in gridline width of 74 μm. The 100 Ω/sq. emitter also showed an appreciable improvement in the blue-response over the conventional 45 Ω/sq. emitter, resulting in 0.2% improvement in absolute efficiency in spite of slightly lower FF. Somewhat lower emitter sheet resistance (80-100 Ω/sq.) are now being investigated to recover the FF loss without sacrificing the blue response.
Now having described the embodiments of the nanostructure in general, Example 4 describes some embodiments of the nanostructure and uses thereof. The following is a non-limiting illustrative example of an embodiment of the present disclosure that is described in more detail in A. Upadhyaya, K. Nakayashiki, M. Hilali, A. Rohatgi, J. Kalejs, B. Bathey, K. Matthei “RECORD HIGH EFFICIENCY SCREEN-PRINTED BELT CO-FIRED CELLS ON EFG Si RIBBON (16.1%) AND HEM mc-Si (16.9%)”), in Proceedings of the 13th Workshop on Crystalline Silicon Solar Cell Materials and Process, Vail, Colorado, pp. 215-218, 2003, which is incorporated herein by reference. This example is not intended to limit the scope of any embodiment of the present disclosure, but rather is intended to provide some experimental conditions and results. Therefore, one skilled in the art would understand that many experimental conditions can be modified, but it is intended that these modifications be within the scope of the embodiments of the present disclosure.
Introduction:
Record high efficiency screen-printed solar cells have been fabricated on EFG Si ribbon as well as on HEM mc-Si. These cells were fabricated using a process involving POCl3 diffusion for emitter and rapid co-firing of Ag grid and Al-BSF in a belt furnace. This resulted in very effective defect passivation and good contacts with low series resistance and junction leakage. Average bulk lifetimes in the range of 80-100 μs were achieved after cell processing along with Fill Factors of about 0.78. The EFG Si cells were fabricated on a 95±5 Ω/sq. emitter while the HEM mc-Si cells were fabricated on 45±5 Ω/sq. emitter. A combination of good ohmic contacts, effective back surface field, and high bulk lifetimes resulted in record high 16.1% efficient screen-printed cells on EFG Si and 16.9% on HEM mc-Si.
Discussion:
High Efficiency Screen-printed Selective Emitter Cells on EFG Silicon: EFG Si ribbon is a promising material for low-cost and high-efficiency solar cells because it can eliminate the need for mechanical sawing and damage etching. As a result, there is no kerf loss. However, like most low-cost mc-Si materials, the EFG material also has high impurity concentrations and crystalline defect density. The as-grown minority-carrier lifetime in EFG is quite low, normally less than 3 μs, which is not sufficient for high efficiency cells. It is essential to enhance the bulk minority-carrier lifetime of EFG during cell fabrication in order to obtain high efficiency cells (>15%). This example reports on the implementation of a fast co-firing process for front and back contacts which significantly enhances the bulk lifetime in EFG and simultaneously produces high quality screen-printed contacts on high-sheet-resistance (95±5 Ω/sq.) emitter. The process is very simple, manufacturable, and capable of producing high efficiency screen-printed cells.
High Efficiency Screen-printed Cells on HEM mc-Si: Like EFG Si ribbon, HEM mc-Si grown by a cast technique is also a promising low-cost material for cost effective PV. HEM is widely used in industry with commercial cell efficiency in the range of 13.5-15.0%. Efficiencies as high as 16.6% have been reported on 156 cm2 cast mc-Si material using screen-printing, single layer SiNx AR coating, isotropic texturing and selective emitter. [5] In this example, 4 cm2 16.9% screen-printed, belt co-fired cells with single layer SiNx AR coating are discussed. These cells do not have any texturing, double layer AR coating, or selective emitter. The process is simple and manufactuable, involving POCl3 diffusion to form 45 Ω/sq. emitter, followed by SiNx AR coating on the front, Ag grid printing on the front using commercial paste from DuPont Corp., Al screen-printing on the back, and a rapid firing in the belt furnace. Finally, cells are annealed at 400° C./15 min in forming gas.
Hydrogenation from low frequency PECDV SiNx played an important role in efficiency enhancement. This is reflected in the long wavelength IQE response of the HEM cells with high frequency (13.6 MHz) and low frequency (50 kHz) PECVD SiNx. Low frequency SiNx significantly improves the long wavelength response of the cells. This is attributed at least in part to the effective hydrogenation of defects due to rapid firing in conjunction with the use of low frequency SiNx. PCD lifetime measurements showed that the 20-40 μs as-grown lifetime in the HEM mc-Si increased to about 100 μs after the cell processing.
Conclusions:
Record high efficiency screen-printed solar cells have been achieved on EFG Si (16.1%) and HEM mc-Si (16.9%). This is the result of appropriate rapid co-firing of Ag grid, Al-BSF, and SiNx AR coating which results in very effective defect hydrogenation, good back surface field, and high quality screen-printed contacts. Bulk lifetimes approaching 100 μs were achieved with fill factors of about 0.78.
Now having described the embodiments of the nanostructure in general, Example 5 describes some embodiments of the nanostructure and uses thereof. The following is a non-limiting illustrative example of an embodiment of the present disclosure that is described in more detail in K. Nakayashiki, V. Meemongkolkiat, and A. Rohatgi “Record High Efficiency Solar Cells on EFG (18.2%) and String Ribbon (17.8%) Silicon by rapid thermal processing,” in Proceedings of the 13th Workshop on Crystalline Silicon Solar Cell Materials and Process, Colorado, pp. 219-223, 2003, which is incorporated herein by reference. This example is not intended to limit the scope of any embodiment of the present disclosure, but rather is intended to provide some experimental conditions and results. Therefore, one skilled in the art would understand that many experimental conditions can be modified, but it is intended that these modifications be within the scope of the embodiments of the present disclosure.
Introduction:
Record high silicon ribbon solar cell efficiencies of 18.2% and 17.8% were achieved on EFG and String Ribbon silicon, respectively. These cells were fabricated with photolithography front contacts and double layer antireflection coating. Improved understanding and hydrogenation of defects in these promising low-cost ribbon materials contributed to the significant increase in bulk lifetime from 1-5 μs to as high as 90-100 μs during cell processing. It was found that SiNx-induced defect hydrogenation in these ribbon materials takes place within one second at peak temperatures of 740-750° C. In fact, bulk lifetime decreases with the increase in annealing temperature above 750° C. or annealing time in excess of one second due to the enhanced dissociation of the hydrogenated defects coupled with the decrease in hydrogen supply from the SiNx film.
Experimental:
String Ribbon and EFG samples used in this study had an average thickness of 300 μm and resistivity of 3 Ωcm. P-type EFG ribbon was grown at ASE Americas while String Ribbon was grown at Evergreen Solar, respectively. The phosphorus diffusion was performed using a liquid POCl3 source in a tube furnace to obtain an 85 Ω/cm n+-emitter. SiNx film with a thickness of 78 nm and index of 2.0 was deposited in a commercial low-frequency PECVD reactor on the phosphorus-diffused emitter. Aluminum paste (Ferro FX 53-038) was screen-printed on the back surface of the wafers. The SiNx on the front and the Al on the rear were fired simultaneously in an RTP chamber to enhance hydrogen passivation. The ramp-up and cooling rates were set to greater than 50° C./sec to achieve a uniform Al-BSF layer and provide good hydrogenation. The firing temperatures were varied from 700 to 800° C.i,ii and firing time from 1 to 60 seconds to understand and optimize the hydrogenation of defects and quality of BSF simultaneously. The front metal grid was defined by a photolithography process involving etching of the SiNx film in BOE (buffered oxide etchant). Front contacts were then formed by evaporating 60 nm Ti, 40 nm Pd and 60 nm Ag followed by a lift-off process. Additional Ag was plated to increase the grid thickness to about 8 μm and reduce the series resistance to about 0.5 Ω-cm2. Nine 4 cm2 cells were fabricated on each wafer and isolated using a dicing saw followed by a 30 min forming gas anneal at 400° C. In order to minimize the reflectance, the SiNx thickness was adjusted to 67.8 nm and capped with 99.5 nm magnesium fluoride film by vacuum evaporation to form a DLAR, which reduced the integrated front surface reflectance to about 6.19%.
Results and Discussion:
where t is the annealing time, v is attempt frequency (1013 to 1014/s), Ed is the activation energy for the reactivation process and T is the temperature. Calculations reveal that 63% of passivated metal defects can re-activated in just 0.055 second at 740° C. assuming v=5×1013/s and Ed=2.5 eV. In contrast, it should take 53 second to re-activate 63% of the hydrogenated dislocations, using an activation energy of about 3.1 eV and v=5×1013/s. In order to maximize the bulk lifetime, the dehydrogenation process should be quenched after the defects are saturated with hydrogen. It has been shown that the Si—H concentration in the SiNx film decreases rapidly within 20 seconds down to the detection limit at temperatures above 700° C., while the N—H concentration decreases rapidly followed by a slower decrease. This suggests that the supply of hydrogen from the SiNx film or the hydrogen flux into the silicon decreases rapidly within the first 20 seconds and then decrease slowly. However, the activation of defect continues with time and its rate increases with temperature (equation 1). This explains the observed decrease in bulk lifetime with the increase in firing time or temperature (
Hydrogen diffusion into a defective silicon can be influenced by defects type and concentration, in addition to temperature, doping density and conductivity type. For example, it has been shown that hydrogen can diffuse rapidly via dislocations. On the other hand, the hindrances to hydrogen diffusion have been reported in single crystalline silicon at low temperature. In p-type Si, most of the hydrogen diffuses by rapid interstitial motion at high temperature over 500° C., without any retardation by either acceptor trapping or molecule formation. Van Weirengen and Warmoltz measured the interstitial hydrogen diffusivity in the temperature range of 1090 to 1200° C. given by
However, the experimental results on diffusivity measurements at lower temperature have given smaller values than the extrapolated VWW data. The extrapolation of the VWW data yields a diffusivity of 4.0582×10−5 cm2/s at 750° C. Substantial improvement in the bulk lifetime (85 to 95 μs) coupled with significant increases in the long IQE response for the EFG and String Ribbon cells after one second firing indicates that the defect passivation by hydrogen is accomplished throughout entire 300 μm thick wafers within one second. A Simple x=(Dt)1/2 approximation gives 9×10−4 cm2/s, assuming that hydrogen diffuses through a 300 μm thick wafer in 1 second at 750° C. This is a factor of twenty times higher than the extrapolated interstitial diffusivity from VWW data. Using a 5 second thermal budget above 500° C. associated with the ramp-up and ramp-down gives a diffusivity of 1.8×10−4 cm2/s, which is still 4 times higher than the VWW's diffusivity at 750° C. This suggests that effective hydrogen diffusion may be enhanced by mechanisms other than interstitial diffusion. Ribbon materials contain high dislocation concentration (105 to 106/cm2), which could accelerate the movement of hydrogen through the bulk. It was shown by Dubei that hydrogen diffuses more rapidly along the dislocations than grain boundaries or intragrain single crystal regions. Furthermore, it has been suggested that the dislocations and vacancies can increase the hydrogen solubility by dissociating H2 molecules into atomic hydrogen. Ribbon materials have high concentration of vacancies, which are introduced into the bulk during the ribbon growth or cell processing steps such as Al-BSF formation and SiNx deposition. It has been suggested that vacancies can enhance hydrogen diffusion and defect passivation by providing additional driving force for diffusion or by dissociating H2 molecules. In addition, light-enhanced hydrogen release from Si—H bonds or strain-enhanced H2 molecule dissociation has been suggested, which could increase the hydrogen diffusion in our experiment since intense illumination is used in RTP to heat the wafers and stress is introduced during the Al-BSF process. Sopori et. al. used computer simulation to show that hydrogen can diffuse through a 100-μm thick wafer after a 10-second annealing of SiNx coated wafers at 800° C. in an RTP chamber. Thus, very rapid and effective hydrogenation of defects observed in ribbon materials seems to be the result of multiple effects that tend to enhance hydrogen diffusion or concentration.
Based on the above understanding and experimental data, optimum hydrogenation conditions (about 750° C./Is) were used (
In conclusion, ribbon silicon solar cells with efficiency of 18.2% on EFG and 17.8% on String Ribbon were achieved, supporting the potential of ribbon materials. It was found that effective defect hydrogenation in ribbon materials takes place within 1 second at 740 to 750° C. Bulk lifetimes approaching 100 μs were achieved. The bulk lifetime was found to decrease with the increase in annealing temperature above 750° C. and annealing time over 1 second due to the decrease in hydrogen supply from the SiNx film and continued dissociation of the hydrogenated defects. These cell results with photolithography contacts and double layer AR coating suggest that 16-17% efficient manufacturable ribbon cells can be realized with screen printed Ag contacts and single layer SiNx AR coating.
Now having described the embodiments of the nanostructure in general, Example 6 describes some embodiments of the nanostructure and uses thereof. The following is a non-limiting illustrative example of an embodiment of the present disclosure that is described in more detail in D. S. Kim, *A. M. Gabor, V. Yelundur, A. D. Upadhyaya, V. Meemongkolkiat, A. Rohatgi “STRING RIBBON SILICON SOLAR CELLS WITH 17.8% EFFICIENCY”, Proceedings 3rd World Conference on Photovoltaic Energy Conversion, Vol. B, pp. 1293-1296, May 11-18, 2003, which is incorporated herein by reference. This example is not intended to limit the scope of any embodiment of the present disclosure, but rather is intended to provide some experimental conditions and results. Therefore, one skilled in the art would understand that many experimental conditions can be modified, but it is intended that these modifications be within the scope of the embodiments of the present disclosure.
Introduction:
4 cm2 cells on String Ribbon Si wafers with efficiencies of 17.8% using a combination of laboratory and industrial processes were fabricated. These are the most efficient String Ribbon devices made to date, demonstrating the high quality of the processed silicon and the future potential for industrial String Ribbon cells. Co-firing PECVD (Plasma Enhanced Chemical Vapor Deposition) silicon nitride (SiNx) and Al was used to boost the minority carrier lifetime of bulk Si. Photolithography front contacts were used to achieve low shading losses and low contact resistance with a good blue response. The firing temperature and time were studied with respect to the trade-off between hydrogen retention and aluminum back surface field (Al-BSF) formation. Bulk defect hydrogenation and deep Al-BSF formation took place in a very short time (about 1 sec) at temperatures higher than 740° C.
Experimental:
Standard String Ribbon wafers were pulled from the Evergreen production line with an average thickness of 300 μm and a resistivity of 3 Ωcm. P-type, 300 μm thick, 2 Ωcm FZ wafers were also used in this study. The String Ribbon silicon wafers were cut to an optimum size for tube diffusion and cleaned/etched in cleaning solutions of 2:1:1H2O:H2O2:H2SO4, 15:5:2 HNO3: CH3COOH:HF, 2:1:1H2O:H2O2:HCl. The phosphorus diffusion was performed at 870° C. for 32 minutes using a liquid POCl3 source in a tube furnace to obtain an 85 Ω/cm n+ emitter. The SiNx films were deposited by PECVD at Evergreen Solar on the phosphorus-diffused emitters. Aluminum paste (Ferro FX 53-038) was screen-printed on the back surface of the wafers. The SiNx on the front and the Al film on the rear were fired simultaneously in an RTP chamber to enhance hydrogen passivation. The ramp-up and cooling rates were set to >50° C./sec for all the firing processes to achieve a uniform Al-BSF layer [5]. The firing temperatures were varied from 700 to 800° C. for 1 second and 60 seconds in order to study the effects of firing temperature and time on the cell performance. The range of firing temperatures used in this study was determined from optimization of screen-printed String Ribbon solar cells, also being presented at this conference [6]. The processing temperature was measured by a thermocouple in physical contact with the front side of wafer. The front metal grid was defined by a photolithography process followed by removal of the SiNx film in the grid region by etching in HF. Front contacts were formed by evaporating 60 nm Ti, 40 nm Pd and 60 nm Ag followed by a lift-off procedure. Additional Ag was plated to increase grid thickness and reduce series resistance. Nine 4 cm2 cells on each wafer were isolated using a dicing saw and then annealed in forming gas (4% hydrogen in nitrogen) for 30 min. Emitter saturation current density (Joe) was measured by Sinton's PCD method. Optical properties of the SiNx were characterized using a spectroscopic ellipsometer (J.A. Woollam Co., Inc.) to determine the optimal design of a double layer antireflection coating. In order to minimize reflectance, the SiNx thickness was adjusted to 67.8 nm by etching the film in HF. Magnesium fluoride (99.5 nm) was coated on the SiNx by vacuum evaporation to form a double antireflection coating layer. Long wavelength internal quantum efficiency (IQE) measurements were performed to characterize the Al-BSF of a finished solar cell. The thickness of the screen-printed aluminum was measured to be about 25 μm by profilometry (Alpha-Step 200) after drying the screen-printed Al. The thickness of the Al-BSF was measured by cross-section Scanning Electron Microscopy (SEM) after etching the heavily p-doped region selectively in 1:3:6 HF:HNO3:CH3COOH for 10 seconds [7]. In order to study just the quality of Al-BSF and its impact on the cell performance, photolithography cells were fabricated on FZ wafers with high quality rapid thermal oxide (RTO) on the emitter capped with ZnS/MgF2 double layers.
Results and Discussion:
The highest efficiencies in this study are attributed to improvement in bulk lifetime after firing, as shown in
Extrapolation of the diffusivity yields a diffusivity of 3.846×10−5 cm2/s at 740° C. In p-type Si, most of the hydrogen diffuses by rapid interstitial motion at high temperature over 500° C. without any retardation by either acceptor trapping or molecule formation [9]. B. L. Sopori observed that hydrogen can diffuse through the entire wafer after a 10-second annealing of SiNx coated wafers at 800° C. in an RTP chamber [10]. The much higher estimated diffusivity than the extrapolated value suggests that hydrogen diffusion may be enhanced by aluminum alloying induced vacancies [11].
In order to study the effects of firing temperature and time on the properties of the Al-BSF, photolithography cells were fabricated on 2 Ωcm FZ wafers with rapid thermal oxide for emitter passivation. For all the firing conditions, the measured Joe was 2×10−13 A/cm2 without the metal contacts to the emitter. Therefore, the dependence of open circuit voltages on the firing temperature and time in
The IQE response of the cells in the range of 750-1,000 nm (
The Al-BSF quality is determined by the junction depth, the doping concentration of the BSF layer, and the uniformity of the p-p+ junction. The junction depth can be calculated from the Al—Si phase diagram using the following equation [12],
where tAl, ρAl, and ρSi represent the as-deposited Al thickness, the densities of Al and Si respectively, F(T) is the Si atomic weight percentage of the molten phase at the peak alloying temperature, and F(TO) is the Si atomic weight percentage at the eutectic temperature (about 12%). The doping concentration of Al in the BSF is determined by the solid solubility of Al at each temperature as the BSF layer grows from the molten phase during the cooling cycle.
Cross-section SEM images of the layers in the back were taken to measure uniformity and Al-BSF thicknesses after firing.
Conclusion:
The industrial processing steps of SiN. AR coating and screen printed Al-BSF have been combined with the laboratory processes for double layer AR coating and photolithography contacts to produce record high 17.8% efficient String Ribbon solar cells.
The bulk lifetime in String Ribbon improved significantly after phosphorus diffusion followed by firing of SiNx and Al in RTP. Only 1 second firing at 740° C. increased the bulk lifetime to 80 μs from 4.5 μs, suggesting that release of hydrogen from the defects is the limiting factor for maximum hydrogenation. About 8 μm thick Al-BSF was formed with 1 second firing at temperatures greater than 740° C. and a ramp-up rate of over 50° C./sec. SEM analysis confirmed that the measured Al-BSF thickness was greater than the calculated thickness at firing temperatures lower than 800° C., suggesting that thermodynamic equilibrium may not be achieved during short and rapid firing.
Now having described the embodiments of the nanostructure in general, Example 7 describes some embodiments of the nanostructure and uses thereof. The following is a non-limiting illustrative example of an embodiment of the present disclosure that is described in more detail in K. Nakayashiki, V. Meemongkolkiat, and A. Rohatgi “High Efficiency Screen-printed EFG Si Solar Cells Through Rapid Thermal Processing-induced Bulk Lifetime Enhancement,” Submitted, Progress in Photovoltaics 2004, which is incorporated herein by reference. This example is not intended to limit the scope of any embodiment of the present disclosure, but rather is intended to provide some experimental conditions and results. Therefore, one skilled in the art would understand that many experimental conditions can be modified, but it is intended that these modifications be within the scope of the embodiments of the present disclosure.
Introduction:
This example shows that one second (1 s) firing of Si solar cells with screen-printed Al on the back and SiNx anti-reflection coating on the front can produce a high quality Al-doped back surface field (Al-BSF) and can significantly enhance SiNx-induced defect hydrogenation in the bulk Si. Open-circuit voltage, internal quantum efficiency measurements, and cross-sectional scanning electron microscopy pictures on float-zone silicon cells revealed that 1 s firing in rapid thermal processing at 750° C. produces just as good a BSF as 60 s firing, indicating that the quality of Al-BSF region is not a strong function of RTP firing time at 750° C. Analysis of edge-defined film-fed grown (EFG) Si cells showed that short term firing is much more effective in improving the hydrogen passivation of bulk defects in EFG Si. Average minority carrier lifetime in EFG wafers improved from about 3 μs to about 33 μs by 60 μs firing but reached as high as 95 μs due to 1 s firing, resulting in 15.6% efficient screen-printed cells on EFG Si.
Experimental:
In this study, simple n+-p-p+ solar cells were fabricated with screen-printed Al on the back and screen-printed Ag grid on the front. Each wafer had nine 4 cm2 (2×2 cm) solar cells, which were isolated with a dicing saw before testing. The EFG Si had a resistivity of 2 to 3 Ω-cm and a thickness of about 300 μm while the FZ wafers were 2.4 Ω-cm with a thickness of about 300 μm. After the initial etching and cleaning, the wafers were phosphorus diffused in a POCl3 furnace to obtain an emitter sheet resistance of 45±5 Ω/sq. A SiNx AR coating with a thickness of 750±50 Å and refraction index of 2.0 was deposited in a low-frequency PECVD reactor with N2 pretreatment. After the visual inspection, the Al paste (Ferro FX 53-038) was screen-printed on the back and fired in a RTP system (AG Associates 610) at 750° C. (firing step #1) with holding time-periods of 1, 10, 30, and 60 s in conjunction with a temperature ramp-up rate of about 100° C./s and ramp-down rate of about 50° C./s.7 The temperature was measured by a thermocouple which was mounted on the front surface with SiNx coating. The Ag grid was screen-printed (Ferro 3349) and fired in the RTP system at 700° C. for 1 s, using similar ramp-up and ramp-down rates (firing step #2). A 400° C./20 min. Forming Gas Anneal was performed at the end to ensure good ohmic contacts.
Results and Discussion:
The open-circuit voltage (VOC) of a solar cell is a strong function of the minority carrier lifetime as well as the quality of the Al-BSF region. The VOC might also be influenced by the inhomogeneous material quality.
The EFG Si cells were analyzed to investigate the effect of firing time on defect hydrogenation. It is known that the annealing of the SiNx film injects atomic hydrogen into the bulk Si and passivates defects. However, hydrogen can also evolve out of these defects at or below 750° C.2 Thus the challenge is to find the optimum firing condition at which the competition between supply and dissociation of hydrogen results in maximum retention of atomic hydrogen at defects.
It has been suggested in the literature that the release of hydrogen from the SiNx film is very rapid initially and then slows down.10,11 This implies that hydrogen supply decreases rapidly with time while dehydrogenation of defects continues. As a result, shorter firing time is able to retain more hydrogen atoms at the defects to produce high bulk lifetime. In order to prove rapid dehydrogenation at 750° C., a two-step experiment was performed. First, the SiNx layer and metal contacts were removed after the hydrogenation step (750° C./1 s) to eliminate further supply of hydrogen. Measured bulk lifetime in this sample after the first step was 85 μs. Then the sample was reannealed at 750° C. in the RTP system to drive the hydrogen out of the defects. FZ Si sample was also annealed in the RTP system to verify that the observed change in carrier lifetime is due to the hydrogen out-diffusion and not due to some contamination during the heat treatment. It was found that it only took 2 s to reduce the bulk lifetime in EFG Si from 85 μs to 10 μs while no appreciable change in carrier lifetime was observed in FZ Si which remained at about 270 Us after a 750° C./2 s RTP annealing. This explains why prolonged firing at 750° C. is detrimental for bulk lifetime in EFG Si. This result also suggests that the single-step firing might be better than the two-step firing for the hydrogen retention at defect sites because second firing step may cause some dehydrogenation.
Lighted I-V data for the FZ Si cells in Table 8 show that the spread in Voc was only ≦3 mV and JSC was ≦0.2 mA/cm2, resulting in an insignificant difference in cell efficiency (≦0.2%) as a function of Al-BSF firing time. In addition, the average and the best values of the cell parameters were virtually identical for FZ Si cells. Average fill factor decreased for shorter firing time in this study because Ag grid contact firing was optimized for a 60 s Al-BSF firing cycle using FZ Si cells. Shorter firing time for the same firing temperature may introduce higher series resistance. Table 9 shows the average and the best values of EFG Si cell parameters for each firing time. The 1 s firing time produced the best cell performance with an average VOC of 599 mV and the best VOC of 613 mV. Unlike the FZ Si cells, the difference in the average VOC values was about 6 mV for 1 and 60 s firing times. The average cell efficiencies for 10 and 30 s firing are lower than for the 60 s firing time due to lower fill factor values. Table 9 also shows high JSC values for 10 and 30 s firing case. This is probably due to the non-uniform resistivity distributions of EFG Si. These parameters were averaged over two wafers or eighteen cells.
Next, device simulations were performed using the PC1D software in order to establish that the efficiency difference in EFG Si cells is primarily due to the observed lifetime enhancement from 33 μs (for 60 s firing) to 95 μs (for 1 s firing). 12 Table 10 shows the key input parameters used to perform the simulation for screen-printed devices with fill factor of 0.77.
*SRV—surface recombination velocity
Conclusion:
It is found that the formation of Al-BSF region is not a strong function of firing time in the range of 1-60 s at 750° C. The cross-sectional SEM pictures of the FZ and EFG samples show that there is virtually no difference in the Al-BSF thickness and its uniformity between 1 and 60 s RTP Al-BSF firing. As a result, no appreciable difference in efficiencies of FZ Si cells was observed as a function of back contact firing time. However, in the case of the EFG Si cells, change in firing condition significantly influenced the SiNx-induced hydrogen passivation, with one second SiNx/Al-BSF firing providing much greater minority carrier lifetime enhancement than 60 s firing. This is due to the competition between the supply and evolution of hydrogen to and from the defects, respectively. These results suggest that hydrogen diffuses very rapidly (≦1 s) into the Si bulk to passivate defects, but evolution of hydrogen from the defects is also very rapid. It is shown that the lifetime decreases from 85 to 10 μs in 2 s at 750° C. in the absence of hydrogen supply. If hydrogen supply decreases with time, as suggested in the literature, retention of hydrogen at defects becomes more critical. As a result, 1 s hydrogenation at 750° C. is more effective than 60 seconds. By taking advantage of this very short firing cycle, which does not degrade Al-BSF and gives higher bulk lifetime, and high efficiency (15.6%) screen-printed EFG Si cells were achieved.
This application claims priority to co-pending U.S. provisional application entitled, “Development of Good Ohmic Contacts for High Efficiency to High-Sheet-Resistance Emitters for Silicon Solar Cells,” having Ser. No. 60/515,780, filed Oct. 30, 2003, and co-pending U.S. provisional application entitled, “Rapid Firing Enhance AI-BSF, Contacts and SiN Induced Hydrogenation Design and Development of 18-20% Efficient Czochraski Monocrystalline Si,” having Ser. No. 60/526,919, filed Nov. 24, 2003, both of which are entirely incorporated herein by reference.
Number | Date | Country | |
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60515780 | Oct 2003 | US | |
60526919 | Dec 2003 | US |