SIMPLE NONAUTONOMOUS PEERING MEDIA CLONE DETECTION

Abstract

A playback device includes a port configured to receive content from an external memory device, a device memory residing in the device, and a controller programmed to execute instructions that cause the controller to read a read data pattern from the defined region in the external memory device and determine if the read data pattern correlates to an expected data pattern to a predetermined level, wherein the expected data pattern is derived at least in part from a defect map of the defined region.

Description

BACKGROUND

The packaging of media content, such as video or audio content, into digital media files has made the exchange of the content very easy and convenient for users. However, users freely exchanging content may violate the content owner's property rights. Content owners also want to restrict the copying of copyright protected content. There are many examples of technologies that make the transfer of copyright protected content very difficult. When physical media is used to store content, permanently or temporarily, for example in electronic purchase, rental and subscription movie service business models, content owners or their licensees use a variety of cryptographic binding methods. These methods typically use a unique media or device identifier or similar player attributes in a cryptographic function to protect the content from being copied or transferred such that it may be said to be bound to the device. Generally, this binding of the content is based upon a particular playback device, which is undesirable for users. Users may want to play their content on a different device than the device that received the content or they may want to transfer it among several personal devices.

One approach involves peering of content, where users transfer data amongst themselves. In order to preserve copyrights and to avoid pirating of the content, a ‘non-autonomous’ peering system may be employed. In contrast to a typically peering system, where users transfer content freely, the system is ‘non-autonomous.’ ‘Non-autonomous’ as used here means that the system includes mechanisms that only allow transfer of the content with the assistance of a centralized authority, while allowing users to transfer media content between their own compliant devices. A peer in this system consists of an end-user owned device acting as the source for a transfer, while in most other systems content resides on a server for download.

Examples of a non-autonomous peering system can be found in U.S. Pat. No. 7,165,050, and US Patent Publication No. 20060064386, both titled, “Media on Demand Via Peering.” An example of methods of manufacturing and binding components usable in a non-autonomous peering system can be found in U.S. patent application Ser. No. 12/369,708, “Simple Non-Autonomous Environment, Watermarking And Authentication,” filed Feb. 11, 2009. U.S. patent application Ser. Nos. 12/369,708, and 12/713,111 discuss the use of a peering system in conjunction with flash memory devices.

With the increasingly less expensive and wide proliferation of flash memory devices, a very real possibility arises of pirates using flash memory devices to clone valid devices originating from the content providers or legitimate users of a peering system.

The pirates can reproduce a huge amount of content on cloned devices with very simple hardware and in a very short period of time.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 shows an embodiment of a playback device capable of playing content from a memory device.

FIG. 2 shows an embodiment of a flash memory device having a predefined region.

FIG. 3 shows an embodiment of a method of validating a flash memory device.

DETAILED DESCRIPTION OF THE EMBODIMENTS

The below discussion uses several terms that may become confusing. The discussion uses the term ‘memory’ and memory device′ to refer to a non-volatile memory device that contains ‘content.’ ‘Content’ includes any type of experiential content and includes, but is not limited to, movies, television shows, recorded performances, video files, audio files, and games. The memory device may include removable memory, such as flash memory drives, so-called ‘thumb’ drives, memory cards, embedded flash memory including spinning and solid state hard drives, and memory sticks, but no limitation is intended, nor should any be implied by these examples. The memory device will be referred to here as ‘content’ memory, because it resides separately from on-board memory of a playback device, although it may be internal to the playback device.

The memory device may interface with a ‘playback device,’ where a playback device is any device having a controller, also referred to as a processor or a system on a chip (SoC), a memory and the ability to interface with the media, whether as embedded media or removable media. Examples include, but are not limited to, televisions, video projectors, digital video recorders, set-top boxes, kiosks, personal computers, and mobile computing devices including smart phones, media players, in-car players, netbooks and tablet computers.

FIG. 1 shows an embodiment of a playback device capable of playing content from a memory device. The playback device 10 has a controller 12 that performs the validation of the memory as described below. During this validation process, the controller may access a device memory, 14. The device memory 14 is the ‘on-board’ memory that exists in the playback device separate from the content memory containing the content. The playback device 10 also has a port 16 to accept the memory device 20. In the case of embedded memory, the port 16 may take the form of a connector to connect between the processor and the embedded memory. The embedded memory will still be referred to here as the ‘content memory’ to separate it from the device memory 14 used for device operation.

As stated above, the memory device 20 may take one of many different forms, including CompactFlash; MultiMedia Cards (MMC), including Reduced Size-MMC; Secure Digital (SD) cards, including mini-SD and micro-SD; and Memory Sticks. These of course are merely examples of the different memory formats and form factors, which may also be embodied in memory devices such as 20 that connect to the playback device by an external connector 22, such as Universal Serial Bus (USB) connectors, and those that comply with IEEE standard 1394, also referred to as ‘firewire.’ In the embodiment of embedded memory including hard disks, the content memory device may communicate with the controller using IDE (Integrated Drive Electronics), SATA (Serial Advanced Technology Attachment), SCSI (Serial Computer System Interface), SAS (Serial Attached SCSI) or USB interfaces.

The memory device will typically be a ‘flash’ memory device, meaning an electrically programmable/erasable non-volatile memory device. These types of devices may be manufactured according to many different metal and semiconductor technologies. Generally, they fall within two different types of operational technologies, those NOR (not OR) flash memory and NAND (not AND) memory devices. Currently, the prevalent type of flash memory is NAND flash memory, but NOR flash memory devices are well within the scope of the embodiments discussed here.

Any type of flash memory device, whether based upon complementary metal-oxide semiconductor technologies, or other types of memory technologies, is within the scope of the embodiments here, as many of them have similar characteristics as to their organization and some of their operations. This includes single level cell (SLC) or multilevel cell (MLC) technologies.

For example, in NAND flash memory, programming the memory changes bits from a logic one to a logic zero. Erasure resets all bits to back to one. The memory is organized into pages and blocks. Erasure happens a block at a time, with block sizes typically being 64, 128 or 256 KB. NAND flash devices may also include bad block management, a process by which bad blocks are identified and mapped either at runtime or at manufacture. Many devices also now include wear leveling, where the writing of data is rotated among blocks to prolong the life of the memory cells that will eventually degrade over repeated write/read cycles.

In NAND flash devices, each block consists of a number of pages, each page may have a typical size of 512, 2,048, or 4,096 bytes in size plus a few bytes to store an error correcting code (ECC) checksum and other metadata necessary for the operation of the memory array. Reading and programming of these devices is typically done on a page basis. Erasure is done on a block basis. NAND devices typically also have bad block management by the device driver software, or by a separate controller chip. SD cards, for example, include controller circuitry to perform bad block management and wear leveling. When a logical block is accessed by high-level software, it is mapped to a physical block by the device driver or controller. A number of blocks on the flash chip may be set aside for storing mapping tables to deal with bad blocks, or the system may simply check each block at power-up to create a bad block map. The overall memory capacity gradually shrinks as more blocks are marked as bad. These set aside blocks for mapping tables or the memory region in which the power-up (runtime) maps are stored constitute the defined region.

Most NAND devices are shipped from the factory with some bad blocks which are typically identified and marked according to a specified bad block marking strategy. By allowing some bad blocks, the manufacturers achieve far higher yields than would be possible if all blocks had to be verified good. This significantly reduces NAND flash costs and only slightly decreases the storage capacity of the parts.

While the embodiments herein may be applied to either NAND or NOR flash memories, no such limitation is intended nor should it be implied. The embodiments here could be applied to any type of memory device that has bad block management and the ability to use bad block maps and known data patterns to determine an expected data pattern when validating the memory device. Memory devices include hard disk drives, both ‘traditional’ spinning disks with readers and solid state hard drives.

FIG. 2 shows an example of a memory device 20. As described above, the memory device 20 may be organized as pages and blocks, where a block is made up of a number of pages. Alternatively, the memory may be organized in sectors. In either case, the memory has ‘regions,’ meaning some predetermined subset of memory cells that is smaller than the overall size of the memory device.

Within the memory array, the manufacturer or content provider that has provided the content stored by the memory device has defined a region 24. The region may consist of some set of blocks, pages, or sectors. The region has a known defect map, either generated by a SNAP server before content is delivered to the media, or determined at manufacture of the memory device. If the defect map has been determined at manufacture of the memory device, the memory device may store the defect map in a second region 26 of the memory device.

By using the defect maps of the individual memory devices, the content provider will have a characteristic of the memory array usable to validate the memory device and therefore unlock the content. Validation of the memory device allows the content providers to ensure that only authorized memory devices carry their content, as opposed to devices to which their content has been copied in violation of their copyrights. This discussion may refer to these devices as ‘cloned’ devices.

In order to replicate the content and still allow the memory device to appear valid, the pirates would have to determine the exact location of the defined region, have access to a known data pattern used in validation and the defect map of the memory device. The computing power to determine this will typically prohibit a pirate from having the capability of producing memory devices that validate in the playback devices and allow playing of the content.

FIG. 3 shows one embodiment of a method to validate a memory device in a playback device. As mentioned above, the process uses known random data patterns to validate the memory device. The playback device may generate the known data pattern each time for validation, or generate it once and store it in the playback device memory, at 32. Alternatively, the content providers or memory device manufacturers may provide the known data pattern and/or the defect map, in which case the playback device receives it at 30, either one time and then stored or while connected to a content or validation server.

In the case where the known data pattern or defect map is provided by the manufacturer or content provider, the defect map will typically be signed to allow authentication/validation. For example, the manufacturer may provide the defect map in the metadata that accompanies the memory device and may have already written the known data pattern to the defined region in the memory.

The playback device would then access the known data pattern at 34, where accessing the known data pattern may involve retrieving it from the playback device memory, generating the known data pattern or receiving it in real-time. As mentioned above the known data pattern may be stored at 36, but this is optional.

Once the device has the known data pattern, it writes the known data pattern to the defined region in the memory device at 40. The playback device then reads data from the defined region at 42. The data read from the defined region should correlate to the known data pattern altered in a manner determined by the defect map. For example, in the known data pattern, the playback device writes a 1 to the memory cell corresponding to bit 3. However, because of the defect map, the playback device ‘knows’ that the cell storing bit 3 has a defect. Therefore, the expected data pattern will return the known data pattern, except that bit 3 will be a 0 instead of a 1. This simplified example demonstrates how the defect map produces a unique data pattern upon reading from the defined region. The discussion will refer to the read data pattern altered by the defect map as the ‘expected data pattern’, generated by the playback device at 50.

In the embodiment where the known data pattern and/or defect map have been provided by the manufacturer, the process may skip from the receiving of the known data pattern and defect map to the reading of the data from the defined region at 42. This process may occur in several ways. For example, the playback device may read the data from the defined region using the error correction code to determine the known data pattern. Then the playback device may read the data from the defined region without using the error correction code. These patterns would then be used in the following comparison.

One should note that the expected data pattern may not actually reside in the playback device as a stored entity. The playback device may read the data back from the defined region and compare it to the known data pattern, then check the read data pattern against the defect map. A multitude of ways exists to make the comparison between the read data pattern and the expected data pattern at 44, all of which are within the scope of the embodiments here.

At 46, the playback device determines if the comparison result of the two patterns meets some correlation criteria, as they may not match exactly. For example, the defect in bit 3 may result in the data bit having the correct value when read back or having the opposite value. Note that the memory cells can be modeled by independent random variables, each with a certain probability of being defective (different cells having different probabilities). This is a well-studied problem in statistical analysis, and a standard correlation function used in this case is the Chi Square test. However, other correlation functions, including ad hoc functions, are within the scope of this invention. The process accounts for these kinds of unknown results by providing some correlation measure that has a high enough value that the memory device validates even though the patterns do not match exactly.

Indeed, in some cases, the patterns would actually be expected to not match exactly. In NAND flash devices, some devices may have intermittent defects, meaning that from read to read, a bit with an intermittent error may change state. This would result in the read data pattern to vary slightly from the expected data pattern. For example, a defect map may identify bit 3 of a particular portion of the memory to have an intermittent data error. In the known data pattern, bit 3 may be written as a data 1. The expected data pattern may expect a Oat bit 3 because it has a defect. However, because it is an intermittent defect, bit 3 may return a 0 the first read and a 1 the second read.

This anomaly can be accounted for using a correlation measure such that the read data pattern correlation would vary from read to read. If it did not vary from read to read, where the read data pattern is the exact same each read, it may actually indicate that it is a cloned device. It would take considerably more logic circuitry and computing power to mimic the intermittent data errors.

Returning to FIG. 3, if the two patterns do not match within the correlation criteria, the process ends at 52. Ending the process may include application of some sort of anti-piracy measure such as memory device erasure, generation of a piracy report sent back to an on-line reporting house, etc. If the two patterns match within the correlation measure at 46, the playback device validates the memory device. Once validated, the playback device then allows access to the content on the memory device to allow the user to experience the content.

In this manner, content providers use an inherent characteristic of the memory device to validate the memory devices. Pirates would have to find memory devices that have the same defect maps or divine some way of spoofing a memory device defect map, get access to the known data pattern, and know the exact location of the defined region to replicate pirated content across cloned devices. The computing power this requires would prohibit the vast majority of pirating efforts.

Although there has been described to this point a particular embodiment for a method and apparatus for validating memory devices containing content, it is not intended that such specific references be considered as limitations upon the scope of this invention except in-so-far as set forth in the following claims.

Claims

1. A method of validating a content memory device communicatively coupleable with a playback device, comprising: reading a unique data pattern from a region of the content memory device, the region having content memory device inherent random physical manufacturing defects identified in a defect map, the unique data pattern being a first data pattern written to the region and altered by the content memory device inherent random physical manufacturing defects in the region identified in the defect map;validating the content memory device based at least in part upon the unique data pattern, the written data pattern, and the defect map; andwherein the written data pattern is also stored in a device memory within the playback device and validating the content memory device comprises accessing the device memory within the playback device to retrieve the stored data pattern.

2. The method of claim 1, wherein the method further comprises: generating the written data pattern; andwriting the written data pattern to the region.

3. The method of claim 2, wherein the method further comprises storing the written data pattern in a device memory in the playback device.

4. The method of claim 1, further comprising: receiving the written data pattern at the device memory within the playback device; andwherein the written data is written to the content memory device by one of a manufacturer or a content provider.

5. The method of claim 1, further comprising allowing access to content stored in the content memory device after validating the content memory device.

6. The method of claim 1, further comprising altering the retrieved written data pattern using the defect map to produce an expected data pattern and comparing the expected data pattern with the unique data pattern.

7. The method of claim 1, further comprising accessing the content memory device to retrieve the defect map.

8. The method of claim 1, wherein the reading the data pattern from the region includes reading the data pattern at least twice to detect an expected intermittent defect.

9. The method of claim 1, wherein validating the content memory based upon the unique data pattern, the written data pattern, and the defect map comprises comparing the unique data pattern to an expected data pattern, the expected data pattern computed at least in part according to the defect map and the written data pattern.

10. The method of claim 9, wherein the expected data pattern is computed by altering the written data pattern using the defect map.

11. The method of claim 1, wherein validating the content memory device based at least in part upon the unique data pattern, the written data pattern and the defect map comprises: error correcting the unique data pattern to regenerate the written data pattern;comparing the written data pattern to the unique data pattern to identify inherent random physical manufacturing defects; andcomparing the identified random physical manufacturing inherent defects with the defect map.

12. The method of claim 1, wherein a location of the region is a unknown to an unauthorized user of the content memory device.

13. The method of claim 1, wherein the region includes defective cells and the defect map represents the defective cells of the region.

14. The method of claim 1, wherein: the region includes cells, each having a probability of defect; andvalidating the content memory at least in part upon the unique data pattern, the written data pattern, and the defect map comprises validating the content memory at least in part upon the unique data pattern, the written data pattern, the defect map, and the probability of defect in each of the cells.

15. The method of claim 14, wherein validating the content memory at least in part upon the unique data pattern, the written data pattern, the probability of defect in each of the cells comprises: matching the unique data pattern and the written pattern according to the defect map and a correlation measure determined from the probability of defect in each of the cells.

16. A playback device, comprising: a port for coupling a content memory device;a processor, communicatively coupled to the port, the processor configured to:read a unique data pattern from a region of the content memory device, the region having known content memory device inherent random physical manufacturing defects identified in a defect map, the unique data pattern being a written data pattern altered by the content memory device inherent random physical manufacturing defects in the region identified in the defect map; andvalidate the content memory device based at least in part upon the unique data pattern, the written data pattern, and the defect map;wherein the written data pattern is stored in a device memory communicatively coupled to the processor and the processor is configured to access the device memory within the playback device and retrieve the written data pattern.

17. The device of claim 16, wherein the processor is further configured to generate the written data pattern and write the written data pattern to the region.

18. The device of claim 17, wherein the processor is further configured to store the written data pattern in a device memory communicatively coupled to the processor.

19. The device of claim 16, wherein: the written data pattern is stored in the device memory before the content memory device is coupled to the playback device; andthe written data pattern is written to the content memory device by one of a manufacturer or a content provider.

20. The device of claim 16, wherein the processor only allows access to content stored in the content memory device if the content memory device is validated.

21. The device of claim 16, wherein the processor is configured to validate the content memory device by altering the retrieved written data pattern using the defect map to produce an expected data pattern and to compare the expected data pattern with the unique data pattern.

22. The device of claim 16, wherein the processor is configured to access the content memory device to retrieve the defect map.

23. The device of claim 16, wherein the processor is further configured to read the data pattern from the region at least twice to detect an expected intermittent defect.

24. The device of claim 16, wherein the processor is further configured to validate the content memory based upon the unique data pattern, the written data pattern, and the defect map at least in part by comparing the unique data pattern to an expected data pattern, wherein the processor is further configured to compute the expected data pattern at least in part according to the defect map and the written data pattern.

25. The device of claim 24, wherein the processor is further configured to compute expected data pattern by altering a known data pattern using the defect map.

26. The device of claim 16, wherein the processor is further configured to validate the content memory based upon the unique data pattern, the written data pattern, and the defect map at least in part by comparing the unique data pattern to the written data pattern and comparing the unique data pattern with the defect map.

27. The device of claim 16, wherein the processor is configured to validate the content memory device based at least in part upon the unique data pattern, the written data pattern and the defect map at least in part by error correcting the unique data pattern to regenerate the written data pattern, comparing the written data pattern to the unique data pattern to identify the inherent random physical manufacturing defects, and comparing the identified inherent random physical manufacturing defects with the defect map.

28. The device of claim 16, wherein a location of the region is a unknown to an unauthorized user of the content memory device.

29. The device of claim 16, wherein the region includes defective cells and the defect map represents the defective cells of a defined region.

30. The device of claim 16, wherein: the region includes cells, each having a probability of defect; andthe processor is configured to validate the content memory at least in part upon the unique data pattern, the written data pattern, the defect map, and the probability of defect in each of the cells.

31. The device of claim 30, wherein the processor is configured to validate the content memory at least in part by matching the unique data pattern and the written pattern according to the defect map and a correlation measure determined from the probability of defect in each of the cells.

32. The device of claim 16, wherein the physical manufacturing defects are identified by post-manufacturing testing of the content memory device.

33. A method of providing data for validating a content memory device storing content, comprising: reading a unique data pattern from a region of the content memory device, the unique data pattern being a written data pattern altered by known content memory device inherent random physical manufacturing defects in the region to which it is written by a validation entity, the known content memory device inherent random physical manufacturing defects in the region being identified in a defect map stored in the content memory device;transmitting the unique data pattern and the defect map to a playback device; andtransmitting the content to the playback device responsive to a content memory device validation performed using the transmitted unique data pattern and defect map;wherein the inherent random physical manufacturing defects comprise content memory device physical manufacturing defects;wherein the content memory device validation includes a comparison of the unique data pattern to an expected data pattern, the expected data pattern computed at least in part according to the defect map and the written data pattern; andwherein the expected data pattern is computed by altering the known data pattern using the defect map.

34. The method of claim 33, wherein the unique data pattern is transmitted at least twice to manifest an intermittent defect.

35. The method of claim 33, wherein the content memory device validation includes a comparison of the unique data pattern to an expected data pattern, the expected data pattern computed at least in part according to the defect map and the written data pattern.

36. The method of claim 33, wherein the content memory device validation comprises a comparison of an error corrected unique data pattern with the unique data pattern to identify the inherent random physical manufacturing defects and a comparison of the identified inherent random physical manufacturing defects with the defect map.

37. The method of claim 33, wherein a location of the region is unknown to an unauthorized user of the content memory device.

38. The method of claim 33, wherein the region includes defective cells and the defect map represents the defective cells of a defined region.

39. The method of claim 33, wherein the validation entity comprises a manufacturer of the content memory device and the written data pattern is written by the manufacturer of the content memory device.

40. The method of claim 33, wherein the validation entity comprises a provider of the content.

41. The method of claim 33, wherein the defect map is digitally signed.

42. The method of claim 33, wherein the physical manufacturing defects are identified by post-manufacturing testing of the content memory device.

43. A content memory device, comprising: a connector of the content memory device communicatively coupleable to a playback device;a content memory device processor communicatively coupled to the connector and configured to interact with the playback device by: reading a unique data pattern from a region of the content memory device, the unique data pattern being a written data pattern written by a validation entity and altered by known content memory device inherent random physical manufacturing defects in the region identified by a defect map identifying known content memory device inherent random physical manufacturing defects, the defect map stored in the content memory device;transmitting the unique data pattern and the defect map to the playback device; andtransmitting the content to the playback device responsive to a validation of the content memory device performed using the transmitted unique data pattern and defect map;wherein the content memory device inherent random physical manufacturing defects comprise content memory device physical manufacturing defects;wherein the validation comprises a comparison of the unique data pattern to an expected data pattern, the expected data pattern computed at least in part according to the defect map and the written data pattern; andwherein the expected data pattern is a written data pattern altered by the defect map.

44. The device of claim 43, wherein content device interacts with the playback device to read the unique data pattern at least twice to manifest an intermittent defect.

45. The device of claim 43, wherein the validation comprises a comparison of an error corrected unique data pattern with the unique data pattern to identify the inherent random physical manufacturing defects and a comparison of the identified inherent random physical manufacturing defects with the defect map.

46. The device of claim 43, wherein a location of the region is unknown to an unauthorized user of the content memory device.

47. The device of claim 43, wherein the region includes defective cells and the defect map represents the defective cells of a defined region.

48. The device of claim 43, wherein the validation entity comprises manufacturer of the content memory device and the written data pattern is written by the manufacturer of the content memory device.

49. The device of claim 43, wherein the defect map is digitally signed.

50. The device of claim 43, wherein the physical manufacturing defects are identified by post-manufacturing testing of the content memory device.