This application claims the benefit of Korean Patent Application Nos. 10-2004-0069093, filed on Aug. 31, 2004 and 10-2005-0049690, filed on Jun. 10, 2005 in the Korean Intellectual Property Office, each of which is incorporated herein by reference in its entirety.
1. Field of the Invention
The present invention generally relates to an electron emission display apparatus, and more particularly, to an electron emission display apparatus for driving data electrode lines of an electron emission display panel according to data-driving control signals that are received from an electron emission display panel, a panel control circuit, a scanning driving circuit, and a panel control circuit.
2. Description of Related Art
A conventional electron emission display apparatus is disclosed in Japanese Patent Publication No. 242,214, entitled “Electron Emission Type Image Display Apparatus, published in 2000. The conventional electron emission display apparatus includes an electron emission display panel, a panel control circuit, a scan-driving circuit, and a data-driving circuit. The panel control circuit processes an image signal and generates scan-driving control signals and data-driving control signals. The scan-driving circuit drives the scan electrode lines of the electron emission display panel according to the scan-driving control signals received from the panel control circuit. The data driving circuit drives the data electrode lines of the electron emission display panel according to the data-driving control signals received from the panel control circuit.
A shift clock signal is input to the serial-input parallel-output shift register 109 through the shift clock input terminal CKSI and a latch-selection signal is input to the serial-input parallel-output shift register 109 through the latch-selection input terminal CSIN. Accordingly, the serial-input parallel-output shift register 109 periodically shifts the latch-selection signal whenever a shift clock pulse is input.
Here, the number of output bits of the serial-input parallel-output shift register 109 is equal to the number of the latches L1 through L240. Also, the output terminals of flip-flops in the serial-input parallel-output shift register 109 are respectively connected to the input enable terminals of the latches L1 through L240. A latch-selection signal received through the latch-selection input terminal CSIN among the data-driving control signals is periodically shifted by the serial-input parallel-output shift register 109, so that the respective latches L1 through L240 are sequentially selected.
Meanwhile, 8-bit gray-level data received through the 8-bit gray-level data input port DIN among the data-driving control signals is input to all the latches L1 through L240. Thus, the respective latches L1 through L240 may be sequentially selected to latch the corresponding gray-level data.
The plurality of converters C1 through C240 (for example, pulse width modulation converters) operate according to a horizontal scan signal and a horizontal blank signal received through the scan clock input terminal CKSC and the blank input terminal BLK, convert the gray-level data temporarily stored in the respective latches L1 through L240 into data driving signals Q1 through Q240, and apply the converted data driving signals Q1 through Q240, respectively, to the data electrode lines of the electron emission display panel.
Meanwhile, in order to drive a high-resolution electron emission display panel, a plurality of data driving devices, each having the configuration as described above, are needed.
Referring to
Accordingly, one-hundred and sixty gray-level data lines that connect to the 8-bit gray-level data input ports DIN of the twenty data driving devices IC1 through IC20 must be connected to each other for each bit group on the outside of the data driving device ICn.
Therefore, if the conventional driving apparatus were applied to drive a high-resolution electron emission display panel, the driving apparatus would require a complicated circuit substrate configuration and thus the productivity of the driving apparatus may be low.
The present invention provides an electron emission display apparatus including a driving apparatus with a simplified circuit substrate configuration and with high productivity, which is suitable for driving a high-resolution electron emission display panel.
An embodiment of the invention may provide an electron emission display apparatus that includes an electron emission display panel. A panel control circuit may process an image signal and generate both scan-driving control signals and data-driving control signals. A scan driving circuit may drive scan electrode lines of the electron emission display panel according to the scan-driving control signals received from the panel control circuit. A data driving circuit may drive data electrode lines of the electron emission display panel according to the data-driving control signals received from the panel control circuit, and the data driving circuit may include a plurality of data driving devices. Each of the plurality of data driving devices may include a gray-level data input port, a plurality of latches, and a gray-level output port. In use, gray-level data among the data-driving control signals may be applied to the plurality of latches and the gray-level data output port, and the plurality of latches may be sequentially selected to thus latch corresponding gray-level data.
The above and other features and advantages of the present invention will become more apparent by describing in detail exemplary embodiments thereof with reference to the attached drawings.
The present invention will now be described more fully with reference to the accompanying drawings, in which exemplary embodiments of the invention are shown.
The image control circuit 34 processes an image signal SPC received from a computer, an image signal SDVD received from a DVD (digital versatile disk) player, and an image signal received from the set-top box 35, and applies the processed signals to the panel control circuit 36. The set-top box 35 converts an image signal STV received from a television and provides the converted result to the image control circuit 34.
The panel control circuit 36 processes the image signal received from the image control circuit 34 and generates scan-driving control signals SSIN and data-driving control signals SDIN. The scan driving circuit 37 drives the gate electrode lines G1, . . . , Gn of the electron emission display panel 1 according to the scan-driving control signals SSIN received from the panel control circuit 36.
The data driving circuit 38 drives the cathode electrode lines C1R, . . . , C1600B of the electron emission display panel 1 according to the data-driving control signals SDIN received from the panel control circuit 36. A plurality of data driving devices are included in the data driving circuit 38 and gray-level data lines are connected to each other through gray-level data lines formed in the data driving devices. Accordingly, when the driving apparatus is applied for driving a high-resolution electron emission display panel, the driving apparatus can have a simplified circuit substrate configuration and high productivity. Details for this will be described later with reference to
While a scan pulse is sequentially applied to the gate electrode lines G1, . . . , Gn which are scan electrode lines, gray-level display is performed according to the widths of data pulses which are applied to the cathode electrode lines C1R, . . . , C1600B which are data electrode lines.
The power supply circuit 39 applies corresponding voltages to the image control circuit 4, the set-top box 5, the panel control circuit 6, the scan driving circuit 7, the data driving circuit 8, and a positive plate (22 of
Referring to
The rear panel 3 includes a rear substrate 91, cathode electrode lines C1R, . . . , C1600B, electron emission sources E(1)1R, . . . , E(n)1600B, the insulation layer 93, and gate electrode lines G1, . . . , Gn.
The cathode electrode lines C1R, . . . , C1600B to which data signals are applied are electrically connected to the electron emission sources E(1)1R, . . . , E(n)1600B. Penetration holes H(1)1R, . . . , H(n)1600B corresponding to the electron emission sources E(1)1R, . . . , E(n)1600B are formed in the insulation layer 93 and the gate electrode lines G1, . . . , Gn. Accordingly, the penetration holes H(1)1R, . . . , H(n)1600B are formed at intersections of the gate electrode lines G1, . . . , Gn to which scan signals are applied and the cathode electrode lines C1R, . . . , C1600B.
The front panel 2 includes a front transparent substrate 21, a positive plate 22, and phosphor cells F(1)1R, . . . , F(n)1600B. The phosphor cells F(1)1R, . . . , F(n)1600B may be formed to correspond to the penetration holes H(1)1R, . . . , H(n)1600B formed in the gate electrode lines G1, . . . , Gn. A high positive voltage of 1 through 4 KV is applied to the positive plate 22 so that electrons move from the electron emission sources E(1)1R, . . . , E(n)1600B to the phosphor cells F(1)1R, . . . , F(n)1600B.
Referring to
A shift clock signal is input to the serial-input parallel-output shift register 509 through the shift clock input terminal CKSI and a latch-selection signal is input to the serial-input parallel-output shift register 509 through the latch-selection input terminal CSIN. Accordingly, the serial-input parallel-output shift register 509 periodically shifts the latch-selection signal whenever a shift clock pulse is input.
The output terminal of the final flip-flop of the serial-input parallel-output shift register 509 is connected to the latch-selection output terminal CSOUT. That is, a latch-selection signal corresponding to the final one of output bits of the serial-input parallel-output shift register 509 is applied to the latch-selection output terminal CSOUT.
The number of the output bits of the serial-input parallel-output shift register 509 is equal to the number of the latches L1 through L240. Also, the output terminals of the respective flip-flops of the serial-input parallel-output shift register 509 are respectively connected to the input enable terminals of the latches L1 through L240. Accordingly, a latch-selection signal received through the latch-selection input terminal CSIN among data-driving control signals SDIN is periodically shifted by the serial-input parallel-output shift register 509, so that the respective latches L1 through L240 are sequentially selected.
Meanwhile, 8-bit gray-level data received through the 8-bit gray-level data input port DIN among the data-driving control signals SDIN is applied to the latches L1 through L240 and the gray-level data output port DOUT.
Accordingly, the respective latches L1 through L240 are sequentially selected to thus latch the corresponding gray-level data.
The plurality of pulse width modulation converters C1 through C240 operate according to a horizontal scan signal and a horizontal blank signal received through the scan clock input terminal CKSC and the blank input terminal BLK, convert the gray-level data temporarily stored in the respective latches L1 through L240 into data driving signals Q1 through Q240, and apply the data driving signals Q1 through Q240 respectively to the data electrode lines of the electron emission display panel 1.
Meanwhile, in order to drive a high-resolution electron emission display panel, a plurality of data driving devices, each having the configuration as described above, are needed.
Referring to
Meanwhile, the output terminal of the final flip-flop of the serial-input parallel-output shift register 509 is connected to the latch-selection output terminal CSOUT. That is, a latch-selection signal corresponding to the final one of output bits of the serial-input parallel-output shift register 509 is applied to the latch-selection output terminal CSOUT. The latch-selection input terminal of the i-th data driving device is electrically connected to the latch-selection output terminal of the (i-1)-th data driving device, and a latch-selection signal output from the panel control circuit (36 of
In the present embodiment, the scan electrode lines and the data electrode lines respectively correspond to the gate electrode lines G1, . . . , Gn illustrated in
As described above, according to an electron emission display apparatus of the present invention, in each data driving device, gray-level data received through a gray-level data input port is applied to a gray-level output port. That is, gray-level data lines can be connected to each other through gray-level data lines formed in data driving devices. Therefore, even when the driving apparatus of the electron emission display apparatus is applied for driving a high-resolution emission display panel, a circuit substrate configuration of the driving apparatus may be simplified and thus the productivity of the driving apparatus can be improved.
While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it will be understood by those of ordinary skill in the art that various changes in form and details may be made therein without departing from the spirit and scope of the present invention as defined by the following claims.
Number | Date | Country | Kind |
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10-2004-0069093 | Aug 2004 | KR | national |
10-2005-0049690 | Jun 2005 | KR | national |