Limitations and disadvantages of conventional and traditional approaches to electronic communications will become apparent to one of skill in the art, through comparison of such systems with some aspects of the present invention as set forth in the remainder of the present application with reference to the drawings.
A system and/or method is provided for single carrier communications harnessing nonlinearity, substantially as shown in and/or described in connection with at least one of the figures, as set forth more completely in the claims.
These and other advantages, aspects and novel features of the present invention, as well as details of an illustrated embodiment thereof, will be more fully understood from the following description and drawings.
A transmitter in accordance with an example implementation of this disclosure is depicted in
‘M’ in
In an example implementation, the Inner FEC encoder 106 codeword size is aligned to IDFT 114 size (i.e. IFT 114 accommodates an integer number of FEC code-words, or FEC code-word size accommodates integer number of FFT's). In an example implementation the inner FEC encoder 106 and Mapper 110 may be merged thereby creating a Euclidean code.
As indicated by the dashed lines, the outer FEC 102 may not be used in some implementations. In this regard, in an example implementation in which the codeword size of the inner FEC encoder 106, which is aligned to the OFDM symbol, is too short to get good coding gain, then the outer FEC encoder 102 may accordingly be used. In such an implementation, the rate of the code may be split between the outer FEC encoder 102 and the inner FEC encoder 106. For example, to get a total code rate of 0.9 the rate of the inner FEC encoder 106 (Rin) and the rate of the outer FEC encoder 102 (Rout) may be set such that Rin*Rout=0.9. In such an implementation, the inner FEC encoder 106 and corresponding SISO FEC decoder 224 (
As indicated by the dashed lines, the outer interleaver 104 may not be used in all implementations. In this regard, the outer interleaver 104 may be used in implementations where channel fading is such that it is desired to have a big enough interleaver which spans over several OFDM symbols.
In an example implementation, the FEC 106 may not be aligned IDFT 114. The receiver may be configured to be capable of demodulating non-aligned FEC blocks.
In an example implementation where the transmitter has information on the selectivity of the fading channel from transmitter to receiver, the Symbol Mapper 110 may be used to zero out frequency bins that undergo extreme attenuation. In another example the Symbol Mapper 110 may be used to set these frequency bins to values known to the receiver—i.e. pilots. This is beneficial, for example, in the case of a highly distorted power amplifier (PA) since the extremely attenuated bins contribute very little mutual information to the receiver, while also non-linearly mixing with other bins and increasing their distortion. In particular, the receiver typically tracks the OFDM channel continuously. The receiver may periodically determine those frequency bins being so highly attenuated that they inflict more distortion than contributing useful signal. The receiver then periodically sends a list indicating these bins to the transmitter. In which case the Symbol Mapper 110 may zero out the transmission signal of those bins. Thus, the receiver knows the transmitted values on these bins exactly—either zeros or scrambled pilots—for the purpose of computing distortion. The receiver, for the purpose of FEC decoding, considers the bits carried by these subcarriers as punctured by zeroing out the soft decisions (e.g., log likelihood ratios LLRs) for such subcarriers. In some cases, the transmitter may determine by itself the list of bins to zero, e.g. by use of channel reciprocity, in this case a more robust packet header may be transmitted including a list of zeroed bins. In an example, the more robust packet header uses lower constellations and lower rate and thus can be demodulated without aid of the NLS circuitry 216 (e.g., it may be bypassed and/or powered down during processing of the header).
In accordance with aspects of this disclosure, the transmitter may operate in scenarios where the Power Amplifier (PA) of the analog front end 128 is deeply compressed. Without the digital nonlinear function (DNF) circuitry 124 (which introduces digital predistortion such as, for example, protective clipping), the AM to AM characteristic of the PA may not be one-to-one, as depicted by lines 304 and 302 of
A receiver in accordance with an example implementation of this disclosure is depicted in
In an example implementation, fNL is updated according to the rate at which characteristics of the analog front end 128 (e.g., comprising a power amplifier and, in some instances, an upconverter) change. In an example implementation, fNL may be updated each OFDM symbol, or once per every few OFDM symbols. In an example implementation in which burst transmissions are used, fNL may be updated at start of each burst. In an example implementation, fNL may be adapted using dedicated preambles or beacon patterns that are generated once in a while (e.g., periodically, pseudo-randomly, and/or the like) by the transmitter. In an example implementation, fNL may be adapted based on {circumflex over (X)} and/or other metrics calculated based on the LLRs output by FEC decoder 224, as further described below.
In various example implementations, the receiver uses so called “outer” iterations, where at each iteration the output 225 of SISO (Soft-In-Soft-Out) FEC (“inner FEC”) decoder 224, and the output r(n) of ADC 204 is used to improve the received subcarriers by partially compensating for the nonlinear characteristic of the transmitter.
Three example implementations of the NLS (non-linear-solver) circuitry 216 will now be described.
Denoting by d the vector of the distortion in the time domain (i.e. the difference between samples which passed through the PA of AFE 128 and samples which would have been created had the PA of AFE 128 been linear), and denoting by e the vector of errors in the frequency domain (i.e. difference between the vector X (output of symbol mapper 110) and the vector Y′ (output of NLS circuit 216)). It is possible to estimate e, by using the SISO FEC decoder 224 and then estimating d using equation (1).
e=H·F·d (1)
where:
In an example implementation, processing in the NLS circuitry 216 initially focuses only on the stronger elements in vector d, based on the assumption that these elements would appear at locations where the received signal was strong (since the distortion is proportional to the signal level). Metric update and expectancy calculation circuit 232 may process the signal r(n) to identify the d strongest elements. To estimate the d elements, those elements from vector e that have higher probability of being correct may be used. The probability of any particular element of vector e being correct may be determined based on corresponding soft outputs of the SISO FEC decoder 224.
Thus Equation (1) can be punctured in both time and frequency such that there are more observations than parameters. H would then become a punctured DFT matrix with size: K×length(d), where:
A Least Squares method may be used to find the parameters d which best fit the model (i.e., find d for which the cost function shown in equation (2) is minimal).
∥e−H·F·d∥2+dH·W·d (2)
Solving equation (2) for d results in equation (3).
{circumflex over (d)}=inv(FH·HH·H·F+W)·FH·HH·e (3)
where:
Equation (3) is solvable as long as there are more observations than parameters (i.e. the number of elements used in e is larger than the number of elements being estimated in d).
Knowing the parts of the distortion in time domain, the NLS circuitry 216 may reflect it to frequency domain and continue iteratively. With each iteration, the number of elements of e which can be used increases, thus enabling estimation of more elements in d.
In this example implementation, the NLS circuitry 216 may use a cost function of the form of equation (4) for estimating ΔX:
where:
The receiver uses outer iterations where, at each iteration, an estimation of ΔXk (for one or more values of k) that minimizes the cost function of (4) is produced by NLS circuitry 216 and re-fed to the FEC decoder 224. The cost function need not necessarily find the best solution for ΔXk, but need only find new value of ΔXk that reduces the cost, while providing information that is extrinsic to the FEC decoder 224. This refinement is iteratively used in the FEC decoder 224 to further distill {circumflex over (X)}. This iterative scheme uses the nonlinear function fNL as an inner (time domain) code used with an outer (frequency domain) FEC code. The NLS circuitry 216 uses constraints, such as those shown in (4), on the time-domain signal to aid in generation of its output, and the FEC 224 similarly imposes constraints on the frequency domain representation of the same signal, as discussed below, to aid in generation of its output. Each one of the NLS circuitry 216 and the FEC decoder 224 uses a refinement of the data estimation generated by the other in order to improve its own estimate based on different, independent constraints in an iterative scheme.
In an example implementation, {circumflex over (X)} is estimated by the Metric Update block 232 by calculating {circumflex over (X)} using LLR's from the SISO FEC decoder 224 (“mapping” the LLR's).
In an example implementation the cost function (4) is minimized by use of gradient descent to find all or a subset of the subcarriers corrections ΔXk. In an example implementation, ΔXk may be estimated for all subcarriers during each iteration.
In an example implementation, only those subcarriers for which the confidence of being erroneous is high (e.g., based on LLRs output by the SISO FEC decoder 224) may be estimated during a particular iteration and other subcarriers, referred to here as “good,” (e.g. those subcarriers having a decoded LLR above a determined threshold) may be fixed based on an assumption that the output of FEC decoder 224 is correct. The ΔXk for good subcarriers may, for example, be fixed at a value of zero while adapting the ΔXk for the other subcarriers.
The values of X are limited to some constellation χ (e.g. 1024QAM). Therefore the estimated value to the same constellation (i.e. ({circumflex over (X)}k+ΔXk)εχ). This, however, results in a very difficult discrete minimization problem. To overcome this difficulty, in one example implementation, ΔXk+ΔXk is limited to a rectangular range (|re({circumflex over (X)}k+ΔXk)|≦Xmax and |im({circumflex over (X)}k+ΔXk)|≦Xmax) that includes the constellation χ, this is called the hard bound approach. The down side of this approach is that gradient descent convergence is slowed down by the hard bounds. Accordingly, in an example implementation, soft bounds may be used as an additional penalty term to the cost function (e.g., values of {circumflex over (X)}k+ΔXk outside the constellation rectangle are penalized with a penalty increasing with distance from the constellation rectangle, as shown in equation (5) below).
(|re(x)|>Xmax)(|re(x)|−|Xmax|)2+(|im(x)|>Xmax)(|im(x)|−|Xmax|)2 (5)
where:
Referring back to
This implementation is similar to the second example NLS implementation above, but using the frequency-domain cost function of equation (6).
where:
In an example implementation in which phase noise is negligible, H may be a purely diagonal matrix with the DFT of the channel response being on the diagonal. In an example implementation, the matrix H may comprise off-diagonal elements to compensate for phase noise and/or any other Inter-Carrier Interference (e.g. caused by fast varying channel).
In an example implementation, to increase the diversity of the cost with respect to “good” decision errors we may minimize real(X) and imag(X) as separate variables. This allows performance improvement by deciding on the reliability of single dimension symbols (i.e. good/bad decisions taken separately on real part and separately on imaginary part), rather than the reliability of complex symbols (e.g., for a certain subcarrier Xk the real part may be considered bad and take part in minimization, while the imaginary part may be considered good and kept fixed).
Hard Metric Vs. Soft Metric
As mentioned above, the 2nd term in equations (4) and (6) indicates the reliability of Xk. When σk2 is close to 0, the cost would only allow using values of ΔXk which are very small.
In an example implementation, the second term may be dropped from equations (4) and (6). Instead, the NLS circuitry 216 may determine which of the elements in {circumflex over (X)} are reliable, (denoted as “good” subcarriers) and which elements in {circumflex over (X)} are unreliable (“bad” subcarriers) and operate as follows: During the 1st iteration on an OFDM symbol m, the NLS circuitry 216 may assume that all subcarriers are bad subcarriers, and then search for NFFT ΔXk elements (or 2·NFFT ΔXk elements if working independently on real and imaginary dimensions). Then, in later iterations, the NLS circuitry 216 may get information from the Metric Update block 232 which enables the NLS circuitry 216 to lower the number of ΔXk elements in the search (i.e. fix the good subcarriers to constant values), and the problem boils down to finding the bad subcarriers that minimize the cost. Thus, the NLS circuitry 216 may search for Nbad (where Nbad<NFFT) ΔXk elements corresponding to the Nbad bad subcarriers. In such an implementation, the hard metric cost function may be as shown in equation (7).
∥Y−H·DFT(fNL(IDFT({tilde over (X)})))∥2
where:
In other words, NLS circuitry 216 may determine the subcarrier to be a good if the absolute value of the minimal LLR in the sub-carrier is higher than a threshold. For example, for a 1024-point symbol constellation there may be 10 LLRS per symbol and the minimal LLR may be the smallest of the 10. In an example implementation, to increase diversity, the NLS circuitry 216 may determine good and bad subcarriers per dimension, (e.g. the real part of a particular sub-carrier can be declared “good” while the imaginary part of the particular subcarrier may be determined to be “bad”). For example, for 1024QAM there may be 10 LLRS per symbol with the first 5 of them corresponding to the real component and the second 5 of them corresponding to the imaginary component, and the NLS circuitry 216 may determine the smallest LLR of the first 5 and the smallest LLR of the second 5.
In an example implementation, the threshold TH is set dynamically (per iteration and codeword) according to some percentile P of the set of metrics {θk|k=1 . . . 2Ncw
The sorting may be performed in increasing order (i.e. starting with θs=1, which is the most-reliable subcarrier and ending with
which is the least reliable). Per codeword and iteration, the NLS circuitry 216 may set
For each subsequent iteration on the same codeword, and for the next codeword, the NLC circuitry 216 may again sort the metrics and set the threshold based on the Pth percentile.
In an example implementation where the decisions as to which subcarriers are good and which are bad is made per complex subcarrier (rather than separately for the real and imaginary dimensions) the metrics {θk|k=1 . . . kcw
In an example implementation the percentile P used for determining the threshold TH is also changed as the iterations progress. In one example the percentile P may be iteration dependent (i.e. P←Piter).
For the hard metric case, mistaking a subcarrier dimension (i.e. real dimension or imaginary dimension) that contains erroneously decoded bits as good might result in performance reduction, since the good subcarrier dimensions are not corrected by the NLS circuitry 216 (although the FEC may still correct these bits). This problem may be overcome, in one example, by the NLS circuitry 216 assuming we have total of Ng good subcarrier dimensions and running Ng+1 times per codeword in the following way: In order to estimate the real and/or imaginary subcarrier dimensions that are bad, the NLS circuitry 216 runs once to minimize the cost function of equation (6) by optimizing ΔXkεbads while the correction for all the good subcarriers dimensions is fixed to zero (i.e., ΔXkεgood=0). Then, for each good subcarrier dimension, (mεgood) the NLS circuitry 216 runs again to minimize the same cost function by optimizing ΔXkε{m}∪bads while setting ΔXkεgood−{m}=0 from which only the m-th subcarrier dimension correction (i.e. ΔXm) is used. Since in this case NLS is run to obtain both the good subcarrier dimensions as well as the bad subcarrier dimensions, the outer iterations can effectively handle false goods.
In an example implementation, the NLS circuitry 216 may run fewer times per codeword by dividing the good subcarrier dimensions into NB non-overlapping sets called “branches” Bb such that good subcarriers=Ub=1N
In an example implementation, the same branch scheme may be used, but using only one branch (i.e. using b=1). In this implementation, the NLS circuitry 216 may run only twice per codeword—once to estimate all bad subcarrier dimensions (ΔXkεbads) using the good ones, and a second time to estimate the good subcarrier dimensions (ΔXkεgood) without fixing any correction to zero (i.e. all ΔXk are optimized but only output ΔXkεgood is used).
In an example implementation, the percentile P may be increased when the NLS circuitry 216 determines that the number of false good subcarrier dimensions (mistakenly identified as good subcarrier dimensions) for previous iterations is low. This may be based on the latest iteration for branches. In an example implementation, a sequence of successive P values ({Pl}l=1 . . . L) is used. The NLS circuitry 216 initially start with 0 good subcarrier dimensions but after the first iteration uses Pl·Ncw
In an example implementation, a single instance of NLS circuitry 216 is used but still applies a limited correction to the good subcarrier dimensions by taking advantage of the iterative nature of the NLS circuitry 216, which typically would use inner iterations (not to be confused with outer iterations involving the FEC decoder 224). The inner iterations of the NLS circuitry 216 change only the bad subcarrier dimensions without changing the good ones. On each inner NLS iteration the gradient of the good subcarrier dimensions (typically costing no additional complexity) is computed, but without updating the good subcarrier dimensions. After completing the NLS inner iterations, another gradient descent step is performed using the mean of the good gradient (averaged per-subcarrier dimension over all NLS inner iterations) this time updating the good subcarrier dimensions. In an example implementation, this gradient step is incorporated into the last NLS inner iteration. In this case, the percentile P may be determined defining ΔXk as NLS correction to the good subcarrier dimensions (as opposed to previously using the branch correction).
In an example implementation, the NLS circuitry 216 finds the ΔX which minimizes the cost function (4) or (6) using an iterative scheme. In an example implementation, the NLS circuitry 216 uses a gradient decent algorithm (GD).
fNL Model.
There are two basic kinds of nonlinearity models: (1) with memory; and (2) without memory. Memoryless power amplifiers are completely characterized by their AM/AM (Amplitude to Amplitude) and AM/PM (Amplitude to Phase) conversions which depend only on the current input signal value.
Learning the nonlinear model, fNL, that accurately approximates/reproduces the nonlinear distortion introduced by the transmitter PA may be accomplished is several ways. For example, the link between a transmitter and a receiver may be established with low-baud-rate packets using low-order modulations (and/or low-amplitude symbols of a higher-order modulation) which are less vulnerable to nonlinear distortion. The receiver may then recover the payload of such packets (using FEC decoding, which may be reliable because of the relatively low amounts of nonlinear distortion in these packets) to recover the transmitted symbols, and then determine the nonlinear distortion through a comparison of the received symbols with the transmitted symbols. Or, where the transmitter knows its nonlinear response, a representation of fNL may be directly transmitted in a payload of such packets. Thereafter, the link may upgrade to higher modulation orders, and/or higher-amplitude symbols, which may be demodulated by using the learned nonlinear model. As another example, the transmitter-receiver pair may use probe signals, known to the receiver a priori, to learn the nonlinear model, where the probe signals may be as specified by an applicable standard. As another example, additional training signals, to be used by the intended receiver for channel estimation and learning of the nonlinear characteristic of the transmitter, may be appended to preambles defined in existing standards.
Example circuitry for modeling a nonlinearity is shown in
In
The model of
Given this general model we can implement the gradient descent with O(N*log N) (where O is a positive number) complexity. Specifically, fNL(x) can be denoted as a complex time function of a complex frequency vector x (note that fNL(x) is not necessarily analytical). It is based on scalar complex functions fNL
The cost function r(x) may then be defined as shown in equation (10).
r(x)=y−H·DFT(fNL(x)) (10)
where Pv, Qv is the frequency response of hpre
The “complex pseudo differential” notation of equation (11) can be used for differentiating the scalar complex function of a complex variable, where Δx=re(Δx)+j·im(Δx).
The resulting gradient is shown in equation (12).
where:
In addition to modeling the PA of the transmitter, the NLS circuitry 216 may also model linear and non-linear response of pre-PA circuitry which operates on x(t) (121 in
The protective clip of the DNF circuitry 124 may have the form shown in equation (13).
where pclip is the threshold at which we clip the transmission signal in order to remain in well behaved PA input range (e.g., not exceed a threshold amount of compression).
The combined response, for which the gradient (substantially using the derivation chain rule) is to be calculated may therefore be given by equation (14).
f
NL(hprePA*fPC(x)) (14)
where fNL is the model of the response of the PA.
Thus, the sampling rate and bandwidth of the DAC and anti-aliasing filters 126, should be wide enough to accommodate the bandwidth of fPC(x) (which is relatively wide due to clips).
In an example implementation where hprePA is not too sharp (e.g., rolls off less than some threshold amount per decade) within this bandwidth, the transmitter can digitally compensate for hprePA (e.g., by amplifying frequencies that are attenuated by hprepA). In an example implementation where hprepA must be made sharp (e.g. to prevent transmitting aliases), the transmitter can compensate for hprePA to transform it to a linear response—hprePAO—that is known to the receiver. In another example, if the transmitter uses digital predistortion, the combined response fNL(hprePA*fPC(x)) may be transformed to a soft limiter fPC(x) (e.g., by digital predistortion circuitry residing between 124 and 126 in
For a soft bounds approach, a penalty term (5) is added to the cost, and the NLS circuitry 216 computes the corresponding gradient as shown in (15).
where
Circuitry for calculating the gradient (except for the optional soft bounds term) is depicted in
r
k
=y
k
−H
k
·DFT(fNL(x))k (16)
where:
The Gradient decent algorithm can then be expressed as in equation (17).
where μk is a step size, that is 0 for good subcarriers, and a non-zero fixed value for bad subcarriers.
The last term of equation 22 may be used for a ‘soft-metric’ as described above. It is noted that, when Pv is pure delay, the scheme can be simplified extensively. Also, the nonlinear model, though extensive, is just an example. Other, even more elaborate models may be used and a similar derivation may be applied.
In an example implementation, the transceiver and receiver of
In an example implementation, the FEC decoder 224 may be an iterative decoder. In an example implementation, the iterative decoder may be run a sufficient number of iterations until it fully converges. However, since the FEC decoder 224 needs to be run for multiple outer iterations, the overall decoder complexity is significant. In an example implementation, in order to reduce the decoding complexity, the iterative FEC decoder is not run until it converges, but rather is stopped substantially prematurely. Despite stopping prematurely, state (accumulated extrinsic information) of the iterative FEC decoder 224 may be maintained and not be reset every outer iteration. With a message passing decoder, this maintenance of state information may be accomplished by continuing the message passing across outer iterations (i.e., messages generated but not processed at outer iteration q, since decoding was stopped, are processed at outer iteration q+1.) In general, this corresponds to adding the NLS as additional check nodes in a Tanner graph which combines both FEC and nonlinearity constraints.
To illustrate, an example implementation in which the FEC decoder 224 is an LDPC decoder will now be described using the following notation:
At each outer iteration, the LDPC decoder 224 is fed with output L(i) from demapper 220. Then, the LDPC decoder 224 applies (18) to L(i) and the L(rji) messages stored from the previous outer iteration (denoted L(rj′i)), where for the first outer iteration L(rj′i)=0) to generate variable node to check node messages. The L(rj′i) messages were generated using (19) to compute the decoded bits output LLRs by the LDPC in the previous outer iteration and, as said, are then processed using (18) to generate messages to check nodes in current (successive) outer iteration. In the current outer iteration, the latest NLS updated L(i), and not the old L(i) that was used for the previous outer iteration, is used in (18).
The LDPC algorithm runs several inner iterations of the form shown in equations
(18) and (19).
∀i,j:L(qij)=L(i)+Σj′εC
∀j,i:L(rji)=2a tan h(πi′εv
After completing the LDPC iterations, the final check node to variable node messages L(rji) are stored for the next outer iteration, and the LLRs output by FEC decoder 224 are computed using equation (20).
In the example just discussed, Tanner graph iterative decoding was used in a way that alternates between NLS check node iterations and FEC check node iterations, repeating for some number of outer iterations which may be predetermined and/or dynamically determined. In other implementations, the FEC+NLS Tanner graph based decoder may be iterated in different ways. For example, the NLS and FEC check node may be iterated in parallel, or subsets of NLS and FEC check nodes may be iterated sequentially or in parallel. A similar approach is applicable for other iterative decoders.
As used here, the “channel response” is the response of the communication medium (e.g., air, copper cable, fiber, etc.) between the output (e.g., antenna for wireless) of the transmitter and the input (e.g., antenna for wireless) of the receiver, and does not include the power amplifier or receiver circuitry. In an example implementation, the channel response (H) may be estimated using preamble(s) or beacon(s) which have low peak-to-average-power ratio (PAPR) such that it suffers only a negligible amount of nonlinear distortion. In an example implementation, the preambles or beacons may intentionally have high PAPR (thus experiencing relatively severe nonlinear distortion), but may be generated/selected to have characteristics (e.g., occupying at least a determined number and/or range of frequencies, occupying at least a determined number of signal levels, and/or providing at least a determined amount of repetition of frequencies and/or signal levels) that allow the same preamble or beacon to be used for both nonlinearity estimation and channel response estimation. In an example implementation, the channel response (H) may be estimated as part of the iterative process performed in the NLS circuit 216, as discussed below.
In an example implementation, in order to estimate both distortion and channel response from the same preamble, the receiver may operate to separate distortion effects and channel effects. To enable this separation, special sequences having the following properties may be transmitted by the transmitter: The sequence is composed of a set of N values that, in the time domain, is denoted as p[0], p[1] . . . p[N−1], this set of values is rich enough (e.g., a sufficient number and/or diversity of power levels are present in the sequence) to capture both nonlinearity and channel response (e.g., as few as two levels may suffice for estimating the channel response but more levels may be better for estimating the nonlinearity). The preamble is then composed of a permutation of M such sets of these N values. Therefore circuitry for estimating the distortion and channel (e.g., the NLS circuitry 216) needs to estimate a finite number (N) of distorted transmitted values of the form fNL(p[k]) for k=0 . . . N−1, and the channel response h[0], h[1] . . . h[-1], where is the length of the channel response. This results in N+ unknowns with N·M equations, so M>=1+/N is needed for a unique solution. In addition, smoothness constraints may be placed on the estimated nonlinearity in order to reduce estimation noise and/or to reduce the required value of M. By repeating the same values (the M permutations), the number of unknowns remains constant even when preamble length increases, thus enabling a unique solution. In an example implementation, the value of N is selected based on the desired granularity with which it is desired to estimate fNL. This granularity and the set of values selected (p[0], p[1] . . . p[N-1]) is not necessarily uniformly spaced, as, for example, lower sampling granularity may be used for lower voltage levels (where fNL has low distortion) and higher granularity at higher voltage levels (that are highly distorted). Once the set of preamble values p[0], p[1] . . . p[N-1] have been determined, a plurality of pseudo random permutations of these values are selected for transmission to support distortion and channel estimation. In an example implementation, the permutations are selected such that the resulting preamble segments are substantially white in frequency.
In an example implementation, the channel response may be estimated using a time domain synchronous (TDS)-OFDM scheme where, instead of using pilots for channel estimation, the guard period is utilized for transmission of a training sequence (i.e. data that is known to the receiver a priori). This scheme is appropriate for the case where the received signal is distorted since the training sequence can be selected to have a desired PAPR (and thus desired amount of nonlinear distortion). By selecting the training sequence, which operates in the time domain, to have a low PAPR (and thus distortion), it can be used for accurate channel estimation. In an example implementation using the TDS-OFDM approach, the same training sequence may be used for nonlinearity estimation on top of channel response estimation. In an example implementation, the TDS-OFDM scheme may be used for nonlinearity estimation (i.e., to determine fNL) but not channel estimation.
In an example implementation using TDS-OFDM, where the data symbol is preceded by a training sequence, the receiver may use a permuted sequence approach similar to that described above. In this case, the same basic set of values p[o], p[1] . . . p[N-1] where N> may be used every TDS-OFDM training sequence, but with each symbol using a different permutation of the same sequence of values. In such an implementation, the receiver may use multiple training sequences (from multiple symbols) to estimate or improve estimation of both the channel response and the nonlinearity. This permuted training sequence is also useful to reduce correlation between the desired signal training sequence, and any interfering sequence of co-channel signals (e.g., interference between different users belonging to different cells in a cellular system).
In an example implementation, a TDS-OFDM scheme may be used for deriving the off-diagonal elements of H for phase noise compensation. In an example implementation, these elements are determined by calculating one or more derivatives (e.g., the 1st and/or 2nd derivative(s)) of H. In an example implementation, the NLS circuitry 216 may calculate the derivative(s) using: (1) the training sequence of a current symbol, (2) training sequence of a next symbol, and (3) tentative decisions of X for the current symbol. Thus, the channel response can be estimated along 3 time instances which enables calculating 1st and 2nd derivative.
In an example implementation the channel may be estimated using je at output of circuit 232, or {circumflex over (X)}+ΔX at output of NLS circuitry 216. This may be represented as shown in equation (21).
where
Thus, even if {circumflex over (X)} is with errors, the ‘smoothing’ of filter W enables accurate channel estimation. Thus, per each iteration when errors decrease, the NLS circuitry 216 can derive an improved channel estimation. For the 1st iteration on a particular OFDM symbol, in slow-varying channels, the NLS circuitry 216 may use the channel estimation of a previous symbol (the immediately previous symbol or an even earlier symbol). For the 1st iteration on a particular OFDM symbol, in fast-varying channels, the NLS circuitry 216 may use a TDS-OFDM or similar scheme.
In an example implementation (e.g. where transmit power control continuously changes the input backoff), the transmitter may inform the receiver of its current input backoff. In an example implementation, this can be transmitted using the packet header and, assuming the packet header uses lower constellation points, the header can be demodulated despite the compression. This allows the receiver to use the fNL estimation computed for one or more previous packets after compensating it for input backoff changes. The previous fNL estimation may be used either instead of the fNL estimation generated from a training sequence or in addition to the fNL estimation generated from a training sequence (to reduce estimation noise). When the input backoff changes, the transmitter may also vary the protective clip saturation level to correspond to an approximately fixed level below the analog saturation ppoint (Psat). That is, in an example implementation, the protective clip saturation level is a function of the input backoff. The receiver can then use the input backoff transmitted as part of the header to set its expected protective clip level to be exactly equal to that of the transmitter.
In a conventional OFDM system, a cyclic prefix may be used to reduce ISI and to simplify equalization to per bin multiplication. This is the result of the cyclic prefix turning linear convolution into cyclical convolution. A receiver such as shown in
In this case, summation occurs not only over NFFT samples, but also over the cyclic prefix. Thus, if the receiver uses the cyclic prefix its energy is not wasted. The ISI from the previous symbol is mitigated by convolving the symbol estimation for the previous symbol with the isi response (hisi), where the previous symbol estimate ({circumflex over (X)}t-1) is based on processing of the previous symbol by the NLS circuitry 216 (which has more advanced outer iteration, see discussion of pipelined structure below). The receiver of
In an example implementation, the receiver of
For the case of misalignment between code words and symbols, operating the NLS circuitry 216 code word by code word (i.e. not pipelined) may induce some performance loss because, when applying NLS circuitry 216 for code word M that shares a symbol with code word M+1, the NLS circuitry 216 has no estimation ({circumflex over (X)}k) from the FEC decoder 224 for subcarriers in the shared symbol belonging to code word M+1. In an example implementation, the pipelined implementation is used to obtain {circumflex over (X)}k for the shared symbol. That is, the first path may handle outer iteration J (a positive integer) on code word M while a second path (if present) may operate on outer iteration J−1 on code word M+1. In this case, for first path outer iteration J running on last/shared symbol (of code word M), the NLS circuitry 216 may use the shared symbol subcarriers estimations {circumflex over (X)}k obtained by the FEC decoder 224 for second path outer iteration J−1 on code word M+1.
The pipelined structure can also be used in OFDMA scenario where different packets from different users (on adjacent frequencies) are not aligned. In OFDMA, non-linear distortion leaks from one user to the adjacent users in frequency. The NLS receiver can start processing a user packet as soon as a code word becomes available without using “goods”, related to code words that haven't been processed yet. However whenever an adjacent (in frequency or time) code word has been processed the receiver of
The channel is assumed to be composed of several reflections, each reflection delays the transmitted signal and multiplies it by a complex factor, the formulation for such a channel is depicted in equation (23).
where, in slow varying channels (e.g., where estimation using a one-symbol delay is provides sufficient SNR), and when phase noise is weak enough (e.g., below a determined threshold), it is assumed that hi(t) is constant within the duration of an OFDM symbol. However, in the presence of phase noise and/or when channel varies fast this assumption no longer holds. In this case, a Taylor expansion may be used around the middle of the OFDM symbol, which results in the formulation of equation (24).
Where hi(p) is the pth derivative of hi(t) at the middle of the OFDM symbol (i.e. at time instant Tsym/2).
Using (24), and under the assumption that the cyclic prefix is longer than the maximal path delay, τ, it can be shown that:
(i.e.
Equation (25) can be represented in matrix form as shown in equation (26).
{circumflex over (X)}=H·X (26)
where:
Since L(p) decays, which accounts for the fact that the variations cause Inter Carrier Interference (ICI) that diminishes as carriers are further apart, considering only a few off-diagonal elements is sufficient in an example implementation.
Approximation of Hk(p) requires knowledge of Hk at p+1 time instances. In an example implementation using TDS-OFDM, Hk(1) is estimated using the estimation of Hk in the pseudorandom binary sequence that precedes the symbol and the pseudorandom binary sequence that follows it. This implementation provides accurate estimations of Hk at symmetrical, relatively short (approximately half a OFDM symbol period) distances from the middle of the OFDM symbol. For other implementations where the distances are larger (e.g., to more than the duration of one OFDM symbol), the accuracy of the approximation of the derivative becomes less accurate. In an example implementation in which pilots are transmitted as well, then the receiver may be enabled to generate an accurate estimate Hk(2).
The graph of
In contrast to the system represented by the graph of
SNR=30.69, BER=3.4108e-001, PAR=0 dB, BO=−2.6 dB, Iter 1
SNR=30.69, BER=1.9686e-001, PAR=0 dB, BO=−2.6 dB, Iter 2
SNR=30.69, BER=1.4653e-001, PAR=0 dB, BO=−2.6 dB, Iter 3
SNR=30.69, BER=1.1454e-001, PAR=0 dB, BO=−2.6 dB, Iter 4
SNR=30.69, BER=7.8093e-002, PAR=0 dB, BO=−2.6 dB, Iter 5
SNR=30.69, BER=4.6717e-002, PAR=0 dB, BO=−2.6 dB, Iter 6
SNR=30.69, BER=2.1066e-002, PAR=0 dB, BO=−2.6 dB, Iter 7
SNR=30.69, BER=5.7000e-003, PAR=0 dB, BO=−2.6 dB, Iter 8
SNR=30.69, BER=8.0116e-004, PAR=0 dB, BO=−2.6 dB, Iter 9
SNR=30.69, BER=0.0000e+000, PAR=0 dB, BO=−2.6 dB, Iter 10
In block 802, UE 702_1 and UE 702_2 attach to basestation 704. The handshaking/signaling that occurs as part of the attachment may include communication of information that enables the basestation to determine whether each of the UEs comprises the digital nonlinear function circuit (see
In block 804, basestation 704 determines that UE 702_1 comprises digital nonlinear function circuit 122 and UE 702_2 does not comprise digital nonlinear function circuit 122.
In block 806, the basestation classifies UE 702_1 and 702_2 based on lack or presence of digital nonlinear function circuit. For example, even assuming UE 702_1 and 702_2 have RF front-ends which exhibit substantially similar performance (e.g., power amplifiers having substantially similar transfer functions and mixers/local oscillators which introduce substantially similar amounts of phase noise) UE 702_1 may be classified into a first class while UE 702_2 is classified into a second class, where the first class permits, for example, higher transmit power than the second class, higher modulation order than the second class, higher code rate than the second class, and/or other characteristics corresponding to higher performance (e.g., as measured by throughput).
In block 808, the basestation 704 configures itself to use its NLS circuit (see
In block 810 the basestation 704 sends UE 702_1 and 702_2 their respective classifications (and/or parameter values based on their classifications).
In block 812, the UEs 702_1 and 702_2 configure themselves based on their respective classifications. For example, each may configure its power amplifier backoff, its order of modulation, and its FEC code rate based on its classification. The UE 702_1 may additionally configure its digital nonlinear function based on the classification (e.g., either directly based on the classification and/or indirectly based on the configuration of the power amplifier, etc. according to the classification).
In block 814, the configured UE 702_1 transmits a signal.
In block 816, the basestation 704 receives the signal transmitted by UE 702_1 and processes the signal using its NLS circuit.
In block 818, the configured UE 702_2 transmits a signal.
In block 820, the Basestation 704 receives the signal from UE 702_2 and processes without using NLS circuit.
Aspects of the above multi-carrier communication system can also be applied to a single-carrier communication system such as shown in
As the system of
In various example implementations, the single-carrier receiver 1000 uses iterations, where at each iteration the SISO (Soft-In-Soft-Out) FEC (“inner FEC”) output together with the ADC output is used to improve the received symbols by partially compensating for the nonlinear characteristic of the transmitter.
Using the following cost function:
The 2nd term in equation (27) above indicates the reliability of Xk. When σk2 is close to 0, the cost would not allow finding ΔXk which are not very small. In other words, the bigger the estimated value of ΔXk, the less certain the system must be that the estimate is correct before using the estimate.
In another example implementation, the second term may be dropped from (27). Rather, the NLS may determine which of the elements in x are reliable, (denotes as “good symbols”) and which elements in x are unreliable (“bad symbols”). During the 1st iteration code-word in the NLS, it may be assumed that all symbols are bad. The NLS may then search for CW ΔXk elements. Then, in later iterations, the NLS gets information from the SISO FEC decoder which enables it to lower the number of ΔXk elements in the search, i.e. the good symbols are constants, and the problem boils down to finding the bad symbols that minimize the cost. Thus we search for Nbad (where Nbad<CW) ΔXk elements corresponding to the Nbad bad symbols. In such an implementation, the hard metric cost function may be:
In a Faster Than Nyquist (FTN) scheme, the baud rate (i.e. the rates in which the symbols are transmitted) is larger than the bandwidth of the transmission. The transmit filter (p) has to be designed to filter out energy outside the allowed bandwidth which creates Inter Symbol Interference (ISI). Using FTN in conjunction with aspects of this disclosure proves useful for at least two reasons:
A conventional de-mapper would consider the noise variance when calculating the LLR's. In the presence of non-linearity it is required to consider not only the additive noise but also distortion noise.
In accordance with an example implementation of this disclosure, single-carrier receiver (e.g., the receiver 1000) comprises a forward error correction (FEC) decoder and a nonlinearity compensation circuit. The nonlinearity compensation circuit is operable to generate estimates of constellation points transmitted on a received signal based on soft decisions from the FEC decoder and based on a model of nonlinear distortion introduced by a transmitter from which the received signal was received. The generation of the estimates may be based on a measure of distance between a function of the received signal and a synthesized version of the received signal. The generation of the estimates may comprise iterative processing of symbols of the received signal, and the iterative processing may comprise a plurality of outer iterations and a plurality of inner iterations. The estimates may be an output of the nonlinearity compensation circuit during a first particular outer iteration, and the soft decisions may be an output of the FEC decoder during a second particular outer iteration preceding the first particular outer iteration. The estimates may be an output of the nonlinearity compensation circuit during a first particular outer iteration, and for each of the inner iterations for the particular outer iteration, the FEC decoder may generate variable-node-to-check-node messages based on the estimates. For a first one of the inner iterations for a first particular one of the outer iterations, the FEC decoder may generate variable-node-to-check-node messages based on check-node-to-variable-node messages generated during a last one of the inner iterations for a second particular one of the outer iterations. For the second particular one of the outer iterations, the inner iterations may be halted before the FEC decoder converges. For a particular one of the outer iterations, the soft decisions from a previous one of the outer iterations may be categorized and adjusted based on a category (e.g., “good” or “bad”) into which they are placed, the adjustment resulting in adjusted soft decisions, and the estimates for the particular one of the iterations may be generated based on the adjusted soft decisions. For a particular one of the outer iterations, an expectation may be calculated using the soft decisions from a previous one of the outer iterations, and the generation of the estimates may be based on the expectation. The nonlinearity compensation circuitry may be operable to, during each successive outer iteration, refine one or more of the estimates generated during a previous outer iteration based on the soft decisions output by the FEC decoder during the previous outer iteration. The refinement may be limited by one or more constraints (e.g., constrained to a determined value or range of values). The constraints may be determined based on the soft decisions (e.g., based on whether reliability is above or below a threshold). The constraints may be updated for each successive one of the outer iterations. The generation of the estimates of the transmitted constellation points may be based on a metric of distance between symbol estimation and the expectation, and the metric may be affected from soft reliability measures. The nonlinearity compensation circuit may be operable to generate the model based on a training sequence transmitted by the transmitter. The training sequence may have a peak-to-average power ratio that causes an output of the power amplifier of the transmitter to compress and introduce nonlinear distortion. The training sequence comprises multiple permutations of a determined sequence of symbols. For processing a particular received symbol, the nonlinearity compensation circuit may be operable to determine the model of nonlinear distortion based on a first training sequence that preceded the particular received symbol and a second training sequence that followed the particular received symbol. The nonlinearity compensation circuitry may be operable to use the first training sequence and the second training sequence to estimate phase noise present in the received signal. Each of the soft decisions may correspond to only one or both of: a real dimension of the received signal and an imaginary dimension of the received signal. The estimate of nonlinear distortion introduced by the transmitter accounts for a digital nonlinear function implemented in the transmitter. The digital nonlinear function may be a protective clip.
As utilized herein the terms “circuits” and “circuitry” refer to physical electronic components (i.e. hardware) and any software and/or firmware (“code”) which may configure the hardware, be executed by the hardware, and or otherwise be associated with the hardware. As used herein, for example, a particular processor and memory may comprise a first “circuit” when executing a first one or more lines of code and may comprise a second “circuit” when executing a second one or more lines of code. As utilized herein, “and/or” means any one or more of the items in the list joined by “and/or”. As an example, “x and/or y” means any element of the three-element set {(x), (y), (x, y)}. As another example, “x, y, and/or z” means any element of the seven-element set {(x), (y), (z), (x, y), (x, z), (y, z), (x, y, z)}. As utilized herein, the terms “e.g.,” and “for example” set off lists of one or more non-limiting examples, instances, or illustrations. As utilized herein, circuitry is “operable” to perform a function whenever the circuitry comprises the necessary hardware and code (if any is necessary) to perform the function, regardless of whether performance of the function is disabled, or not enabled, by some user-configurable setting.
The present method and/or system may be realized in hardware, software, or a combination of hardware and software. The present methods and/or systems may be realized in a centralized fashion in at least one computing system, or in a distributed fashion where different elements are spread across several interconnected computing systems. Any kind of computing system or other apparatus adapted for carrying out the methods described herein is suited. A typical combination of hardware and software may be a general-purpose computing system with a program or other code that, when being loaded and executed, controls the computing system such that it carries out the methods described herein. Another typical implementation may comprise an application specific integrated circuit or chip. Some implementations may comprise a non-transitory machine-readable (e.g., computer readable) medium (e.g., FLASH drive, optical disk, magnetic storage disk, or the like) having stored thereon one or more lines of code executable by a machine, thereby causing the machine to perform processes as described herein.
While the present method and/or system has been described with reference to certain implementations, it will be understood by those skilled in the art that various changes may be made and equivalents may be substituted without departing from the scope of the present method and/or system. In addition, many modifications may be made to adapt a particular situation or material to the teachings of the present disclosure without departing from its scope. Therefore, it is intended that the present method and/or system not be limited to the particular implementations disclosed, but that the present method and/or system will include all implementations falling within the scope of the appended claims.
This patent application makes reference to, claims priority to, and claims benefit from U.S. Provisional Application Ser. No. 62/048,329, which was filed on Sep. 10, 2014; and U.S. Provisional Application Ser. No. 62/042,458, which was filed on Aug. 27, 2014. Each of the above stated applications is hereby incorporated herein by reference in its entirety.
Number | Date | Country | |
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62048329 | Sep 2014 | US | |
62042458 | Aug 2014 | US |