BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention related to enhancement mode Lus FET for single-ended forward converter, especially Lus FET with novel structures replacing prior art static shielding diode (SSD), or body diode, or intrinsic diode, in prior art FET may be with polarity reversed are taught by the ROC. TW. Pat. Nos. 1295,527; 1295,528; 1301,013; 1301,014; 1301,015. According to such philosophy of the present invention, the Single-ended forward converter may be achieved with two Lus N-Channel FET, or two Lus P-Channel FET.
2. Description of Related Art
As shown in FIG. 5, a structure of the prior art single-ended forward converter circuit, has a pulse generator PG, a switching element SW, a high frequency transformer T1, a primary winding VP and secondary winding VS of the high frequency transformer T1, first terminal A and second terminal B of the secondary winding VS, a pair of first and second switching element F1, F2, a first driving circuit R1 and ZD1, a second driving circuit R2 and ZD2, a inductor L1, a capacitor C1, a load LD, and DC voltage output terminal C, D.
Each of the first and second switching element F1, F2, comprises a prior art N-Channel FET shown in FIG. 5, first driving element comprises the series-connected circuit of the voltage drop resistor R1 and zener diode ZD1, second driving element comprises the series-connected circuit of the voltage drop resistor R2 and zener diode ZD2.
As shown in FIG. 5, when the positive of secondary winding VS in the terminal A, terminal B is negative, the switching element F1 is turned on, the switching element F2 is turned off, the path of the current flow is from terminal A of the secondary winding VS, though static shielding diode D2 of the switching element F2, switching element F1, and back to terminal B of the secondary winding VS, the possibility that F1, F2, may be burnout by current of the prior art N-Channel FET.
SUMMARY OF THE INVENTION
In order to provide Lus FET that may elevate the efficiency of single-ended forward converter, the present invention is proposed the following object:
The first object of the present invention to provide Lus FET for a single-ended forward converter, in which the converter simplicity is improved.
The second object of the present invention provide a Lus FET for single-ended forward converter, can be eliminate the destruction of prior art FET, and windings due to a large current.
According to the defects of the prior art technology discussed above, a novel solution, the Lus FET is proposed in the present invention, which provides higher efficiency in single-ended forward converter.
BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 shows the structures of a prior art N-Channel FET.
FIG. 2 shows the structures of a Lus N-Channel FET.
FIG. 3 shows the structures of a prior art P-Channel FET.
FIG. 4 shows the structures of a Lus P-Channel FET.
FIG. 5 shows the structures of a prior art FET for single-ended forward converter.
FIGS. 6A and 6B shows the single-ended forward converter of the present invention use two Lus N-Channel FET.
FIGS. 7A and 7B shows the single-ended forward converter of the present invention use two Lus P-Channel FET.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
FIG. 1 shows the structures of a prior art N-Channel FET, a N-junction of the SSD connected to drain of the prior art N-Channel FET, a P-junction of the SSD connected to source of the prior art N-Channel FET.
FIG. 2 shows the structures of a Lus N-Channel FET, a N-junction of the SSD connected to source of the Lus N-Channel FET, a P-junction of the SSD connected to drain of the Lus N-Channel FET.
FIG. 3 shows the structures of a prior art P-Channel FET, a N-junction of the SSD connected to source of the prior art P-Channel FET, a P-junction of the SSD connected to drain of the prior art P-Channel FET.
FIG. 4 shows the structures of a Lus P-Channel FET, a N-junction of the SSD connected to drain of the Lus P-Channel FET, a P-junction of the SSD connected to source of the P-Channel FET.
As shown in FIGS. 6A and 6B, a structure of the present invention single-ended forward converter circuit, has a pulse generator PG, switching element SW, a high frequency transformer T1, a primary winding VP and secondary winding VS of the high frequency transformer T1, first terminal A and second terminal B of the secondary winding VS, a pair of first and second switching element Q1, Q2, a first driving circuit R1, ZD1, a second driving circuit R2, ZD2, a inductor L1, a capacitor C1, a load LD, and DC voltage output terminal C, D.
Each of the first and second switching element Q1, Q2, comprises a pair Lus N-Channel FET shown in FIGS. 6A and 6B, a first driving circuit comprises the series-connected circuit of the first voltage drop resistor R1 and first zener diode ZD1, a second driving circuit comprises the series-connected circuit of second the voltage drop resistor R2 and second zener diode ZD2.
As shown in FIG. 6A, when the switching element SW is on, a current flowing from the DC power source PS to the primary winding VP, and a voltage is induced in the secondary winding VS, positive of secondary winding VS in the terminal A, terminal B is negative, the N-junction is positive of the first zener diode ZD1 of the first driving circuit, the P-junction is negative of the first zener diode ZD1 of the first driving circuit, the first switching element Q1 is turned on; the P-junction is positive of the second zener diode ZD2 of the second driving circuit, the N-junction is negative of the second zener diode ZD2 of the first driving circuit, the second switching element Q2 is turned off, the path of the current flows is from terminal A of the secondary winding VS though inductor L1, a load LD, first switching element Q1, and back to terminal B of the secondary winding VS.
As shown in FIG. 6B, when the switching element SW is turned Off, a voltage or counter electromotive force is develop in the inductor L1, the negative of secondary winding VS in the terminal A, terminal B is positive, the P-junction is positive of the first zener diode ZD1 of the first driving circuit, the N-junction is negative of the first zener diode ZD1 of the first driving circuit, the first switching element Q1 is turned off; the P-junction is negative of the second zener diode ZD2 of the second driving circuit, the N-junction is positive of the second zener diode ZD2 of the second driving circuit, the second switchin element Q2 is turned on, the path of the current flows is from inductor L1 terminal C of DC voltage output terminal though a load LD, second switching element Q2, and back to terminal A of the inductor L1.
As shown in FIG. 7A, when the positive of the terminal A of the secondary winding VS of the high frequency transformer T1, terminal B is negative, the first terminal is positive of the first driving resistor R1, the second terminal is negative of the first driving resistor R1, the second terminal of the first driver resistor R1 and the first terminal of the second driving resistor R2 connected together to gate of the first switching element U1, the first terminal is positive of the second driving resistor R2, the second terminal is negative of the second driving resistor R2 connected to terminal B of the secondary winding VS, the first switching element U1 is turned on, the first terminal is positive of the third driving resistor R3, the second terminal is negative of the third driving resistor R3, the second terminal of the third driver resistor R3 and the first terminal of the fourth driving resistor R4 connected together to gate of the second switching element U2, the first terminal is positive of the fourth driving resistor R4, the second terminal is negative of the fourth driving resistor R4 and connected to terminal B of the secondary winding VS, the second switching element U2 is turned off, the path of the current flow is from terminal A of secondary winding Vs though the switching element U1, a inductor L1, a load LD and back to terminal B of the secondary winding VS of high frequency transformer T1.
As shown in FIG. 7B, when the negative of the terminal A of the secondary winding VS of the high frequency transformer T1, the first terminal is negative of the first driving resistor R1, the second terminal is positive of the first driving resistor R1, the second terminal of the first driver resistor R1 and the first terminal of the second driving resistor R2 connected together to gate of the first switching element U1, the first terminal is negative of the second driving resistorR2, the second terminal is positive of the second driving resistor R2, the first switching element U1 is turned off; the first terminal is negative of the third driving resistor R3, the second terminal is positive of the third driving resistor R3, the second terminal of the third driver resistor R3 and the first terminal of the fourth driving resistor R4 connected together to gate of the second switching element U2, the first terminal is negative of the fourth driving resistor R4, the second terminal is positive of the fourth driving resistor R4 and connected to terminal D of the DC voltage output terminal, and terminal B of the secondary winding VS, second switching element U2 is turned on, a voltage or counter electromotive force is develop in the inductor L1, the negative of secondary winding VS in the terminal A, second terminal of the inductor L1 is positive, the path of the current flows is from second terminal of the inductor L1 though terminal C of the DC voltage output terminal, a load LD, terminal D of the DC voltage output terminal, second switching element U2 and back to the first terminal of the inductor L1, the drain of the first switch element U1 and drain of the second switching element U2 connected together to first terminal of the inductor L1.
As shown in FIGS. 6A, 6B, the first and second driving circuit for driving first and second switching element Q1, Q2, in FIGS. 7A, 7B, the first driving circuit comprises a first driving resistor R1 and second driving resistor R2 for driving first switching element U1, the second driving circuit comprises a third driving resistor R3 and a fourth driving resistor R4 for driving second switching element U2, the operation principle of the driving circuit of FIGS. 6A, 6B and FIGS. 7A, 7B is same, both of the driving circuit can be replace, and but should not be limit.