In single-phase inverter systems, particularly photovoltaic (PV) single-phase inverters, constant input power to the inverter is desired, whereas pulsating instantaneous power is required by a single-phase AC load as produced by the sinusoidal voltage and current. In this case, the pulsating power creates a second-order ripple on the DC voltage or current, which reduces the PV conversion efficiency if not decoupled from the PV panels [1].
In a passive power decoupling method, an electrolytic capacitor which has a large size and short lifespan compared with PV panels is used at the DC side of the inverter, and is the limiting factor for the lifetime of PV systems. To replace the bulky electrolytic capacitor with a small film capacitor, a few current-reference active power decoupling methods have recently been proposed in the literature [2]-[4], which are commonly applied in flyback inverters. Since flyback inverters are not suitable for power higher than several hundred watts due to the difficulty of designing the flyback transformers, bridge inverters have been widely used in the distribution systems such as PV systems. However, the DC voltage must be constantly high to guarantee the operation of bridge inverters, which is difficult to achieve by unpredictable renewable energy and thus necessitates a voltage-boosting mechanism. In an attempt to integrate voltage-boosting capability and power decoupling capability, the prior art bridge inverter illustrated in
To facilitate further description of the embodiments, the following drawings are provided in which:
According to an embodiment, the present invention relates to an inverter topology with voltage boosting and power decoupling, which has advantages such as adapting to various DC input voltages and eliminating the large electrolytic capacitor. The inverter topology of the present embodiment maintains the advantages of a bridge inverter, while adding the functionalities of active power decoupling and adapting to a wide range of input voltage.
According to another embodiment, the present invention relates to a single-phase voltage source inverter including a first stage configured to be connectable to a DC source, and a second stage configured to be connectable to an AC load which in some embodiments includes an AC grid, the first stage comprising a bridge leg comprising first and second decoupling switches, the bridge leg connected through an inductor to a decoupling capacitor, where the decoupling capacitor is in series with the DC source when the inverter is connected to the DC source, and the second stage comprising a bi-directional inverter, such as an H-bridge inverter including first, second, third and fourth switches. In one embodiment, the decoupling capacitor is a small film capacitor. In another embodiment, the first and second decoupling switches are the only decoupling switches in the bridge leg. In other embodiments, other types of bi-directional inverters can be used. In some embodiments, the inverter further includes a first controller for modulating the first stage and a second controller for modulating the second stage. In some embodiments, the first controller uses pulse width modulation and the second controller uses sinusoidal pulse width modulation. In other embodiments, the first controller uses pulse width modulation and the second controller uses pulse energy modulation.
According to another embodiment, the present invention relates to a method of modulating a bi-directional inverter using pulse energy modulation to provide triggering signals to the switches of the inverter.
Topology Design
The VSI 2 includes a first stage 8 with voltage-boosting and power decoupling functionalities and a second stage 10 with power inversion functionality. In the present embodiment, the first stage 8 is a bi-directional buck-boost converter and includes a bridge leg 12 connected through an inductor L to a decoupling capacitor CD where the decoupling capacitor CD is in series with the DC source 4. The bridge leg 12 includes switches Sc1 and Sc2. The inductor L has high flexibility because it does not need to withstand DC current from the DC source 4, whereas an inductor in a typical prior art boost inverter does. In other embodiments, the positions of the DC source 4 and the decoupling capacitor CD, as illustrated in
The second stage 10 includes a bi-directional inverter which in the present embodiment is an H-bridge which includes switches Sa1 and Sa2, and Sb1 and Sb2. In other embodiments, other suitable bi-directional inverters can be used. The switches Sai and Sa2, and Sb1 and Sb2 are connect to AC load 6 through inductor Lf and capacitor Cf which function as an AC filter. In other embodiments, an AC filter can be integrated with the bi-directional inverter.
Voltage-Boosting Capability
In the first stage 8, the inductor current is always continuous with complementary triggering signal for the bridge leg 12. The relationship between input DC voltage VDC and the voltage vCD across the decoupling capacitor CD is:
where d is the duty cycle of SC
With the first stage 8, the DC-link voltage vlink of the VSI 2 can be calculated as:
It can be seen from the relationship between vlink and VDC that the buck-boost converter 8 has the voltage-boosting capability, that Vlink is always greater than VDC, and the value of vlink can be determined by the duty cycle of SC
Power Decoupling Function
To achieve the power decoupling function, the voltage across the power decoupling capacitor CD is controlled as a DC-biased sine wave. The DC component of the capacitor voltage vC
The inverter topology in the present embodiment diverts the second-order ripple power into the decoupling capacitor CD without the need for a bulky/large electrolytic capacitor on the DC side indicated generally at 14 of the VSI 2. In the present embodiment, the decoupling capacitor CD is a small film capacitor with a capacitance of 160 uF. In other embodiments, other suitable small film capacitors can be used. A bulky/large electrolytic capacitor often has a short lifespan and typically has a capacitance of a few thousand micro-Farads. The range of the decoupling capacitor voltage vC
To achieve power decoupling, a power flow analysis of the VSI 2 is investigated in the following. Suppose the VSI 2 is operated with unity power factor, then the voltage and current of the AC load 6 are as follows:
vo=Vo·sin(ωt) (3)
io=Io·sin(ωt) (4)
where Vo and Io are the peak values of the AC load 6 voltage and current. The current through filtering capacitor Cf can be calculated as:
where IC
The instantaneous power absorbed by the AC load 6 and by the filtering capacitor Cf are, respectively,
and
from which it can be seen that the second-order pulsating power comes from both the AC load 6 and the filtering capacitor Cf. To balance the second-order pulsating power on the AC side indicated generally at 16, the VSI 2 is controlled to divert the second-order pulsating power into the decoupling capacitor CD on the DC side 14, where the decoupling capacitor voltage vC
pC
where
and
The voltage across the decoupling capacitor CD is basically a DC-biased sine wave, which contains a DC offset Vd and an additional AC component vadd. Suppose the voltage across the decoupling capacitor CD is:
vC
Then the current flowing through the decoupling capacitor can be calculated as:
iC
where “·” denotes the derivative of the variable.
The instantaneous power pC
pC
Combining Equation (8) with Equation (11) yields:
CDVd{dot over (v)}add+CDvadd{dot over (v)}add=Po·cos(2ωt)−PC
Taking the integral for both sides, a quadratic equation with respect to vadd is obtained:
From the quadratic function, the additional AC component vadd is solved as:
Thus, the reference decoupling capacitor voltage is calculated as:
which can be used to control duty cycles of the decoupling switches (i.e. Sc1 and Sc2) of the first stage 8 to achieve the power decoupling function.
Since the output voltage of a traditional prior art bridge inverter is always limited by the input DC voltage, voltage-boosting is required if the peak voltage of the AC output is higher than the input DC voltage. The inverter topology according to embodiments of the present invention is able to boost the input DC voltage, ensuring that the DC-link voltage is always higher than the peak output AC voltage. The added inductor L has high flexibility because it does not need to withstand DC current as the inductor in a prior art boost converter does. Moreover, the decoupling switches are easy to modulate by a complementary triggering signal.
As illustrated in
With the connection in
It can be seen from the relationship between vlink and VDC that the first stage 8 has the voltage-boosting capability, and the value of vlink can be determined by the duty cycle of SC1. According to an embodiment, the H-bridge of the second stage 10 can be simply modulated by sinusoidal pulse-width modulation (SPWM).
Active Power Decoupling Method
According to another embodiment, the present disclosure relates to an active power decoupling method. The method can comprise a power decoupling control method based on the power transfer, calculating the duty cycles of the switches according to demanded power, making the modulation technique more direct without adding a low-order ripple component.
The instantaneous power absorbed by the AC load 6 and by filtering capacitor Cf are, respectively,
and
The reference decoupling capacitor voltage is calculated as:
A control block diagram for modulating the VSI 2 is shown in
Referring to
According to another embodiment, to increase the flexibility for component design and inverter control, a pulse energy modulation (PEM) method is proposed as an alternative modulation method to sinusoidal pulse width modulation (SPWM) for the bridge inverter of the second stage 10. A control block for modulating the bridge inverter using PEM is illustrated in
In PEM, the operation principles of the bridge inverter can be described by the following two operating half cycles:
During each half cycle, PHC for example, the H-bridge of the second stage 10 operates in two modes:
In case of a grid-connected inverter, the AC load 6 becomes an AC grid, and vo=Vgrid and io=Igrid, the demanded energy during the nth switching period is calculated approximately from:
Edm(n)=Vgrid(n)·Iref(n)·Ts (19)
in which Vgrid(n) and Iref(n) are grid voltage and reference grid current, respectively, in the nth switching period, during which Vgrid(n) and Iref(n) are approximately constant for the fact that the switching frequency is much higher than the line frequency. Ts is the switching period.
If the initial current of the inductor is In(t0) and the inductor current after charging is In(t1) for the nth switching period, the average current flowing to the grid is
The energy charged during the nth switching period is calculated from:
where D is the duty cycle. According to the energy balance, in each switching period the following equation must be satisfied:
Ein(n)=Edm(n) (21)
During PHC, Sa1 remains on, Sa2 and Sb1 remain off; the only switch controlled according to PEM is Sb2·In(t1) can be calculated by:
The duty cycle for Sb2 during PHC can be stated as:
During NHC, Sa2 remains on, Sa1 and Sb2 remain off; the only switch controlled according to PEM is Sb1. In(t1) can be calculated by:
The duty cycle for Sb1 during NHC can be stated as:
The simulation result of PEM on the bridge inverter is shown in
The parameters of the new single-phase inverter according to one embodiment have been designed in MATLAB/SIMULINK and PSIM.
Simulation and Experimental Results
To verify single-phase inverter topology and modulation methods according to some embodiments, a 750 W single-phase VSI with a buck-boost stage was designed in the MATLAB/SIMULINK environment. The key parameters are listed in Table 1. With input DC voltage as 225V, the simulation results, using the parameters in Table 1 are shown in
In laboratory tests, a DSP TMS320F28335 microprocessor was programmed to provide control and protection functions for the inverter. The preliminary results are shown in
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