Patent Application
20080031311
On the transmit side, skew can be injected on a per-lane basis to compensate for any skew added by the system, such as Field Programmable Gate Array (FPGA) startup conditions. This injected skew achieves compliancy as specified by applicable standards, such as SxI-5. To determine how much skew should be injected to meet these standards, the following system is implemented.
The present invention consists of N+1 transceivers for the purposes of data transmission and reception. The system is designed such that dual loopback can be used to determine the necessary per-lane skew to be added for total lane alignment.
The term “dual loopback”, as used herein, refers to two transmit streams from the transmitters of two different transceivers that are looped back to the receiver portion of a transceiver. The transceiver that receives the loopback from the transmitters will also be one of the transmitting transceivers.
To allow for ordinary data flow in the receive direction, multiplexers are used to select between feedback lines or regular data lines. In the case where selectable internal feedback is used within the transceiver and this internal feedback capability is provided by the transceiver, the amount of inputs to the multiplexer can be reduced or the need for an external multiplexer may be eliminated entirely.
In accordance with the present invention, it may be necessary to use a fanout buffer to mitigate any extra stress on the transmitting lane to preserve signal integrity. This occurs when transmitting lanes have multiple loads (i.e. output to the optics and several loopbacks to receivers).
A worker skilled in the art will understand that it is necessary for one of the transceivers to be chosen as the reference. This reference transceiver can be chosen as one of the active transceivers or may be a transceiver used solely for the purpose of providing a reference. All other lanes will have their skew determined relative to this reference.
The system of the present invention enables the calculation of the skew for each transmit lane, relative to one of the lanes. The following examples will illustrate the workings of possible systems mathematically. These examples will deal with smaller 3 transceiver systems. The 3 transceiver example is easily expandable into an SFI-5 system with 17 transceivers, or any other transceiver-based system. Transceivers are herein referred to also as MGTs (Multi-Gigabit Transceivers).
The following examples are set forth to gain a better understanding of the skew-detection portion of the invention described herein. These examples are provided for illustrative purposes only and they should not limit the scope of this invention in any way.
The system in this case is a dual loopback system implemented using external feedback from two different transceivers as shown in
In Example 1, dual loopback is achieved by utilizing only external loopback to determine the relative skew amounts for each lane as illustrated in
Constants e01, e12, e02, and e21 may be determined through empirical means, such as testing with a training sequence. This empirical information is collected by the receiver.
With reference to
T0+R1+X01=e01 (1)
T1+R1+X11=e11 (2)
T0+R2+X02=e02 (3)
T2+R2+X22=e22 (4)
From equations (1) and (2), R1 can be equated, giving:
e01−T0−X01=e11−T1−X11
Therefore,
T1=T0+e11−e01+X01−X11
Similarly from equations (3) and (4) by equating R2,
e02−T0−X02=e22−T2−X22
Thus,
T2=T0+e22−e02+X02−X22
And in general,
T[n]=T0+e[nn]−e[0n]+X[0n]−X[nn]
By taking T0 (the transmit skew for MGT—0) as a reference, it is shown that T1 can be found relative to this skew, and similarly, T2 can be found relative to T0's skew, with 2 unknowns still remaining in each equation—X[0n] and X[nn], where [n] corresponds to the MGT number.
Each X[0n] and X[nn] value can be calculated using standard procedures for trace length and PCB characteristics, as well as taking into account the skew added by each MUX and the optional buffer. These values can be calculated to an approximate theoretical value with some amount of uncertainty in each calculation. Therefore, each X[0n] and X[nn] value can be broken into the theoretical calculated value and a statistical variation from this value:
X[0n]=y[0n]+Z[0n]
X[nn]=y[nn]+Z[nn]
where y[0n] and y[nn] are the theoretical calculated values, and Z[0n] and Z[nn] are the statistical variations from this value.
Thus, the equations can be written as:
T[n]=T0+e[nn]−e[0n]+y[0n]−y[nn]+Z[0n]−Z[nn]
where Z[0n] and Z[nn] are the only unknowns.
As shown by the equation above, the amount of skew between T[n] and T0 is:
e[nn]−e[0n]+y[0n]−y[nn]+Z[0n]−Z[nn]
Since the following values are known:
e[nn]−e[0n]+y[0n]−y[nn]
this amount of skew can be injected into each lane to provide total lane alignment to within the resolution of the receiver.
Thus, the values for Z[0n] and Z[nn] in addition with the resolution of the receiver has to be less than the allowable skew specified by the communication system or applicable standard (2 UI for SxI-5 compliancy). The buffer, MUX, and PCB constraints have to be chosen such that this value is met.
To increase the number of transceivers from 3 to a higher number, the following procedure can implemented and describes a general way to interconnect any number of transceivers. We will assume sequential names for the transceivers, i.e MGT—0, MGT—1, MGT—2, . . . MGT_N.
By following this process, all skew values for each transmit lane can be determined relative to a single reference lane. Once the skew for each transmit lane is known relative to this single lane, then the appropriate amount of skew can be injected into each lane to provide total lane alignment in compliancy with relevant standards, such as SxI-5. In order to accomplish this, the resolution of the receiver (typically 0.5 UI due to the RX PLL CDR) and the uncertainty added by any buffers, MUXs, and traces have to be accounted for and be within the allowable skew values for the standard.
Using the present invention, when internal loopback is used within a transceiver, one of the inputs to the multiplexer can be eliminated. The internal loopback takes the place of one of the external loopbacks. Since the internal loopback can be selected or de-selected within the transceiver, the need for an input to the multiplexer for this particular line is eliminated. Thus, the multiplexer only needs a minimum of 2 inputs for this configuration. This example is shown in
In Example 2, dual loopback is achieved by utilizing internal and external loopback to determine the relative skew amounts for each lane as illustrated in
Constants i1, i2, e1, and e2 may be determined through empirical means, such as testing with a training sequence.
With reference to
T0+R1+X1=e1 (5)
T1+R1=i1 (6)
T0+R2+X2=e2 (7)
T2+R2=i2 (8)
From equations (5) and (6), R1 can be equated, giving:
e1−T0−X1=i1−T1
Therefore,
T1=T0+i1−e1+X1
Similarly from equations (7) and (8) by equating R2,
e2−T1−X2=i2−T2
Thus,
T2=T0+i2−e2+X2
And in general,
T[n]=T0+i[n]−e[n]+X[n]
By taking T0 (the transmit skew for MGT—0) as a reference, it is shown that T1 can be found relative to this skew, and similarly, T2 can be found relative to T0's skew, with 1 unknown still remaining in each equation—X[n], where [n] corresponds to the MGT number.
Each X[n] value can be calculated using standard procedures for trace length and PCB characteristics, as well as taking into account the skew added by each MUX and the buffer. These values can be calculated to an approximate theoretical value with some amount of uncertainty in each calculation. Therefore, each X[n] value can be broken into the theoretical calculated value and a statistical variation from this value:
X[n]=y[n]+Z[n]
where y[n] is the theoretical calculated value and Z[n] is the statistical variation from this value.
Thus, the equations can be written as:
T[n]=T0+i[n]−e[n]+y[n]+Z[n]
where Z[n] is the only unknown.
As shown by the equation above, the amount of skew between T[n] and T0 is:
i[n]−e[n]+y[n]+Z[n]
Since the following values are known:
i[n]−e[n]+y[n]
this amount of skew can be injected into each lane to provide total lane alignment to within the resolution of the receiver.
Thus, the value for Z[n] in addition with the resolution of the receiver has to be less than the allowable skew specified by the applicable standard (2 UI for SxI-5 compliancy). The buffer, MUX, and PCB constraints have to be chosen such that this value is met.
To increase the number of transceivers from 3 to a higher number, the following procedure can implemented and describes a general way to interconnect any number of transceivers. We will assume sequential names for the transceivers, i.e MGT—0, MGT—1, MGT—2, . . . MGT_N.
By following this process, all skew values for each transmit lane can be determined relative to a single reference lane. Once the skew for each transmit lane is known relative to this single lane, then the appropriate amount of skew can be injected into each lane to provide total lane alignment in compliancy with relevant standards, such as SxI-5. In order to accomplish this, the resolution of the receiver (typically 0.5 UI due to the RX PLL CDR) and the uncertainty added by any buffers, MUXs, and traces have to be accounted for and be within the allowable skew values for the standard.
In this example, internal loopback is used within a transceiver and between transceivers. This results in dual loopback and hence elimination of the entire multiplexer. The internal loopback takes the place of one of the external loopbacks, while the internal loopback between transceivers takes the place of the other external loopback. Since both internal loopback can be selected or de-selected within the transceivers, the need for an external multiplexer is eliminated. This example is shown in
In Example 3, dual loopback is achieved by utilizing only internal loopback to determine the relative skew amounts for each lane as illustrated in
Constants i11, i22, i01, and i12 may be determined through empirical means, such as testing with a training sequence.
With reference to
T1+R1=i11 (9)
T2+R2=i22 (10)
T0+R1=i01 (11)
T1+R2=i12 (12)
From equations (9) and (11), R1 can be equated, giving:
i11−T1=i01−T0
Therefore,
T1=T0+i11−i01
Similarly from equations (10) and (12) by equating R2,
i22−T2=i12−T1
Thus,
T2=T1+i22−i12
By taking T0 (the transmit skew for MGT—0) as a reference, it is shown that T1 can be found relative to this skew, and similarly, T2 can be found relative to T1's skew (which is in turn relative to T0.)
To increase the number of transceivers from 3 to a higher number, the following procedure can implemented and describes a general way to interconnect any number of transceivers. We will assume sequential names for the transceivers, i.e MGT—0, MGT—1, MGT_2, . . . MGT_N.
By following this process, all skew values for each transmit lane can be determined relative to a single reference lane. Once the skew for each transmit lane is known relative to this single lane, then the appropriate amount of skew can be injected into each lane to provide total lane alignment in compliancy with relevant standards, such as SxI-5. In order to accomplish this, the resolution of the receiver (typically 0.5 UI due to the RX PLL CDR) has to be accounted for and be within the allowable skew values for the standard.
The previously explained loopback methods are only considered as examples. Different configurations of each are possible as long as dual loopback is achieved. Combined configurations of each are also possible as long as dual loopback is achieved.
In order to inject the appropriate amount of skew into each lane to provide lane alignment, the unaligned transmit (TX) data lines enter a buffer for the purposes of lane deskewing. The skew values to be injected for each lane are supplied to the buffer. The buffer then shifts each lane the appropriate amount to ensure lane-to-lane alignment. A representation of a possible embodiment of this injection system is shown in
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