SOC STACK COMPRISING INTEGRATED INTERCONNECT AND SPACER

Information

  • Patent Application
  • 20230093223
  • Publication Number
    20230093223
  • Date Filed
    February 15, 2021
    3 years ago
  • Date Published
    March 23, 2023
    a year ago
Abstract
A Solid Oxide Cell stack has an integrated interconnect and spacer, which is formed by bending a surplus part of the plate interconnect 180° to form a spacer part on top of the interconnect and connected to the interconnect at least by the bend.
Description
FIELD OF THE INVENTION

The invention relates to a Solid Oxide Cell (SOC) stack, in particular a Solid Oxide Electrolysis Cell (SOEC) stack or a Solid Oxide Fuel Cell (SOFC) stack, comprising an integrated interconnect and spacer, in particular an integrated interconnect and spacer made from a single component folded, sheet metal.


BACKGROUND OF THE INVENTION

In SOC stacks which has an operating temperature between 600° C. and 1000° C., preferably between 600° C. and 850° C., several cell units are assembled to form the stack and are linked together by interconnects. Interconnects serve as a gas barrier to separate the anode and cathode sides of adjacent cell units, and at the same time they enable current conduction between the adjacent cells, i.e. between an anode of one cell and a cathode of a neighbouring cell. Further, interconnects are normally provided with a plurality of flow paths for the passage of process gas on both sides of the interconnect. To optimize the performance of a SOC stack, a range of positive values should be maximized without unacceptable consequence on another range of related negative values which should be minimized. Some of these values are:
















VALUES TO BE MAXIMIZED
VALUES TO BE MINIMIZED









- Process gas utilization
- Cost



- electrical efficiency
- Dimensions



- lifetime
- production time




- fail rate




- number of components




- Parasitic loss (heating,




cooling, blowers..)




- material use










Almost all the above listed values are interrelated, which means that altering one value will impact other values. Some relations between the characteristics of process gas flow in the cells and the above values are mentioned here:


Process Gas Utilization:

The flow paths on the interconnect should be designed to seek an equal amount of process gas to each cell in a stack, i.e. there should be no flow-“short-cuts” through the stack.


Parasitic Loss:

Design of the process gas flow paths in the SOC stack and its cell units should seek to achieve a low pressure loss per flow volume, which will reduce the parasitic loss to blowers.


Electric Efficiency:

The interconnect leads current between the anode and the cathode layer of neighbouring cells. Hence, to reduce internal resistance, the electrically conducting contact points (hereafter merely called “contact points”) of the interconnect should be designed to establish good electrical contact to the electrodes (anode and cathode) and the contact points should no where be far apart, which would force the current to run through a longer distance of the electrode with resulting higher internal resistance.


Lifetime:

It is desirable that the lifetime of an SOC stack is maximized, i.e. that in SOFC mode it can be used to produce as much electricity as possible and that in SOEC mode the amount of electrolysis product (e.g. H2 and/or CO) is maximized. Stack lifetime depends on a number of factors, including the choice of the interconnect and spacer, on flow distribution on both process gas sides of the interconnect, evenly distributed protective coating on the materials, on the operating conditions (temperature, current density, voltage, etc), on cell design and materials and many other factors.


Cost:

The cost contribution of the interconnects (and spacers) can be reduced by not using noble materials, by reducing the production time of the interconnect and spacer, minimizing the number of components and by minimizing the material loss (the amount of material discarded during the production process).


Dimensions:

The overall dimensions of a fuel stack are reduced, when the interconnect design ensures a high utilization of the active cell area. Dead-areas with low process gas flow should be reduced and inactive zones for sealing surfaces should be minimized.


Production Time.

Production time of the interconnect and spacer itself should be minimized and the interconnect design should also contribute to a fast assembling of the entire stack. In general, for every component the interconnect design renders unnecessary, there is a gain in production time.


Fail Rate.

The interconnect and spacer production methods and materials should permit a low interconnect fail rate (such as unwanted holes in the interconnect gas barrier, uneven material thickness or characteristics). Further the fail-rate of the assembled cell stack can be reduced when the interconnect design reduces the total number of components to be assembled and reduces the length and number of seal surfaces.


Number of Components.

Apart from minimizing errors and assembling time as already mentioned, a reduction of the number of components leads to a reduced cost.


The way the anode and cathode gas flows are distributed in a SOC stack is by having a common manifold for each of the two process gasses. The manifolds can either be internal or external. The manifolds supply process gasses to the individual layers in the SOC stack by the means of channels to each layer. The channels are normally situated in one layer of the repeating elements which are comprised in the SOC stack, i.e. in the spacers or in the interconnect.


Interconnects and spacers which are made of sheet metal, are normally made of two separate parts of sheet material, which are sealed together in the SOC stack. This requires sealing between interconnect and spacer, plus handling of the separate components in the production. Furthermore, as the two separate sheet pieces often have the same outer dimensions, a lot of material, is wasted when most of the centre material of the spacer sheet is removed (e.g. stamped out).


U.S. Pat. No. 6,492,053 discloses a fuel cell stack including an interconnect and a spacer. Both, the interconnect and the spacer, have inlet and outlet manifolds for the flow of oxygen/fuel. The inlet and outlet manifolds have grooves/passages on its surface for the distribution of oxygen/fuel along the anode and cathode. However, the grooves/passages of the interconnect and spacer are not aligned with each other and hence their geometries could not be combined to achieve multiple inlet points. Also, since the grooves/passages are on the surface of both the interconnect and spacers, the formation of multiple inlet points are not feasible.


US2010297535 discloses a bipolar plate of a fuel cell with flow channels. The flow plate has multiple channels for distributing fluid uniformly between the active area of the fuel cell. The document does not describe a second layer and similar channels within it.


US2005016729 discloses a ceramic fuel cell(s) which is supported in a heat conductive interconnect plate, and a plurality of plates form a conductive heater named a stack. Connecting a plurality of stacks forms a stick of fuel cells. By connecting a plurality of sticks end to end, a string of fuel cells is formed. The length of the string can be one thousand feet or more, sized to penetrate an underground resource layer, for example of oil. A pre-heater brings the string to an operating temperature exceeding 700 DEG C., and then the fuel cells maintain that temperature via a plurality of conduits feeding the fuel cells fuel and an oxidant, and transferring exhaust gases to a planetary surface. A manifold can be used between the string and the planetary surface to continue the plurality of conduits and act as a heat exchanger between exhaust gases and oxidants/fuel.


None of the above described known art provides a simple, efficient and fail-safe solution to the above described problems.


Therefore, with reference to the above listed considerations, there is a need for a robust, simple, cheap and easy to produce and handle, multi-channel interconnect and spacer solution for a SOC stack.


These and other objects are achieved by the invention as described below.


SUMMARY OF THE INVENTION

The invention is to make a single component (which combines the functionalities of the interconnect and spacer) in sheet metal by folding the spacer part from the IC sheet onto the one side of the sheet metal. Folding (or bending) is a mass preserving process, hence there is no waste. The folding radius is dependent of the sheet thickness, when folding thin sheet material as in the present invention, very small folding radius can be obtained.


By folding the spacer from the interconnect sheet metal, several issues are solved:

    • Reduction of sealing areas in the stack and thus fewer places where leak can occur, while saving a sealing layer per interconnect-spacer assembly.
    • Reduction of components to be handled in production.
    • As the spacer is made of the same sheet metal as the interconnect, the thickness of the interconnect and the spacer is the same, thus reducing tolerance issues in the stack assembly.
    • When spacers are made from a separate sheet metal, the material use is greater as the sealing area normally located in the periphery of the interconnect. The folded solution thus saves material, as the folded part is included in the interconnect periphery, and the “internal” of the spacer is used for interconnect.
    • Identical material of the interconnect and spacer (and no sealing material) yields same coefficient of thermal expansion.
    • As the spacer is part of the interconnect, the alignment of a separate spacer part is eliminated.
    • The folding process is cheap and industrial scalable.


To produce the integrated interconnect and spacer, the interconnect geometry is enlarged to include the spacers, which are then folded on top of the interconnect. The folding process is simple and robust and used in several industries (e.g. metal cans).


The thickness of the spacer is the same as the thickness of the interconnect. This reduces tolerances when assembling the stack. The same tolerances cannot be achieved by other processes, i.e. etching a seal between interconnect and spacer is saved. As the interconnect and spacer become one component, it saves on handling of components. As spacers are usually placed in the periphery of the interconnect, the centre is cut out and wasted using a standard solution. When the spacer is part of the interconnect, the internal of the spacer is not wasted, reducing material waste.


The invention according to claim 1 is a Solid Oxide Cell stack comprising a plurality of stacked cell units. Each of the cell units comprises a cell layer, with anode, cathode and electrolyte and an interconnect layer. The layers are stacked alternating so that one interconnect layer separates one cell layer from the adjacent cell layer in the cell stack. The interconnect layer comprises an integrated interconnect and spacer which is made from one piece of plate with the thickness T, instead of having a separate spacer as known in the art. The spacer is formed by bending at least a part of the edges of the interconnect 180° a number, N, of time to provide a spacer which covers at least a part of the edges of the interconnect. It is to be understood that the bend is 180° with the tolerances which are inherent and common for the production process of bending, which may also include some degree of flexing back. Also, it is to be understood that the piece of plate to be bent before bending has dimensions larger than the final integrated interconnect and spacer, where the surplus area is to be bent and will form the spacer after the bend. After bending, the spacer and interconnect together form an edge of at least a part of the integrated interconnect and spacer with a thickness equal to or less than (1+N) times the thickness of the plate T. It is to be understood that the thickness depends of material and production tolerances which may lead to measures slightly above and below the exact thickness equal to or less than (1+N) times the thickness of the plate T, which is therefore within the scope of the claim. It is however a part of the invention that the bending process may also provide a higher accuracy than known from common solid oxide cell stacks, since a gasket between spacer and interconnect is omitted and because the bending process may be followed by an accurate press which evens the thickness of the integrated interconnect and spacer to fine tolerances. It is to be understood that contact between the cells by the integrated interconnect and spacer is ensured both by the bent edges as well as by contact points throughout the surface of the integrated interconnect and spacer. The contact points may be provided by a contact enabling element provided on the same side of the interconnect as the bent. The contact enabling element may be in the form of a net, by pressed contact points or any other known art.


In a particular embodiment of the invention, at least part of the edges of the interconnect is bent 180° one time, which provides an interconnect and spacer with a thickness equal to or less than 2 times the thickness of the plate T.


When bent, the integrated interconnect and spacer may form at least one flow distributor for manifolding i.e. for the in- and outflow of process gasses to the stack, both from a part of the edge of the interconnect which is referred to as external manifolding and from channels located inside the interconnect area, which is referred to as internal manifolding. The edges to be bent may be formed and have gaps which allows process gas to flow into the stack, and the flow path may be oriented by the shape of the edges forming a flow distributor. The edges may for instance be formed as pins, wedges or any other shape adapted to allow for process fluid and guiding. This may be used both for internal manifolding as well as external manifolding as known in the art.


Also, the spacer may be at least partly formed by a contiguous fluid tight edge. The fluid tight edge may be adapted to form a fluid tight seal towards an external manifold or around an internal manifold. Apart from the fold itself, the spacer may be further connected to the interconnect by diffusion bonding (wherein the atoms of two solid, metallic surfaces intersperse themselves over time), welding or any other suitable connecting technique on at least a part of the edge or surface of the spacer.


In an embodiment of the invention, the bend is facilitated and guided by grooves on one, the other, or both sides of the interconnect in at least a part of the bending lines. Grooves may be present on at least one side of the interconnect to form flow fields for process fluid. Said grooves may be formed by for instance etching.


In a particular embodiment of the invention, the stack is a Solid Oxide Electrolysis Cell stack with operating temperatures as mentioned above. In a further embodiment of the invention, the stack is a Solid Oxide Fuel Cell stack. The sheet metal used to manufacture the integrated interconnect and spacer may be austenitic steel, ferritic steel or any alloy best suited for the stack.


In an embodiment of the invention, the above described Solid Oxide Cell stack is manufactured by steps comprising providing a piece of plate with the thickness T and a larger are than the area of the interconnect layer. At least a part of the edge of the plate is the bent 180° a number, N, of times to form the spacer. The spacer and interconnect together form an edge of at least a part of the integrated interconnect and spacer from this one piece of plate, with a thickness equal to or less than (1+N) times the thickness of the plate T.


In a specific embodiment, the plate is bent one time, hence the spacer and interconnect together form an edge of at least a part of the integrated interconnect and spacer with a thickness equal to or less than two times the thickness T of the plate. A further step may involve a calibration of the thickness of the integrated interconnect and spacer, which can minimize the tolerances even further than the (double) tolerances of the plate itself. This is done by performing a press of the integrated interconnect and spacer to a predefined stop, which is set below the (1+N) times T. The press force is set higher than the plastic deformation (permanent distortion that occurs when a material is subjected to e.g. compressive stresses that exceed its yield strength and cause it to e.g. compress) force of the integrated interconnect and spacer.


Features of the Invention

1. Solid Oxide Cell stack comprising a plurality of stacked cell units, each cell unit comprises a cell layer and an interconnect layer, one interconnect layer separates one cell layer from the adjacent cell layer in the cell stack, wherein the interconnect layer comprises an integrated interconnect and spacer made from one piece of plate with the thickness, T, the spacer is formed by at least a part of the edges of the interconnect which is bent 180° a number, N, of times to provide a spacer covering at least a part of the edges of the interconnect so said spacer and interconnect together forms an edge of at least a part of the integrated interconnect and spacer with a thickness equal to or less than (1+N) times the thickness of the plate T.


2. Solid Oxide Cell stack according to feature 1, wherein the at least part of the edges of the interconnect is bent 180° one time to provide a spacer covering at least a part of the edges of the interconnect so said spacer and interconnect together forms an edge of at least a part of the integrated interconnect and spacer with a thickness equal to or less than 2 times the thickness of the plate T.


3. Solid Oxide Cell stack according to any of the preceding features, wherein the spacer of the integrated interconnect and spacer further forms at least one flow distributor for manifolding.


4. Solid Oxide Cell stack according to any of the preceding features, wherein the spacer of the integrated interconnect and spacer further forms at least one flow distributor adapted for external manifolding.


5. Solid Oxide Cell stack according to any of the preceding features, wherein the spacer of the integrated interconnect and spacer further forms at least one flow distributor adapted for internal manifolding.


6. Solid Oxide Cell stack according to any of the preceding features, wherein the spacer of the integrated interconnect and spacer is at least partly formed by pins.


7. Solid Oxide Cell stack according to any of the preceding features, wherein the spacer of the integrated interconnect and spacer is at least partly formed by pins formed as wedges which are flow guides for a process fluid flow.


8. Solid Oxide Cell stack according to any of the preceding features, wherein the spacer of the integrated interconnect and spacer is at least partly formed by a contiguous fluid tight edge.


9. Solid Oxide Cell stack according to any of the preceding features, wherein the spacer of the integrated interconnect and spacer is at least partly formed by a contiguous fluid tight edge adapted to form a fluid tight seal towards an external manifold.


10. Solid Oxide Cell stack according to any of the preceding features, wherein the spacer of the integrated interconnect and spacer is at least partly formed by a contiguous fluid tight edge adapted to form a fluid tight seal around an internal manifold.


11. Solid Oxide Cell stack according to any of the preceding features, wherein the spacer is connected to the interconnect not only by the bent part, but also on at least one further edge or on the surface of the spacer facing the interconnect.


12. Solid Oxide Cell stack according to any of the preceding features, wherein the spacer is connected to the interconnect by diffusion bonding on at least a part of the surface of the spacer facing the interconnect.


13. Solid Oxide Cell stack according to any of the preceding features, wherein the spacer is connected to the interconnect by welding on at least a part of the surface of the spacer facing the interconnect.


14. Solid Oxide Cell stack according to any of the preceding features, wherein the interconnect has grooves on at least one side adapted to facilitate and guide said 180° bend.


15. Solid Oxide Cell stack according to any of the preceding features, wherein the interconnect has grooves on at least one side adapted to form flow fields for process fluid.


16. Solid Oxide Cell stack according to any of the preceding features, wherein the interconnect has grooves formed by etching on at least one side to form flow fields for process fluid.


17. Solid Oxide Cell stack according to any of the preceding features, wherein the Solid Oxide Cell stack is a Solid


Oxide Electrolysis Cell stack.


18. Method for manufacturing a Solid Oxide Cell stack according to any of the preceding features, comprising a plurality of stacked cell units, each cell unit comprises a cell layer and an interconnect layer, one interconnect layer separates one cell layer from the adjacent cell layer in the cell stack, wherein the interconnect layer comprises an integrated interconnect and spacer made from one piece of plate, comprising the steps of,

    • providing one piece of plate with the thickness T and a larger area than the area of the interconnect layer
    • bending at least a part of the edge of said plate 180° a number, N, of times to form said spacer, so said spacer and interconnect together forms an edge of at least a part of the integrated interconnect and spacer with a thickness equal to or less than (1+N) times the thickness of the plate T.


19. Method according to feature 18, wherein the at least part of the edge of said plate is bend one time, so said spacer and interconnect together forms an edge of at least a part of the integrated interconnect and spacer with a thickness equal to or less than two times the thickness T of the plate.


20. Method for manufacturing a Solid Oxide Cell stack according to feature 18 or 19, further comprising the step of,

    • performing a calibration press to a predefined stop with a force higher than the plastic deformation force on the integrated interconnect and spacer to ensure an even thickness of the edge of the integrated interconnect and spacer.


21. Method for manufacturing a Solid Oxide Cell stack according to any of the features 18-20, further comprising the step of,


performing a calibration press to a predefined stop with a force higher than the plastic deformation force on the integrated interconnect and spacer to ensure an even thickness of the edge of the integrated interconnect and spacer which is less than (1+N) times the thickness T.


22. Method for manufacturing a Solid Oxide Cell stack according to any of the features 18-21, further comprising the foregoing step of,

    • providing grooves on at least one side of said plate adapted to facilitate and guide said 180° bend.


23. Method for manufacturing a Solid Oxide Cell stack according to feature 22, wherein said grooves are formed by etching.


24. Method for manufacturing a Solid Oxide Cell stack according to any of the features 18-23, further comprising the step of,

    • etching at least one side of the integrated interconnect and spacer, before or after the bending, to form flow fields for process fluid.


25. Method for manufacturing a Solid Oxide Cell stack according to any of the features 18-24, further comprising the step of diffusion bonding the spacer to the interconnect on at least a part of the surface of the spacer facing the interconnect.


26. Method for manufacturing a Solid Oxide Cell stack according to any of the features 18-25, further comprising the step of welding the spacer to the interconnect on at least a part of the surface of the spacer facing the interconnect.





BRIEF DESCRIPTION OF THE DRAWINGS

The invention is further illustrated by the accompanying drawings showing examples of embodiments of the invention.



FIG. 1 shows an isometric top view of an integrated interconnect and spacer before folding.



FIG. 2 shows an isometric top view of the integrated interconnect and spacer of FIG. 1 but with the spacer (surplus) part of the interconnect now folded on top of the interconnect.



FIG. 3 shows an isometric bottom view of the integrated interconnect and spacer of FIG. 2.



FIG. 4 shows an enlarged isometric top view of the centre part of the integrated interconnect and spacer of FIG. 2.





POSITION NUMBERS






    • 1. Integrated interconnect and spacer


    • 2. Spacer


    • 3. Flow distributor adapted for external manifolding


    • 4. Flow distributor adapted for internal manifolding


    • 5. Pins


    • 6. Contiguous fluid tight edge





DETAILED DESCRIPTION


FIG. 1 shows an integrated interconnect and spacer 01 for a Solid Oxide Cell stack (not shown). FIG. 1 shows the interconnect as one flat piece of sheet metal with surplus material adapted to form the spacers 02, but before the folding, hence the spacers have not yet been formed. The shape of the integrated interconnect and spacer with six edges is only chosen as an example. As can be seen, a part of the spacer is in the form of pins 05, which will be explained in more detail in the following.


On FIG. 2, the surplus material of the interconnect shown in FIG. 1 has now been folded 180° onto the top side of the interconnect to form spacers around three edges of the interconnect as well as around two through-holes cut in the interconnect. Along the three edges as well as around the centre through-hole of the interconnect, the spacers are formed as pins to allow for process gas to flow in-between the spacer pins. Hence, along the three edges, the pin formed spacers form flow distributors adapted for external manifolding 03; whereas around the centre through-hole of the interconnect the pin formed spacers forms a flow distributor adapted for internal manifolding 04. It is to be understood that the spacers adapted for manifolding may be formed in different shapes to control and direct the product gas flow to, along and from the interconnect. One spacer in FIG. 2 is formed with a contiguous fluid tight edge 06, which when folded forms an edge around the through-hole in the periphery of the interconnect, which thereby serves as a product gas channel internally in the stack. FIG. 3 shows the same folded integrated interconnect and spacer as seen in FIG. 2, only seen from the opposite (bottom) side of the interconnect.


The folded pins acting as a flow distributor adapted for internal manifolding around the central through-hole of the interconnect is seen in more detail in FIG. 4. It is to be understood, that in one embodiment (not shown) the guiding of the bent pins and the tolerances may be enhanced by grooves in the bending section of the pins on one, the other or both sides of the sheet. Also, it is to be understood that the bent spacers may have any other shapes and forms than pins, such as whole edges or wedges.

Claims
  • 1. Solid Oxide Cell stack comprising a plurality of stacked cell units, each cell unit comprises a cell layer and an interconnect layer, one interconnect layer separates one cell layer from the adjacent cell layer in the cell stack, wherein the interconnect layer comprises an integrated interconnect and spacer made from one piece of plate with the thickness, T, the spacer is formed by at least a part of the edges of the interconnect which is bent 180° a number, N, of times to provide a spacer covering at least a part of the edges of the interconnect, so said spacer and interconnect together form an edge of at least a part of the integrated interconnect and spacer with a thickness equal to or less than (1+N) times the thickness of the plate T.
  • 2. Solid Oxide Cell stack according to claim 1, wherein the at least part of the edges of the interconnect is bent 180° one time to provide a spacer covering at least a part of the edges of the interconnect, so said spacer and interconnect together form an edge of at least a part of the integrated interconnect and spacer with a thickness equal to or less than 2 times the thickness of the plate T.
  • 3. Solid Oxide Cell stack according to claim 1, wherein the spacer of the integrated interconnect and spacer further forms at least one flow distributor for manifolding.
  • 4. Solid Oxide Cell stack according to claim 1, wherein the spacer of the integrated interconnect and spacer further forms at least one flow distributor adapted for external manifolding.
  • 5. Solid Oxide Cell stack according to claim 1, wherein the spacer of the integrated interconnect and spacer further forms at least one flow distributor adapted for internal manifolding.
  • 6. Solid Oxide Cell stack according to claim 1, wherein the spacer of the integrated interconnect and spacer is at least partly formed by pins.
  • 7. Solid Oxide Cell stack according to claim 1, wherein the spacer of the integrated interconnect and spacer is at least partly formed by pins formed as wedges which are flow guides for a process fluid flow.
  • 8. Solid Oxide Cell stack according to claim 1, wherein the spacer of the integrated interconnect and spacer is at least partly formed by a contiguous fluid tight edge.
  • 9. Solid Oxide Cell stack according to claim 1, wherein the spacer of the integrated interconnect and spacer is at least partly formed by a contiguous fluid tight edge adapted to form a fluid tight seal towards an external manifold.
  • 10. Solid Oxide Cell stack according to claim 1, wherein the spacer of the integrated interconnect and spacer is at least partly formed by a contiguous fluid tight edge adapted to form a fluid tight seal around an internal manifold.
  • 11. Solid Oxide Cell stack according to claim 1, wherein the spacer is connected to the interconnect not only by the bent part, but also on at least one further edge or surface of the spacer facing the interconnect.
  • 12. Solid Oxide Cell stack according to claim 1, wherein the spacer is connected to the interconnect by diffusion bonding on at least a part of the surface of the spacer facing the interconnect.
  • 13. Solid Oxide Cell stack according to claim 1, wherein the spacer is connected to the interconnect by welding on at least a part of the surface of the spacer facing the interconnect.
  • 14. Solid Oxide Cell stack according to claim 1, wherein the interconnect has grooves on at least one side adapted to facilitate and guide said 180° bend.
  • 15. Solid Oxide Cell stack according to claim 1, wherein the interconnect has grooves on at least one side adapted to form flow fields for process fluid.
  • 16. Solid Oxide Cell stack according to claim 1, wherein the interconnect has grooves formed by etching on at least one side to form flow fields for process fluid.
  • 17. Solid Oxide Cell stack according to claim 1, wherein the Solid Oxide Cell stack is a Solid Oxide Electrolysis Cell stack.
  • 18. Method for manufacturing a Solid Oxide Cell stack according to claim 1, comprising a plurality of stacked cell units, each cell unit comprises a cell layer and an interconnect layer, one interconnect layer separates one cell layer from the adjacent cell layer in the cell stack, wherein the interconnect layer comprises an integrated interconnect and spacer made from one piece of plate, comprising the steps of, providing one piece of plate with the thickness T and a larger area than the area of the interconnect layerbending at least a part of the edge of said plate 180° a number, N, of times to form said spacer, so said spacer and interconnect together forms an edge of at least a part of the integrated interconnect and spacer with a thickness equal to or less than (1+N) times the thickness of the plate T.
  • 19. Method according to claim 18, wherein the at least part of the edge of said plate is bend one time, so said spacer and interconnect together forms an edge of at least a part of the integrated interconnect and spacer with a thickness equal to or less than two times the thickness T of the plate.
  • 20. Method for manufacturing a Solid Oxide Cell stack according to claim 18, further comprising the step of performing a calibration press to a predefined stop with a force higher than the plastic deformation force on the integrated interconnect and spacer to ensure an even thickness of the edge of the integrated interconnect and spacer.
  • 21. Method for manufacturing a Solid Oxide Cell stack according to claim 18, further comprising the step of performing a calibration press to a predefined stop with a force higher than the plastic deformation force on the integrated interconnect and spacer to ensure an even thickness of the edge of the integrated interconnect and spacer which is less than (1+N) times the thickness T.
  • 22. Method for manufacturing a Solid Oxide Cell stack according to claim 18, further comprising the foregoing step of providing grooves on at least one side of said plate adapted to facilitate and guide said 180° bend.
  • 23. Method for manufacturing a Solid Oxide Cell stack according to claim 22, wherein said grooves are formed by etching.
  • 24. Method for manufacturing a Solid Oxide Cell stack according to claim 18, further comprising the step of etching at least one side of the integrated interconnect and spacer, before or after the bending, to form flow fields for process fluid.
  • 25. Method for manufacturing a Solid Oxide Cell stack according to claim 18, further comprising the step of diffusion bonding the spacer to the interconnect on at least a part of the surface of the spacer facing the interconnect.
  • 26. Method for manufacturing a Solid Oxide Cell stack according to claim 18, further comprising the step of welding the spacer to the interconnect on at least a part of the surface of the spacer facing the interconnect.
Priority Claims (1)
Number Date Country Kind
20157590.9 Feb 2020 EP regional
PCT Information
Filing Document Filing Date Country Kind
PCT/EP2021/053590 2/15/2021 WO