The present disclosure relates to a system on a chip (SoC), especially to an SoC with a Universal Asynchronous Receiver/Transmitter (UART) interface.
Some system on a chip (SoC) has a Universal Asynchronous Receiver/Transmitter (UART) interface to support an external device (e.g., a Bluetooth device or a microprocessor). When an SoC is connected to the input/output (I/O) pads of a UART interface of an external device through the I/O pads of a UART interface of the SoC, the supply voltage for the I/O pads of the UART interface of the SoC (hereinafter referred to as “the SoC supply voltage”) should match the supply voltage for the I/O pads of the UART interface of the external device (hereinafter referred to as “the external-device supply voltage”) to prevent the higher one among the two supply voltages from damaging the I/O pads of the device having the lower supply voltage. The collocations between the SoC supply voltage and the external-device supply voltage and the consequences of such collocations are illustrated with the following Table 1.
A conventional art is usually used to ensure that the SoC supply voltage matches the external-device supply voltage. This conventional art includes: controlling a UART input voltage for an SoC through the setting of an external resistor and thereby allowing a UART interface of the SoC to directly determine the output and input voltage levels of its own I/O pads according to the UART input voltage (e.g., the UART interface of the SoC using the level of the UART input voltage as the output and input voltage levels); in this case, the SoC does not use its software to control the setting of the supply voltage for the I/O pads.
However, an internal device operating voltage of an SoC manufactured with an advanced semiconductor manufacturing process (e.g., a 12 nm semiconductor manufacturing process or a more advanced semiconductor manufacturing process) is a low voltage (e.g., 1.8V) when the SoC starts up; although in the following procedures the supply voltage for the I/O pads of the SoC can optionally be set for a higher voltage (e.g., 3.3V) or be set for the internal device operating voltage (e.g., 1.8V) to match the supply voltage for the I/O pads of an external device connected with the SoC, the above setting is executed with software of the SoC, and this is not a preferred solution in this technical field.
An object of the present disclosure is to provide a system on a chip (SoC) with a Universal Asynchronous Receiver/Transmitter (UART) interface, wherein the SoC can adequately determine the setting of a supply voltage for its own UART signal pads.
An embodiment of the SoC of the present disclosure includes a UART interface circuit, a detection circuit, and a control circuit. The UART interface circuit includes: a plurality of UART signal pads for receiving and transmitting signals; and a UART voltage pad for receiving an external operating voltage, wherein the external operating voltage is not generated by the SoC. The detection circuit is electrically coupled with the UART voltage pad and is configured to detect the magnitude of the external operating voltage and thereby generate a detection result. The control circuit is electrically coupled with the detection circuit and is configured to determine the setting of a supply voltage for the plurality of UART signal pads according to the detection result. When the detection result indicates that the external operating voltage is a first voltage, the control circuit makes the setting of the supply voltage be compatible with the first voltage, wherein the first voltage is equal to an internal device operating voltage of the SoC; and when the detection result indicates that the external operating voltage is a second voltage, the control circuit makes the setting of the supply voltage be compatible with the second voltage, wherein the second voltage is higher than the first voltage.
These and other objectives of the present invention will no doubt become obvious to those of ordinary skill in the art after reading the following detailed description of the preferred embodiments that are illustrated in the various FIGURES and drawings.
The present specification discloses a system on a chip (SoC) with a Universal Asynchronous Receiver/Transmitter (UART) interface. The SoC can adequately determine the setting of a supply voltage for its own UART signal pads.
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It is noted that people having ordinary skill in the art can selectively use some or all of the features of any embodiment in this specification or selectively use some or all of the features of multiple embodiments in this specification to implement the present invention as long as such implementation is practicable; in other words, the way to implement the present invention is flexible based on the present disclosure.
To sum up, the SoC of the present disclosure can detect an external operating voltage and thereby adequately determine the setting of a supply voltage for UART signal pads of the SoC.
The aforementioned descriptions represent merely the preferred embodiments of the present invention, without any intention to limit the scope of the present invention thereto. Various equivalent changes, alterations, or modifications based on the claims of the present invention are all consequently viewed as being embraced by the scope of the present invention.
| Number | Date | Country | Kind |
|---|---|---|---|
| 111129545 | Aug 2022 | TW | national |
| Number | Name | Date | Kind |
|---|---|---|---|
| 5637982 | Nanno | Jun 1997 | A |
| 20120159008 | Park | Jun 2012 | A1 |
| 20170040812 | Li | Feb 2017 | A1 |
| 20170286360 | Srivastava | Oct 2017 | A1 |
| 20180011528 | Srivastava | Jan 2018 | A1 |
| 20200144293 | Majhi | May 2020 | A1 |
| 20220347398 | Paramanandam | Nov 2022 | A1 |
| Number | Date | Country |
|---|---|---|
| 113127240 | Jul 2021 | CN |
| I733752 | Jul 2021 | TW |
| Entry |
|---|
| OA letter of a counterpart TW application (appl. No. 111129545) mailed on May 4, 2023. Summary of the TW OA letter issued according to the TW counterpart application. |
| Number | Date | Country | |
|---|---|---|---|
| 20240045820 A1 | Feb 2024 | US |