Claims
- 1. A soft wakeup output buffer comprising:
- a buffer (21) for generating a corresponding output signal (to I/O pad 23) from an input signal (36);
- means (T) responsive to a high impedance control signal (A) for placing said buffer into a high impedance mode;
- means (F/S) responsive to a slew rate signal (D) for controlling slow rate of said buffer; and
- means (229) responsive to said high impedance control signal for controlling said slew rate signal (D).
- 2. A soft wakeup output buffer comprising:
- buffer means (21a,21b) for generating a corresponding output signal (to I/O pad 23) from an input signal (36);
- means (T) responsive to a high impedance control signal (A) for placing said buffer means into a high impedance mode;
- means (F/S) responsive to a slew rate signal (D) for controlling response rate of said buffer means; and
- means (229) for causing drive strength of said buffer means to initially assume a high value and then decrease in response to said high impedance control signal becoming inactive.
Parent Case Info
This application is a division of application Ser. No. 08/016,643, filed Feb. 12, 1993, now U.S. Pat. No. 5,331,220.
US Referenced Citations (12)
Divisions (1)
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Number |
Date |
Country |
Parent |
16643 |
Feb 1993 |
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