This invention relates to optoelectronic devices and more particularly to the electrical interconnection of layers within optoelectronic devices such as solar cells.
Optoelectronic devices can convert radiant energy into electrical energy or vice versa. These devices generally include an active layer sandwiched between two electrodes, sometimes referred to as the front and back electrodes, at least one of which is typically transparent. The active layer typically includes one or more semiconductor materials. In a light-emitting device, e.g., a light-emitting diode (LED), a voltage applied between the two electrodes causes a current to flow through the active layer. The current causes the active layer to emit light. In a photovoltaic device, e.g., a solar cell, the active layer absorbs energy from light and converts this energy to electrical energy exhibited as a voltage and/or current between the two electrodes. Large scale arrays of such solar cells can potentially replace conventional electrical generating plants that rely on the burning of fossil fuels. However, in order for solar cells to provide a cost-effective alternative to conventional electric power generation the cost per watt generated may be competitive with current electric grid rates. Currently, there are a number of technical challenges to attaining this goal.
Most conventional solar cells rely on silicon-based semiconductors. In a typical silicon-based solar cell, a layer of n-type silicon (sometimes referred to as the emitter layer) is deposited on a layer of p-type silicon. Radiation absorbed proximate to the junction between the p-type and n-type layers generates electrons and holes. The electrons are collected by an electrode in contact with the n-type layer and the holes are collected by an electrode in contact with the p-type layer. Since light may reach the junction, at least one of the electrodes may be at least partially transparent. Many current solar cell designs use a transparent conductive oxide (TCO) such as indium tin oxide (ITO) as a transparent electrode.
A further problem associated with existing solar fabrication techniques arises from the fact that individual optoelectronic devices produce only a relatively small voltage. Thus, it is often necessary to electrically connect several devices together in series in order to obtain higher voltages in order to take advantage of the efficiencies associated with high voltage, low current operation (e.g. power transmission through a circuit using relatively higher voltage, which reduces resistive losses that would otherwise occur during power transmission through a circuit using relatively higher current).
Several designs have been previously developed to interconnect solar cells into modules. For example, early photovoltaic module manufacturers attempted to use a “shingling” approach to interconnect solar cells, with the bottom of one cell placed on the top edge of the next, similar to the way shingles are laid on a roof. Unfortunately the solder and silicon wafer materials were not compatible. The differing rates of thermal expansion between silicon and solder and the rigidity of the wafers caused premature failure of the solder joints with temperature cycling.
A further problem associated with series interconnection of optoelectronic devices arises from the high electrical resistivity associated with the TCO used in the transparent electrode. The high resistivity restricts the size of the individual cells that are connected in series. To carry the current from one cell to the next the transparent electrode is often augmented with a conductive grid of busses and fingers formed on a TCO layer. However, the fingers and busses produce shadowing that reduces the overall efficiency of the cell. In order for the efficiency losses from resistance and shadowing to be small, the cells may be relatively small. Consequently, a large number of small cells may be connected together, which requires a large number of interconnects and more space between cells. Arrays of large numbers of small cells are relatively difficult and expensive to manufacture. Further, with flexible solar modules, shingling is also disadvantageous in that the interconnection of a large number of shingles is relatively complex, time-consuming and labor-intensive, and therefore costly during the module installation process.
To overcome this, optoelectronic devices have been developed with electrically isolated conductive contacts that pass through the cell from a transparent “front” electrode through the active layer and the “back” electrode to an electrically isolated electrode located beneath the back electrode. U.S. Pat. No. 3,903,427 describes an example of the use of such contacts in silicon-based solar cells. Although this technique does reduce resistive losses and can improve the overall efficiency of solar cell devices, the costs of silicon-based solar cells remains high due to the vacuum processing techniques used in fabricating the cells as well as the expense of thick, single-crystal silicon wafers. However, even these designs involve more elaborate manufacturing techniques and increased cost due to the cell architecture.
Due to the aforementioned issues, techniques are desired to improve photovoltaic cells manufacturing.
Embodiments of the present invention address at least some of the drawbacks set forth above. Embodiments of the present invention provide an improved solar cell construction. In one non-limiting example, this may be accomplished by constructing a solar cell with an electrically isolated electrode located beneath the back electrode that is shaped to minimize the distance between such electrode and the front electrode. Some embodiments may decrease the cost of making the conductive pathway from the front electrode to the isolated back electrode. Optionally, some may improve the manufacturing of such solar cells. Optionally, some may decrease the resistive losses of such conductive pathway. It should be understood that at least some embodiments of the present invention may be applicable to any type of solar cell, whether they are rigid or flexible in nature or the type of material used in the absorber layer. Embodiments of the present invention may be adaptable for roll-to-roll and/or batch manufacturing processes. At least some of these and other objectives described herein will be met by various embodiments of the present invention.
In one embodiment of the present invention, a solar cell is provided comprising a first metal substrate supporting an absorber layer thereon, wherein the metal substrate includes a plurality of vias extending through the first metal substrate; a second electrically conductive substrate having a plurality of protrusions on at least one surface of the second electrically conductive substrate, the protrusions positioned to extend into the vias of the first metal substrate; and an electrically insulating layer positioned to prevent direct electrical contact between a bottom surface of the first metal substrate and an upper surface of second electrically conductive substrate.
It should be understood that embodiments of the present invention may be adapted to have one or more of the feature herein. By way of non-limiting example, the protrusions have a cross-sectional profile with a hollow interior. Optionally, the protrusions are solid. Optionally, the protrusions are configured to reduce a top-side fill volume in each via. Optionally, the protrusions are configured to reduce a top-side fill volume in each via by at least 50%. Optionally, the protrusions are configured to reduce a top-side fill volume in each via by at least 75%. Optionally, the protrusions are configured to reduce a top-side fill volume in each via by at least 90% relative to completely filling each via without a protrusion therein. Optionally, the first metal substrate comprises one or more discrete layers formed over a bulk portion of the first metal substrate. Optionally, the second electrically conductive substrate has at least one high electrical conductivity on exposed surfaces of protrusions extending into the vias. Optionally, the second electrically conductive substrate has at least one high electrical conductivity silver-based layer on exposed surfaces of protrusions extending into the vias. Optionally, the protrusions comprises multiple metals. Optionally, the second electrically conductive substrate has at least one high electrical conductivity nickel-based layer on exposed surfaces of protrusions extending into the vias. Optionally, the protrusions extending into the vias has a cone-like shape. Optionally, the protrusions extending into the vias has a pyramid-like shape. Optionally, the protrusions extending into the vias has a cylindrical shape. Optionally, the protrusions when inserted into the via, has an uppermost portion above an uppermost surface of first metal substrate. Optionally, the protrusions when inserted into the via, has an uppermost portion below an uppermost surface of first metal substrate.
In another embodiment of the present invention, a method is provided comprising constructing a solar cell with a conductive pathway between two vertically separated electrode layers creating protrusion in electrode material in at least one of the layers to extend through vias in the other electrode layer.
It should be understood that embodiments of the present invention may be adapted to have one or more of the feature herein. By way of non-limiting example, the method may include creating the protrusions in the electrode material comprises using a punch to deform the electrode material. Optionally, creating the protrusions in the electrode material comprises using a plurality of punches to deform the electrode material in a roll-to-roll processing.
Optionally, creating the protrusions in the electrode material comprises using a plurality of punches to deform the electrode material in step-and-repeat processing. Optionally, creating the protrusions in the electrode material occurs before lamination of the electrode materials. Optionally, making the connection between a electrode layer of the solar cell and the protrusion in the via occurs by filling residual void in the via with electrically conductive material. Optionally, making the connection between a transparent electrode layer of the solar cell and the protrusion in the via occurs by filling residual void in the via with electrically conductive ink. Optionally, making the connection between a transparent electrode layer of the solar cell and the protrusion in the via occurs by screen printing a connection. Optionally, making the connection between a transparent electrode layer of the solar cell and the protrusion in the via occurs by using grid ink to bridge a gap between the protrusion and the transparent electrode. Optionally, making the connection occurs by using at least one of the following: using a wire for the grid, using TCO as the grid, or using nanowires/nanotubes as grid. Optionally, using the protrusion reduces resistive loss. Optionally, the method uses a rivet to make connection between the second electrically conductive substrate and an electrode layer of the solar cell. Optionally, the method includes filling any void formed in a hollow portion in any of the protrusions.
In another embodiment of the present invention, a solar cell is provide with at least one conductive pathway between two vertically separated and electrically isolated electrode layers with at least one protrusion in electrode material in at least one of the electrode layers to extend through vias in the other electrode layer. In one embodiment, the protrusion provides the electrical pathway.
A further understanding of the nature and advantages of the invention will become apparent by reference to the remaining portions of the specification and drawings.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the invention, as claimed. It may be noted that, as used in the specification and the appended claims, the singular forms “a”, “an” and “the” include plural referents unless the context clearly dictates otherwise. Thus, for example, reference to “a material” may include mixtures of materials, reference to “a compound” may include multiple compounds, and the like. References cited herein are hereby incorporated by reference in their entirety, except to the extent that they conflict with teachings explicitly set forth in this specification.
In this specification and in the claims which follow, reference will be made to a number of terms which shall be defined to have the following meanings:
“Optional” or “optionally” means that the subsequently described circumstance may or may not occur, so that the description includes instances where the circumstance occurs and instances where it does not. For example, if a device optionally contains a feature for an anti-reflective film, this means that the anti-reflective film feature may or may not be present, and, thus, the description includes both structures wherein a device possesses the anti-reflective film feature and structures wherein the anti-reflective film feature is not present.
In one embodiment of the present invention, back contact thin film solar cell structures and processes are described. In this embodiment of the solar cell structure, the transparent electrode is electrically connected through vias to a backside electrode, which is a metal foil that is capable of carrying more current than the transparent electrode and costs much less. This allows a thinner, less expensive top electrode, and also affords much greater design flexibility for the cell and module.
Referring now to
Referring now to
As the location of protrusion 111,
In one embodiment, the shaped foil at protrusion 111 can be only of rounded shape so that no sharp points are created that can cause shorting. Some may have a flat top as shown in
The underside of the foil where cavity 130 is located can remain empty or can be filled by material prior to lamination of the cells into solar panel so as to reduce cost of panel encapsulant used to fill those holes. Some embodiments may pre-fill these voids 130 before joining the foil 110 with foil 106. Optionally, the voids 130 may be filled a void-filling material after the foils are laminated. Some embodiments may fill the voids 130 during the module encapsulation step, wherein the module encapsulant will fill the voids 130.
Some embodiments may have pre-shaped foils with protrusions that are registered to fit inside each via. Thus, the protrusions 111 in foil 110 can be made singly or in matrix (1×1, 4×4, 4×8, 8×8, etc . . . ) or by roller and then joined with the foil 106. Optionally, protrusions in foil 110 can be made singly or in matrix or by roller after being joined with the foil 106.
Referring now to
This embodiment uses a plug, rivet, or other additional element as protrusion 250 to form the connection between an electrode layer above the absorber layer of the solar cell and the second electrically conductive substrate. Some embodiments may use a solid protrusion while some embodiments may use a protrusion with a hollow center or non-solid center 252. Some may remove more material in areas away from the tip to minimize any strength loss in the tip area. The protrusion 250 in the embodiments may be inserted from below and then upwards. The base of protrusion 250 may be shaped to be wider than that of the via, although sizes narrower than the via are not excluded from alternative embodiments. Residual void(s) can be filled with filler material 254 that are typically electrically conductive, but non-conductive are not excluded in alternative embodiments. Some embodiments may only fill with material 254 up to a portion that is lower than the top of layer 10. Another layer (not shown) may then be overlaid both layer 10 and the material 254 and the protrusion 250 to make the electrical connection.
Optionally, some embodiment may be configured to be inserted from the other direction and then downward into the via as seen in
It should also be understood that the foils 106 and/or 110 may be multi-layered. For example, some embodiments may have an electrically conductive substrate 110 comprised of a metalized polymer (outer metal layer over polymer core). Some embodiments may have two different metal layers such as an aluminum outer layer with a steel core or bottom layer. Some embodiments may have a plurality of opening in the more rigid steel layer with a thinner, flexible layer of aluminum or cooper on top of the more rigid, less conductive metal layer. The holes in the rigid metal layer may be aligned to match where the vias will be.
Overall electrical resistance is also reduced compared to designs where the via is filled using an electrically conductive material such as a silver based adhesive. This maybe due in part to the reduced distance between the second substrate 110 and the electrode layer and/or electrical trace above a photovoltaic absorber layer. Optionally, the reduced electrical resistance may be due to the reduced amount of conductive paste through which current will pass to reach the second substrate. Optionally, this may be due to a direct electrical contact between the back foil and the electrode layer and/or electrical trace above a photovoltaic absorber layer.
While the invention has been described and illustrated with reference to certain particular embodiments thereof, those skilled in the art will appreciate that various adaptations, changes, modifications, substitutions, deletions, or additions of procedures and protocols may be made without departing from the spirit and scope of the invention. For example, with any of the above embodiments, traditional grid lines may also be used with some of the vias 20, although to minimize shadow loss, such use is limited to only select areas. In some embodiments, instead of vias, other geometric shapes such as but not limited to curved lines, variable width lines, squares or other shapes are used to provide a conductive pathway to the bottom electrode. Although most embodiments herein show solution deposition techniques, other vacuum or non-vacuum techniques may also be used to deposit materials to assist layer 10. Layer 10 may itself be integrated with or used over a transparent conductive layer such as a TCO, ZnO, ZnMO, ITO, or other transparent conductor as known.
Although the examples herein are discussed in terms of two metal foils, it should be understood that other embodiments using different materials for each layer are not excluded. Some embodiments may be used a metalized polymer substrate for one or both of the foil layers. Some embodiments may use polyimide or other material for at least one of the layers. Some may have one or more coatings on top of the foils to improve electrical conductivity. Some embodiments may have silver, nickel, or other material coated over the entire surface (or optionally, only at select locations) on foil 110. This may improve electrical conductivity at these locations, which in turn could be the locations where protrusions are formed.
The side walls of the via may be coated with electrically insulating material (not shown for ease of illustration) or have sufficient spacing to prevent electrical connection to the protrusion by layers of the solar cell except by the designated electrode layer and/or finger traces/busbars associated with the electrode layer.
It should also be understood that prior to deposition of any material on the substrate, the metal foil may undergo conditioning (cleaning, smoothening, and possible surface treatment for subsequent steps), such as but not limited to corona cleaning, wet chemical cleaning, plasma cleaning, ultrasmooth re-rolling, electro-polishing, and/or CMP slurry polishing.
Furthermore, those of skill in the art will recognize that any of the embodiments of the present invention can be applied to almost any type of solar cell material and/or architecture. For example, the absorber layer in the solar cell may be an absorber layer comprised of copper-indium-gallium-selenium (for CIGS solar cells), CdSe, CdTe, Cu(In,Ga)(S,Se)2, Cu(In,Ga,Al)(S,Se,Te)2, and/or combinations of the above, where the active materials are present in any of several forms including but not limited to bulk materials, micro-particles, nano-particles, or quantum dots. The CIGS cells may be formed by vacuum or non-vacuum processes. The processes may be one stage, two stage, or multi-stage CIGS processing techniques. Many of these types of cells can be fabricated on flexible substrates. Examples of such solar cells include cells with active absorber layers comprised of silicon (e.g. for amorphous, micro-crystalline, or polycrystalline silicon cells), organic oligomers or polymers (for organic solar cells), bi-layers or interpenetrating layers or inorganic and organic materials (for hybrid organic/inorganic solar cells), dye-sensitized titania nanoparticles in a liquid or gel-based electrolyte (for Graetzel cells), copper-indium-gallium-selenium (for CIG solar cells), cells whose active layer is comprised of CdSe, CdTe, and combinations of the above, where the active materials are present in any of several forms including but not limited to bulk materials, micro-particles, nano-particles, or quantum dots. Many of these types of cells can be fabricated on flexible substrates (e.g., stainless steel foil). Although these types of active layers can be manufactured in non-vacuum environments, the intra-cell and inter-cell electrical connection may use vacuum deposition of one or more metal conducting layers.
Additionally, concentrations, amounts, and other numerical data may be presented herein in a range format. It is to be understood that such range format is used merely for convenience and brevity and should be interpreted flexibly to include not only the numerical values explicitly recited as the limits of the range, but also to include all the individual numerical values or sub-ranges encompassed within that range as if each numerical value and sub-range is explicitly recited. For example, a thickness range of about 1 nm to about 200 nm should be interpreted to include not only the explicitly recited limits of about 1 nm and about 200 nm, but also to include individual sizes such as but not limited to 2 nm, 3 nm, 4 nm, and sub-ranges such as 10 nm to 50 nm, 20 nm to 100 nm, etc . . . .
The publications discussed or cited herein are provided solely for their disclosure prior to the filing date of the present application. Nothing herein is to be construed as an admission that the present invention is not entitled to antedate such publication by virtue of prior invention. Further, the dates of publication provided may be different from the actual publication dates which may need to be independently confirmed. All publications mentioned herein are incorporated herein by reference to disclose and describe the structures and/or methods in connection with which the publications are cited. For example, U.S. Pat. No. 7,838,868, U.S. 20040219730, and U.S. 2005/0183767 are fully incorporated herein by reference for all purposes. U.S. Provisional Application Ser. No. 61/393,854, filed Oct. 15, 2010 is also fully incorporated herein by reference for all purposes.
While the above is a complete description of the preferred embodiment of the present invention, it is possible to use various alternatives, modifications and equivalents. Therefore, the scope of the present invention should be determined not with reference to the above description but should, instead, be determined with reference to the appended claims, along with their full scope of equivalents. Any feature, whether preferred or not, may be combined with any other feature, whether preferred or not. In the claims that follow, the indefinite article “A”, or “An” refers to a quantity of one or more of the item following the article, except where expressly stated otherwise. The appended claims are not to be interpreted as including means-plus-function limitations, unless such a limitation is explicitly recited in a given claim using the phrase “means for.”
The present application claims priority to U.S. Provisional Application 61/393,854, filed Oct. 15, 2010, and entitled “SOLAR CELL ARCHITECTURE HAVING A PLURALITY VIAS WITH SHAPED FOIL VIA INTERIOR”, which is fully incorporated herein by reference for all purposes.
Number | Date | Country | |
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61393854 | Oct 2010 | US |