Embodiments of the present disclosure are in the field of renewable energy and, in particular, UV-curing of light-receiving surfaces of solar cells.
Photovoltaic cells, commonly known as solar cells, are well known devices for direct conversion of solar radiation into electrical energy. Generally, solar cells are fabricated on a semiconductor wafer or substrate using semiconductor processing techniques to form a p-n junction near a surface of the substrate. Solar radiation impinging on the surface of, and entering into, the substrate creates electron and hole pairs in the bulk of the substrate. The electron and hole pairs migrate to p-doped and n-doped regions in the substrate, thereby generating a voltage differential between the doped regions. The doped regions are connected to conductive regions on the solar cell to direct an electrical current from the cell to an external circuit coupled thereto.
The following detailed description is merely illustrative in nature and is not intended to limit the embodiments of the subject matter or the application and uses of such embodiments. As used herein, the word “exemplary” means “serving as an example, instance, or illustration.” Any implementation described herein as exemplary is not necessarily to be construed as preferred or advantageous over other implementations. Furthermore, there is no intention to be bound by any expressed or implied theory presented in the preceding technical field, background, brief summary or the following detailed description.
This specification includes references to “one embodiment” or “an embodiment.” The appearances of the phrases “in one embodiment” or “in an embodiment” do not necessarily refer to the same embodiment. Particular features, structures, or characteristics can be combined in any suitable manner consistent with this disclosure.
Terminology. The following paragraphs provide definitions and/or context for terms found in this disclosure (including the appended claims):
“Comprising.” This term is open-ended. As used in the appended claims, this term does not foreclose additional structure or steps.
“Configured To.” Various units or components may be described or claimed as “configured to” perform a task or tasks. In such contexts, “configured to” is used to connote structure by indicating that the units/components include structure that performs those task or tasks during operation. As such, the unit/component can be said to be configured to perform the task even when the specified unit/component is not currently operational (e.g., is not on/active). Reciting that a unit/circuit/component is “configured to” perform one or more tasks is expressly intended not to invoke 35 U.S.C. § 112, sixth paragraph, for that unit/component.
“First,” “Second,” etc. As used herein, these terms are used as labels for nouns that they precede, and do not imply any type of ordering (e.g., spatial, temporal, logical, etc.). For example, reference to a “first” conveyor system does not necessarily imply that this conveyor system is the first conveyor system in a sequence; instead the term “first” is used to differentiate this conveyor system from another conveyor system (e.g., a “second” conveyor system).
“Coupled”—The following description refers to elements or nodes or features being “coupled” together. As used herein, unless expressly stated otherwise, “coupled” means that one element/node/feature is directly or indirectly joined to (or directly or indirectly communicates with) another element/node/feature, and not necessarily mechanically.
“Inhibit”—As used herein, inhibit is used to describe a reducing or minimizing effect. When a component or feature is described as inhibiting an action, motion, or condition it may completely prevent the result or outcome or future state completely. Additionally, “inhibit” can also refer to a reduction or lessening of the outcome, performance, and/or effect which might otherwise occur. Accordingly, when a component, element, or feature is referred to as inhibiting a result or state, it need not completely prevent or eliminate the result or state.
In addition, certain terminology may also be used in the following description for the purpose of reference only, and thus are not intended to be limiting. For example, terms such as “upper” and “lower” refer to directions in the drawings to which reference is made. Terms such as “front,” “back,” “rear,” “side,” “outboard,” and “inboard” describe the orientation and/or location of portions of the component within a consistent but arbitrary frame of reference which is made clear by reference to the text and the associated drawings describing the component under discussion. Such terminology may include the words specifically mentioned above, derivatives thereof, and words of similar import.
Efficiency is an important characteristic of a solar cell as it is directly related to the capability of the solar cell to generate power. Likewise, efficiency in producing solar cells is directly related to the cost effectiveness of such solar cells. Accordingly, techniques for increasing the efficiency of solar cells, or techniques and tools for increasing the efficiency in the manufacture of solar cells, are generally desirable. Some embodiments of the present disclosure allow for increased solar cell manufacture efficiency by providing novel tools for fabricating solar cell structures.
Curing tools for fabricating solar cells using UV-curing of light-receiving surfaces of the solar cells, and the resulting solar cells, are described herein. In the following description, numerous specific details are set forth, such as specific process flow operations, in order to provide a thorough understanding of embodiments of the present disclosure. It will be apparent to one skilled in the art that embodiments of the present disclosure can be practiced without these specific details. In other instances, well-known fabrication techniques, such as lithography and patterning techniques, are not described in detail in order to not unnecessarily obscure embodiments of the present disclosure. Furthermore, it is to be appreciated that the various embodiments shown in the figures are illustrative representations and are not necessarily drawn to scale.
To provide context, light induced degradation (LID) and/or ultra-violet (UV) degradation pose long standing issues for the long term stability of solar cell performance. More particularly, lack of UV stability is a failure mode of back contact solar cells, and can be a potential failure mode of front contact solar cells as well. Efforts have been made to improve the stability of such solar cells without compromising performance in the form of decreased passivation or solar spectrum absorption. Performance stability can be critical for performance guarantees and for product quality differentiation. More particularly, front surface passivation can be critical for performance of high efficiency solar cells. Typically, front surface passivation is performed using a diffusion process followed by a high temperature oxidation and, finally, capping with an antireflection coating (ARC) using plasma-enhanced chemical vapor deposition (PECVD). Silicon nitride (SiN or SiN:H) is commonly used as an ARC due to its optical properties and also for its excellent passivation qualities. A silicon nitride layer can be used to provide H+ to a crystalline silicon/thermal oxide (c-Si/TOX) interface. Unfortunately, the interface can be degraded by long term exposure to UV light via hot electron injection across the interface which breaks existing Si—H bonds.
Addressing one or more of the above issues, in accordance with one or more embodiments described herein, efficiency and reliability of a solar cell are improved using a curing tool that can perform a UV-curing operation. In one exemplary embodiment, the curing tool performs a UV curing operation prior to back end processing of a back contact solar cell. For example, UV irradiation can be performed prior to thermal annealing. The curing tool can therefore be used to perform a method to improve UV stability of solar cells.
Not to be bound by theory, in an embodiment, improved stability achieved by intentional UV treatment and thermal anneal results in a more energetically favorable Si—O bonding scenario. Additionally, such treatment can reduce the total number of O—H bonds at the surface of the underlying thermal oxide, reducing the amount of trap states for hot electron trapping and resulting in decreased interface wear.
In one embodiment, a curing tool includes a radiation curing stage, and one or more pre-cure or post-cure stages. For example, the curing tool can include a deposition stage or an annealing stage before or after the radiation curing stage. The curing tool can include a conveyor system having an actuator operably coupled to a wafer platform having a holding surface facing a radiation source. More particularly, the radiation curing stage can include the radiation source to emit electromagnetic radiation. Accordingly, the conveyor system can move the wafer platform continuously through the radiation curing stage and the pre-cure or post-cure stage(s) with a wafer mounted on the holding surface, can receive the emitted electromagnetic radiation.
The wafer platform 106 can be a supportive structure such as a conveyor belt or a tray on which solar cell substrates or wafers can be placed. More particularly, the wafer platform 106 can have a holding surface 112 to support the wafers. The holding surface 112 can face a direction to receive electromagnetic radiation 114 emitted by a radiation source 116. For example, the curing tool 100 can include a radiation curing stage 118 having the radiation source 116 to emit electromagnetic radiation 114 toward a wafer set on the holding surface 112.
In an embodiment, the radiation source 116 emits electromagnetic radiation 114 including ultraviolet (UV) radiation. For example, the radiation source 116 can include a light emitting diode (LED). The LED can be an UV LED to emit electromagnetic radiation having a wavelength in a range of 330-405 nm. Alternatively, the LED can be a short wavelength visible LED having a wavelength in a range of 400-600 nm. The radiation source can include an arc lamp. For example, the radiation source 116 can be a broadband light source such as a mercury arc lamp or a xenon lamp. It will be appreciated that the examples above are not limiting, and the radiation source 116 can include other radiation devices, such as a laser device or an x-ray tube to emit corresponding types of electromagnetic radiation.
The curing tool 100 can include one or more additional stages other than the radiation curing stage 118. More particularly, the curing tool 100 can include one or more pre-cure stages 120 and one or more post-cure stages 122. By way of example, the pre-cure stage(s) 120 and the post-cure stage(s) 122 can include a deposition stage and/or an annealing stage.
In an embodiment, at least one of the pre-cure stages 120 is a deposition stage. For example, the deposition stage can deposit a passivating dielectric layer on a texturized topography of a light-receiving surface of a starting substrate, e.g., the wafer, of a solar cell. A structure of the solar cell is described further below with respect to
One or more additional pre-cure stages can be incorporated in the curing tool. For example, a pre-cure stage can form an intermediate material layer on the passivated dielectric layer. The additional pre-cure stage can be a deposition stage to form the intermediate material layer using a deposition process such as, but not limited to, plasma-enhanced chemical vapor deposition (PECVD), low pressure chemical vapor deposition (LPCVD), or sputtering (physical vapor deposition, PVD).
One or more of the deposition stages of the curing tool can be an anti-reflective coating (ARC) stage used to form an ARC layer on the optional intermediate material layer or the passivated dielectric layer of the wafer. The ARC stage can include the components necessary to form a silicon nitride layer or a layer of indium tin oxide (ITO). The substrate can be moved into the radiation curing stage after application of the ARC layer to expose the ARC layer to the electromagnetic radiation emitted by the radiation source. More particularly, the ARC layer can face the radiation source to receive the electromagnetic radiation and to form a UV-cured ARC layer.
In an embodiment, at least one of the post-cure stages 122 is an annealing stage. For example, after forming the UV-cured ARC layer on the substrate, the solar cell can be heated. The annealing stage can include the components required to heat the wafer in a range of 200-500 degrees Celsius. Such components can include infrared and/or convective heaters and elements. The components can also include those necessary to perform a forming gas anneal (FGA) process, a rapid thermal anneal (RTA) process, an infra-red (IR) heating process, a furnace heating process, and a laser annealing process. Accordingly, the UV-cured ARC layer can be thermally annealed to form a UV-cured and thermally annealed ARC layer.
The process stages described above can incorporate or be combined with numerous other process stages for forming various portions of a solar cell. For example, the formation of emitter regions on the solar cell can include the formation of one or more conductive layers. Such conductive layers include metal formed by a deposition, lithographic, and etch approach or, alternatively, a printing or plating process or, alternatively, a foil or wire adhesion process. Accordingly, any of these processes can be incorporated in a respective pre-cure stage or post-cure stage of the curing tool.
The fabrication of conductive contacts on the solar cell can involve the inclusion of one or more sputtered, plated, or bonded conductive layers, and the requisite processes can be incorporated in one or more stages of the curing tool. For example, the curing tool can include a seed layer formation stage to fabricate conductive contacts. The seed layer formation stage can include the components required to deposit a blanket layer of metal-based layers, e.g., aluminum-based layers, that can be patterned later using a deposition, lithographic, or etch approach.
The curing tool 100 can incorporate a photoluminescence (PL) detection system in a pre-cure stage 120 or a post-cure stage 122. That is, PL detection can occur before the cure and post-cure to confirm that a surface of the wafer is depassivated. One or more PL detectors can be located at several locations throughout the process, e.g., between the loading stage and the unloading stage, or the detector(s) can be co-located at a single location at the end of the curing tool, e.g., at or adjacent to the unloading stage. A light source used to irradiate the wafer to perform the PL detection can be the same source used to perform the radiative interface cure. More particularly, the radiation source of the radiation curing stage can provide the requisite light to perform PL detection on the wafer. Accordingly, in an embodiment, a separate light source for the PL detection is not necessary.
The conveyor system 102 and/or 104 of the curing tool 100 can transfer the wafer platform 106 continuously through the various stages described above. For example, the conveyor system 102 and/or 104 can move the wafer platform 106 continuously through the radiation curing stage 118 and one or more of the deposition stages or the annealing stage. Accordingly, the wafer mounted on the wafer platform 106 can be set on the holding surface 112 and sequentially processed in a single process flow to: deposit various layers, e.g., the ARC layer, on a starting substrate; to irradiate and cure the various layers, e.g., using UV radiation; and to anneal the cured wafer layers.
In an embodiment, the wafer platform includes a heat exchanger 416 to transfer heat 418 from the received electromagnetic radiation into a surrounding environment. By way of example, the heat exchanger 416 can include a passive heat sink to reduce heat accumulation in the wafer mounted on the holding surface. The passive heat sink can include an aluminum plate and/or cooling fins such that radiant heat from the electromagnetic radiation is conductively transferred from the wafer to the metal body and then convectively transferred from the metal body to the surrounding environment. The heat exchanger can incorporate active cooling elements. For example, fluid cooling pipes can extend over or through the metal body such that conducted heat is transferred into a fluid, e.g., water, flowing through the pipes and away from the wafer.
Referring again to
The curing tool 100 can also minimize footprint by incorporating several layers of wafers. For example, the conveyor system can convey the wafer platform in a first deck above radiation source and the second conveyor system can convey second wafer platform in a second deck below the radiation source. Here the terms “above” and “below” refer to respective directions from the radiation source, i.e., on different sides of the radiation source. Accordingly, several curing decks can be stacked vertically within a same footprint. Given that space within a manufacturing facility has an associated cost, the curing tool having several curing decks can provide a manufacturing efficiency.
In an embodiment, the curing tool can incorporate multiple lanes per deck to minimize tool cost and/or footprint. For example, the first deck or the second deck can incorporate several conveyor systems arranged in parallel. The conveyor systems can share one or more components. For example, each conveyor system can have a respective conveyor belt, and the conveyor belts can be driven by a same actuator. Accordingly, different wafers can be carried by the respective conveyor belts using a single actuator. Similar to the shared radiation source as described above with respect to some embodiments, sharing conveyor mechanisms can reduce tool costs and/or size.
Referring to
In an embodiment, the passivating dielectric layer 508 is a layer of silicon dioxide (SiO2). In one such embodiment, the layer of silicon dioxide (SiO2) has a thickness approximately in the range of 10-400 Angstroms. In one embodiment, the passivating dielectric layer 508 is hydrophilic. In an embodiment, the passivating dielectric layer 508 is formed by a technique such as, but not limited to, chemical oxidation of a portion of the light-receiving surface of the silicon substrate, plasma-enhanced chemical vapor deposition (PECVD) of silicon dioxide (SiO2), thermal oxidation of a portion of the light-receiving surface of the silicon substrate, atomic layer deposition (ALD) of SiO2, or exposure of the light-receiving surface of the silicon substrate to ultra-violet (UV) radiation in an O2 or O3 environment. In a specific embodiment, the passivating dielectric layer 508 is a thermal silicon oxide layer formed on the light-receiving surface of an N-type monocrystalline silicon substrate. In another specific embodiment, the passivating dielectric layer 508 is formed by atomic layer deposition (ALD), and is a silicon oxide passivating dielectric layer.
In an embodiment, the intermediate material layer (or layers) 510 is or includes an N-type micro- or poly-crystalline silicon layer formed on the passivating dielectric layer 508. In one such embodiment, the N-type micro- or poly-crystalline silicon layer has a thickness approximately in the range of 1-20 nanometers. In one embodiment, the N-type micro- or poly-crystalline silicon layer has a crystalline fraction approximately in the range of 0.1-0.9 (i.e., 10-90%), with the balance being amorphous. In an embodiment, a concentration of N-type dopants (e.g., phosphorous) in the N-type micro- or poly-crystalline silicon layer is approximately in the range of 1E17-1E20 atoms/cm3. In one embodiment, the N-type micro- or poly-crystalline silicon layer includes small grains having a micro- or nano-diameter. The small grains can be embedded in a generally amorphous silicon matrix and have essentially no long range order. In an embodiment, the N-type dopants are included in the amorphous portion, in the crystalline portion, or both.
In an embodiment, the N-type micro- or poly-crystalline silicon layer is formed by depositing an N-type amorphous silicon layer and, subsequently, phase converting the N-type amorphous silicon layer to the N-type micro- or poly-crystalline silicon layer. In one such embodiment, the N-type amorphous silicon layer is formed by a deposition process such as, but not limited to, plasma-enhanced chemical vapor deposition (PECVD), low pressure chemical vapor deposition (LPCVD), or sputtering (physical vapor deposition, PVD). In one embodiment, the phase conversion is achieved using a technique such as, but not limited to, heating in a furnace, rapid thermal processing (RTP), laser annealing, or forming gas annealing (FGA). In another embodiment, the N-type micro- or poly-crystalline silicon layer is formed by depositing the N-type micro- or poly-crystalline silicon layer. In one such embodiment, the N-type micro- or poly-crystalline silicon layer is deposited using PECVD.
In another embodiment, the intermediate material layer (or layers) 510 is or includes an N-type amorphous silicon layer. In one embodiment, forming the N-type amorphous silicon layer is performed at a temperature less than approximately 400 degrees Celsius. In an embodiment, the N-type amorphous silicon layer is formed using plasma enhanced chemical vapor deposition (PECVD), represented by phosphorous-doped a-Si:H, which includes Si—H covalent bonds throughout the layer. In either case, in an embodiment, the N-type micro- or poly-crystalline or amorphous silicon layer 512 includes an impurity such as phosphorous dopants. In one such embodiment, the phosphorous dopants are incorporated either during film deposition or in a post implantation operation.
In another embodiment, the intermediate material layer (or layers) 510 is or includes a layer such as, but not limited to, an amorphous silicon (a-Si) layer, a silicon-rich silicon nitride layer, or a Group III-V material layer. In one embodiment where the intermediate material layer (or layers) 510 is or includes a Group III-V material layer, the Group III-V material layer is a layer such as, but not limited to, a GaP layer, an AlGaP layer, a GaAs layer, an InGaAs layer, a GaN layer, or an AlGaN layer.
In an embodiment, the ARC layer 512 is a non-conductive ARC layer. In one such embodiment, the non-conductive ARC layer 512 is or includes a silicon nitride layer. In a particular such embodiment, the silicon nitride is formed at a temperature less than approximately 400 degrees Celsius. In another embodiment, the ARC layer 512 is or includes a layer of aluminum oxide (AlOx). In another embodiment, the ARC layer 512 is a conductive ARC layer. In one such embodiment, the conductive ARC layer includes a layer of indium tin oxide (ITO).
In an embodiment, the ARC layer 512 is formed having an amount of hydrogen therein. In one such embodiment, the fabrication process further includes removing at least a portion of the amount of hydrogen from the ARC layer 512 after deposition of the ARC layer 512. In a specific such embodiment, the portion of the amount of hydrogen from the ARC layer 512 is removed during the thermal annealing process described below in association with
It is to be appreciated that although the exposure to UV radiation 514 is depicted herein as being performed following formation of the ARC layer 512, such a UV cure can be performed at other stages of the process flow. For example, in a first alternative embodiment, a UV cure is performed subsequent to forming the passivating dielectric layer 508 but prior to forming the ARC layer 512. In one such alternative embodiment, a UV cure is performed subsequent to forming the passivating dielectric layer 508 but prior to forming intermediate material layer (or layers) 510. In another such alternative embodiment, a UV cure is performed subsequent to forming the passivating dielectric layer 508 and forming intermediate material layer (or layers) 510.
In an embodiment, exposing the ARC layer 512 to UV radiation involves exposing the ARC layer 512 to light having a wavelength approximately in the range of 250-450 nanometers. In an embodiment, exposing the ARC layer 512 to UV radiation involves exposing the ARC layer 512 to the UV radiation 514 for a duration approximately in the range of 1 second-1 day. In an embodiment, subsequent to forming the ARC layer 512 but prior to exposing the ARC layer 512 to the UV radiation 514, the solar cell is heated at a temperature approximately in the range of 200-500 degrees Celsius. Such heating can be performed in a heating stage of the curing tool.
In an embodiment, the ARC layer is thermally annealed by heating at a temperature approximately in the range of 200-500 degrees Celsius. In an embodiment, the ARC layer is thermally annealed using a process such as, but not limited to, a forming gas anneal (FGA) process, a rapid thermal anneal (RTA) process, an infra-red (IR) heating process, a furnace heating process, and a laser annealing process.
Referring to
Referring to
Referring to
In an embodiment, the wafer platform includes an irradiation channel 712. The irradiation channel 712 may be a hole aligned along a vertical axis with a back side of the wafer. Accordingly, the electromagnetic radiation may pass through the irradiation channel to cure the back side of the wafer.
In an embodiment, curing and/or heating of the back side of the wafer may be unnecessary, and thus, the irradiation channel may be omitted. That is, the wafer platform may have a closed pocket with a solid back surface extending laterally between the registration lips. The solid back surface may include the holding surface to support the wafer. The solid back surface may also transfer heat conductively to the wafer surface.
A rate of movement of conveyor system may be controlled to achieve a desired curing result. More particularly, the rate of movement of the conveyor system may be controlled to accumulate a predetermined amount of electromagnetic radiation in the wafer within the radiation curing stage. It will be appreciated that the predetermined amount may vary from process to process, and that motion of a conveyor belt may controlled by increasing or decreasing a speed of actuation of the actuator that is operably coupled to the wafer platform. In an embodiment, the actuator of the conveyor system may be stopped when the wafer platform is within the radiation curing stage to pause for the electromagnetic radiation to impinge on a supported wafer. Accordingly, the supported wafer may accumulate a predetermined light dose during the curing operation. After dosing is complete, the actuator may be restarted to convey the wafer platform toward the unload stage of the curing tool.
Although certain materials are described specifically with reference to the above described embodiments, some materials can be readily substituted with others with such embodiments remaining within the scope of the present disclosure. For example, in an embodiment, a different material substrate, such as a group III-V material substrate, can be used instead of a silicon substrate. Additionally, although reference is made to back contact solar cell arrangements, it is to be appreciated that approaches described herein can have application to front contact solar cells or bifacial architectures as well. In other embodiments, the above described approaches can be applicable to manufacturing of other than solar cells. For example, manufacturing of light emitting diode (LEDs) can benefit from approaches described herein.
Thus, curing tools for fabricating solar cells using UV-curing of light-receiving surfaces of the solar cells, and the resulting solar cells, have been disclosed.
Although specific embodiments have been described above, these embodiments are not intended to limit the scope of the present disclosure, even where only a single embodiment is described with respect to a particular feature. Examples of features provided in the disclosure are intended to be illustrative rather than restrictive unless stated otherwise. The above description is intended to cover such alternatives, modifications, and equivalents as would be apparent to a person skilled in the art having the benefit of the present disclosure.
The scope of the present disclosure includes any feature or combination of features disclosed herein (either explicitly or implicitly), or any generalization thereof, whether or not it mitigates any or all of the problems addressed herein. Accordingly, new claims can be formulated during prosecution of the present application (or an application claiming priority thereto) to any such combination of features. In particular, with reference to the appended claims, features from dependent claims can be combined with those of the independent claims and features from respective independent claims can be combined in any appropriate manner and not merely in the specific combinations enumerated in the appended claims.
This application claims the benefit of U.S. Provisional Application No. 62/421,179, filed on Nov. 11, 2016, the entire contents of which are hereby incorporated by reference herein.
Number | Date | Country | |
---|---|---|---|
62421179 | Nov 2016 | US |