This nonprovisional application is based on Japanese Patent Applications Nos. 2005-039555, 2005-168124 and 2005-332580 filed with the Japan Patent Office on Feb. 16, 2005, Jun. 8, 2005 and Nov. 17, 2005, respectively, the entire contents of which are hereby incorporated by reference.
1. Field of the Invention
The present invention relates to a solar cell, a solar cell string and a method of manufacturing the solar cell string.
2. Description of the Background Art
A solar cell using a compound semiconductor has been known as a solar cell having high efficiency and suitable for aerospace applications among solar cells. As shown in
As shown in
In conventional solar cell 1002, the first electrode 1008 is formed only on a part of compound semiconductor layer 1003, and therefore, the surface of solar cell 1002 comes to have recessed and protruded portions. When solar cell string 1001 is formed, solar cell 1002 is arranged on a stage 21 with the side of first electrode 1008, that is, the side with recesses and protrusions, facing downward, a wiring member 1010 is sandwiched between an electrode 22 for welding and the second electrode 1006, and weld and electrically connected, as shown in the schematic cross-section of
Therefore, an object of the present invention is to provide a solar cell less susceptible to damages and cracks generated at the time of connecting a wiring member, a solar cell string using such solar cells, and a method of manufacturing the solar cell string.
The present invention provides a solar cell including a fist compound semiconductor stacked body with an n-type compound semiconductor layer and a p-type compound semiconductor layer in contact with each other, wherein the first compound semiconductor stacked body has a first electrode of a first polarity and a second electrode of a second polarity, and surfaces of the first electrode and the second electrode are exposed to the same side.
The present invention also provides a solar cell string including a plurality of solar cells described above, wherein the second electrode of the first solar cell is electrically connected by a first wiring member to the first electrode of the second solar cell.
Further, the present invention provides a method of manufacturing a solar cell string by electrically connecting a plurality of solar cells described above to each other, including the steps of: placing the first and second solar cells on a stage with a side where a surface of the first electrode is exposed facing upward; electrically connecting one end of a first wiring member to the second electrode of the first solar cell; and electrically connecting the other end of the first wiring member to the first electrode of the second solar cell. In the method of manufacturing the solar cell string in accordance with the present invention, the order of performing the step of electrically connecting one end of the first wiring member to the second electrode of the first solar cell and the step of electrically connecting the other end of the first wiring member to the first electrode of the second solar cell is not specifically limited.
In the method of manufacturing the solar cell string, as the first wiring member, a metal ribbon or a metal wire may be used, and the first wiring member may be connected by welding or bonding.
Further, in the solar cell in accordance with the present invention, a second compound semiconductor stacked body including an n-type compound semiconductor layer and a p-type compound semiconductor layer in contact with each other is provided spaced from the first compound semiconductor stacked body, and a third electrode may be provided on a surface of the second compound semiconductor stacked body.
Further, the present invention provides a solar cell string including a plurality of solar cells described above, wherein the second electrode of the first solar cell is electrically connected by a first wiring member to the first electrode of the second solar batter, and the third electrode of the first solar cell is electrically connected by a second wiring member to the second electrode of the second solar cell.
The present invention further provides a method of manufacturing a solar cell string by electrically connecting a plurality of solar cells described above to each other, including the steps of: placing the first and second solar cells on a stage with a side where a surface of the first electrode is exposed facing upward; electrically connecting one end of a first wiring member to the second electrode of the first solar cell; electrically connecting the other end of the first wiring member to the first electrode of the second solar cell; electrically connecting one end of a second wiring member to the third electrode of the first solar cell; and electrically connecting the other end of the second wiring member to the second electrode of the second solar cell. In the method of manufacturing the solar cell string in accordance with the present invention, the order of performing the step of electrically connecting one end of the first wiring member to the second electrode of the first solar cell, the step of electrically connecting the other end of the first wiring member to the first electrode of the second solar cell, the step of electrically connecting one end of a second wiring member to the third electrode of the first solar cell, and the step of electrically connecting the other end of the second wiring member to the second electrode of the second solar cell is not specifically limited.
Further, in the method manufacturing the solar cell string, a metal ribbon or a metal wire may be used as each of the first and second wiring members, and the first and second wiring members may be each connected by wilding or bonding.
Further, in the solar cell in accordance with the present invention, the first compound semiconductor stacked body may have a third electrode of which surface is exposed to a side opposite to the first and second electrodes.
Preferably, in the solar cell in accordance with the present invention, resistance between the second and third electrodes is at most 1Ω.
Further, in the solar cell in accordance with the present invention, the third electrode is formed to have a lattice shape.
Further, in the solar cell in accordance with the present invention, the third electrode may be formed of a transparent conductive material.
The solar cell in accordance with the present invention may have a tunnel junction between the compound semiconductor layer on which the first electrode is formed and the compound semiconductor layer on which the second electrode is formed.
Preferably, in the solar cell in accordance with the present invention, the tunnel junction is formed at an interface between a compound semiconductor layer having different conductivity type from the compound semiconductor layer on which the second electrode is formed and the compound semiconductor layer on which the second electrode is formed.
In the present invention, provided that the first polarity of the first electrode and the second polarity of the second electrode are different from each other, the first polarity and the second polarity may be the positive or negative polarity.
In the present invention, the stage is not specifically limited, and any stage that has a surface allowing placement of the first and second solar cells may be used.
The foregoing and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.
FIGS. 1 to 6 are schematic cross-sections illustrating an exemplary method of manufacturing a solar cell in accordance with the present invention.
FIGS. 16 to 19 are schematic cross-sections illustrating another example of the method of manufacturing the solar cell in accordance with the present invention.
FIGS. 20 to 23 are schematic cross-sections of another example of the solar cell in accordance with the present invention.
FIGS. 24 to 27 are schematic cross-sections illustrating a further example of the method of manufacturing the solar cell in accordance with the present invention.
FIGS. 28 to 34 are schematic cross-sections showing a further example of the solar cell in accordance with the present invention.
FIGS. 35 to 40 are schematic cross-sections illustrating a further example of the method of manufacturing the solar cell in accordance with the present invention.
FIGS. 41 to 44 are schematic cross-sections of a further example of the solar cell in accordance with the present invention.
In the following, embodiments of the present invention will be described. In the figures of the invention, the same or corresponding reference characters denote the same or corresponding portions.
An example of the method of manufacturing the solar cell in accordance with the present invention will be described in the following. First, as shown in the schematic cross-section of
Next, as shown in the schematic cross-section of
Next, as shown in the schematic cross-section of
Thereafter, n-type InGaP layer 51 is removed by etching using an acid solution, to expose a surface of n-type GaAs layer 52 as shown in the schematic cross-section of
Next, on a surface of a part of n-type GaAs layer 52, a resist pattern is formed by photolithography, and thereafter, a metal film is formed and the resist pattern is removed, whereby a surface electrode layer 8 is formed in a prescribed pattern as shown in the schematic cross-section of
Then, using surface electrode layer 8 as a mask, n-type GaAs layer 52 at portions where surface electrode layer 8 is not formed is removed by etching using an alkali solution. Next, a resist pattern is formed by photolithography or the like to cover surface electrode layer 8, and by etching using an alkali solution and etching using an acid solution, a part of the surface of back surface electrode layer 6 is exposed. As a result, compound semiconductor stacked body 5 on the surface of back surface electrode layer 6 is divided into a plurality of pieces. Thereafter, an anti-reflection film may be formed on a surface where surface electrode layer 8 is formed, by EB (Electron Beam) vapor deposition or other method.
Then, by cutting and dividing the exposed back surface electrode layer 6 into a plurality of pieces, a plurality of solar cells 2 shown in the schematic plan view of
The structure of the solar cell in accordance with the present invention formed in the above-described manner will be described.
As shown in
As shown in
In the present embodiment, the first electrode 8a is formed on the surface of n-type compound semiconductor layer, and the second electrode 6a is formed on the surface of p-type compound semiconductor layer, and therefore, the first polarity is negative and the second polarity is positive.
The first electrode has the same structure as surface electrode layer 8 described above, and the second electrode 6a has the same structure as back surface electrode layer 6 described above.
In the first compound semiconductor stacked body 5a, n-type GaAs layer 60 as the n-type compound semiconductor layer and p-type GaAs layer 61 as the p-type compound semiconductor layer are in contact with each other. Further, in the first compound semiconductor stacked body 5a, n-type InGaP layer 54 as the n-type compound semiconductor layer and p-type InGaP layer 55 as the p-type compound semiconductor layer are in contact with each other.
Further, as shown in
In the second compound semiconductor stacked body 5b, n-type GaAs layer 60 as the n-type compound semiconductor layer and p-type GaAs layer 61 as the p-type compound semiconductor layer are in contact with each other. Further, in the second compound semiconductor stacked body 5b, n-type InGaP layer 54 as the n-type compound semiconductor layer and p-type InGaP layer 55 as the p-type compound semiconductor layer are in contact with each other.
With the solar cell of the present invention having such a structure, the wiring member can be electrically connected with the flat surface of second electrode 6a placed on the stage. Therefore, even when the first and second solar cells 2a and 2b are pressed by the electrode for welding at the time of connection, damage or crack of the first and second solar cells can be suppressed as compared with the conventional example.
Here, a solar cell string 1 in accordance with the present invention includes first and second solar cells 2a and 2b manufactured in the above-described manner. An exposed portion 6b of the second electrode 6a of the first solar cell 2a is electrically connected by a first wiring member 10a to a first electrode 8a of the second solar cell 2b. Further, a third electrode 8b of the first solar cell 2a is electrically connected by a second wiring member 10b to the exposed portion 6b of the second electrode 6a of the second solar cell 2b.
Generally, in a solar cell string having a plurality of solar cells electrically connected to each other, it is possible that part of the solar cells forming the solar cell string is shaded, when clouds hide the sun. In such a case, to a solar cell not irradiated with sunlight, a photovoltaic voltage generated in another solar cell might be applied in reverse direction, destroying the solar cell not irradiated with sunlight.
In the solar cell string of the present invention shown in
The solar cell string 1 of the present invention may be inserted, together with a transparent adhesive 13, between a transparent film 12 and a film 11, as shown in the schematic cross-section of
An example of the method of manufacturing the solar cell string in accordance with the present invention will be described in the following.
First, as shown in the schematic cross-section of
Next, one end of first wiring member 10a is arranged on a surface of exposed portion 6b of the second electrode 6a of first solar cell 2a, sandwiched between electrode 22 for welding and exposed portion 6b, and welded to be electrically connected. The other end of first wiring member 10a is arranged on a surface of first electrode 8a of the first compound semiconductor stacked body 5a of second solar cell 2b, sandwiched between electrode 22 for welding and first electrode 8a, and welded to be electrically connected.
As shown in the schematic cross-section of
As described above, in the present invention, both the first and second wiring members 10a and 10b can be electrically connected in a state in which the flat surface of second electrode 6a is placed on stage 21. Therefore, even when the first and second solar cells 2a and 2b are pressed by electrode 22 for welding at the time of connection of the first and second wiring members 10a and 10b, damage or crack of the first and second solar cells can be suppressed as compared with the conventional example. Therefore, in the present invention, generation of cracks or any damage to the solar cells when the first and second wiring members 10a and 10b are connected can be reduced as compared with the conventional method.
The first and second wiring members may be connected by welding and, alternatively, these may be connected by bonding, as is well known conventionally.
As the first and second wiring members, a metal ribbon or metal wire formed of silver (Ag), gold (Au), copper (Cu) coated with gold or copper coated with silver may be used. When a metal wire is used as the first and second wiring members, a plurality of metal wires may be connected utilizing ultrasonic wave other than welding, and preferable material is silver. Preferable diameter of the metal wire is at most 25 μm.
Further, in the present invention, the number of junctions between the n-type and p-type compound semiconductor layers is not specifically limited.
In the present invention, as the first, second and third electrodes, a non-transparent material such as metal, or a transparent conductive material such as ZnO (zinc oxide), SnO2 (tin oxide) or ITO (indium tin oxide) may be used.
Another example of the method of manufacturing the solar cell in accordance with the present invention will be described in the following. First, as shown in the schematic cross-section of
Next, as shown by the schematic cross-section of
Next, by etching using an alkali solution and etching using an acid solution, a part of compound semiconductor stacked body 5 is removed to a prescribed pattern, and a surface of p-type Ge substrate 101 is exposed as shown in the schematic cross-section of
Then, as shown in the schematic cross-section of
In the solar cell formed in this manner, on the surface of n-type GaAs layer 116 of first compound semiconductor stacked body 5a, the first electrode 8a having the first polarity is formed, and on the surface of p-type Ge substrate 101, the second electrode 6a having the second polarity is formed. The surface of first electrode 8a and the surface of second electrode 6a are exposed to the same side (upper side of the sheet of
In the present embodiment, the first electrode 8a is formed on the surface of n-type compound semiconductor layer, and the second electrode 6a is formed on the surface of p-type compound semiconductor layer, and therefore, the first polarity is negative and the second polarity is positive.
In the solar cell of the present invention having such a structure, wiring member 10 can be electrically connected to the first and second electrodes 8a and 6a, with the flat surface of p-type Ge substrate 101 placed on stage 21, as shown in the schematic cross-section of
As shown in the schematic cross-section of
Thereafter, the surface of transparent protective member 121 is covered with a resist, and the thickness of p-type Ge substrate 101 is decreased by etching using a hydrofluoric acid-based etchant. Then, as shown in the schematic cross-section of
Here, resistance between the second electrode 6a and the third electrode 8b is, preferably, at most 1Ω. The second electrode 6a is provided for decreasing spreading resistance and to uniformly collect the current. Therefore, when both of the second and third electrodes 6a and 8b form an ohmic contact with the surface of p-type Ge substrate 101, the second and third electrodes 6a and 8b are conducted. In addition, when the resistance between the second and third electrodes 6a and 8b is not higher than 1Ω, the current that can be taken out from the second electrode 6a would be taken out only from wiring member 10 formed at the third electrode 8b, without the necessity of providing any wire to the second electrode 6a.
Another example of the method of manufacturing a solar cell in accordance with the present invention will be described in the following. First, as shown in the schematic cross-section of
Thereafter, as shown in the schematic cross-section of
Thereafter, by etching using an alkali solution and etching using an acid solution, a part of compound semiconductor stacked body 5 is removed to a prescribed pattern, and as shown in the schematic cross-section of
Then, as shown in the schematic cross-section of
In the solar cell of the present invention formed in this manner, on the surface of n-type GaAs layer 133 of the first compound semiconductor stacked body 5a, the first electrode 8a is formed, and on the surface of p-type Ge substrate 125, the second electrode 6a is formed. The surfaces of the first and second electrodes 8a and 6a are exposed to the same side (upper side of the sheet of
In the present embodiment, the first electrode 8a is formed on the surface of the n-type compound semiconductor layer, and the second electrode 6a is formed on the surface of the p-type compound semiconductor layer, and therefore, the first polarity is negative and the second polarity is positive.
In the solar cell in accordance with the present invention having such a structure, wiring member 10 can be electrically connected to the first and second electrodes 8a and 6a with the flat surface of p-type Ge substrate 125 placed on stage 21, as shown in the schematic cross-section of
Further, as shown in the schematic cross-section of
Thereafter, the surface of transparent protective member 121 is covered with a resist, p-type Ge substrate 125 and p-type GaAs layer 126 are removed by etching using a hydrofluoric acid-based etchant, the surface of p-type InGaP layer 127 is exposed and the etching is stopped, as shown in the schematic cross-section of
Thereafter, as show in the schematic cross-section of
Here, on the surface of n-type impurity diffused Si layer 135, an n-type electrode 138 is formed, and on the surface of p-type impurity diffused Si layer 136, a p-type electrode 139 is formed. Further, on the surfaces of n-type electrode 138 and p-type electrode 139, wiring member 10 is electrically connected.
In such a structure, Si (band gap: 1.12 eV) forming the n-type impurity diffused Si layer 135 and p-type impurity diffused Si layer 136 of the back electrode type solar cell 137 has narrower band gap than InGaP (band gap: 1.85 eV) forming the p-type InGaP layer 130 and n-type InGaP layer 131 of the solar cell using the compound semiconductor, and therefore, sunlight of such a wavelength that cannot be absorbed by the solar cell using the compound semiconductor can be absorbed by the back electrode type solar cell 137.
Here, if the third electrode 8b is formed of a non-transparent material, it is preferred that the third electrode 8b covers at most 30% of the area of the surface where the third electrode 8b is formed, in order to allow entrance of larger amount of sunlight to the back electrode type solar cell 137. If the third electrode 8b is formed of a transparent conductive material, larger amount of sunlight can enter the back electrode type solar cell 137 than when the third electrode 8b is formed of a non-transparent material, and therefore, it is preferred in improving conversion efficiency.
Here, the surfaces of the first and second electrodes 8a and 6a are exposed to the same side (upper side of the sheet of
Further, a tunnel junction is formed between compound semiconductor layer 202 on which the first electrode 8a is formed and compound semiconductor layer 204 on which the second electrode 6a is formed.
By such a structure, it becomes possible to form the first and second electrodes 8a and 6a on the surfaces of the compound semiconductor layers of the same conductivity type in the same direction. Therefore, the first and second electrodes 8a and 6a can be formed at the same time by the same material. Thus, the process of manufacturing the first and second electrodes 8a and 6a can be simplified.
In the solar cell having such a structure, when the wiring member is connected to the first and second electrodes 8a and 6a, it is unnecessary to invert the fist compound semiconductor stacked body 5a. The wiring member can be connected to each of the first and second electrodes 8a and 6a with the first compound semiconductor stacked body 5a placed on the stage. Therefore, even when the solar cell of the present invention is pressed by the electrode for welding, damage and crack of the solar cell of the present invention can be suppressed as compared with the conventional example.
Though the tunnel junction may be provided in the first compound semiconductor stacked body 5a, it is preferably formed at an interface between the compound semiconductor layer 205 having different conductivity from compound semiconductor layer 204 on which the second electrode 6a is formed and the compound semiconductor layer 204 on which the second electrode 6a is formed.
When the tunnel junction is formed at the interface between compound semiconductor layer 205 and compound semiconductor layer 204 where the second electrode 6a is formed, compound semiconductor layers 205 and 204 have high carrier concentration, and therefore, electric resistance of compound semiconductor layer 204 can be made low. In the solar cell shown in
It is preferred that the first and second surfaces 202a and 202c of the first compound semiconductor stacked body 5a are formed of one same material. In the step of forming the electrodes in which the first and second electrodes 8a and 6a are formed simultaneously using the same material, if the first and second surfaces 202a and 202c as the underlying layers for forming the first and second electrodes 8a and 6a are formed of the same material, the conditions of process steps that can reduce contact resistance would be the same, and therefore, selection of condition becomes easier.
Further, in the present invention, the third electrode 8b may not be formed. However, if the third electrode 8b is formed as described above, part of the current generated in the first compound semiconductor stacked body 5a can be collected through the third electrode 8b of low electric resistance to the second electrode 6a, and therefore, the series resistance at portions where the current flows can be reduced.
First, as the substrate for epitaxial growth, an n-type GaAs substrate (1×1018 cm−3, Si doped, diameter: 100 mm) was prepared. Then, the n-type GaAs substrate was put in a vertical MOCVD apparatus. As shown in
Then, on a surface of n-type InGaP layer 51, an n-type GaAs layer 52 as an n-type cap layer, an n-type AlInP layer 53 as a window layer, an n-type InGaP layer 54 as an emitter layer, a p-type InGaP layer 55 as a base layer and a p-type AlInP layer 56 as a back surface electric field layer were epitaxially grown successively.
Thereafter, on a surface of p-type AlInP layer 56, a p-type AlGaAs layer 57 and an n-type InGaP layer 58 were epitaxially grown successively, to form a tunnel junction.
On n-type InGaP layer 58, an n-type AlInP layer 59 as a window layer, an n-type GaAs layer 60 as an emitter layer, a p-type GaAs layer 61 as a base layer, a p-type InGaP layer 62 as a back surface electric field layer, and a p-type GaAs layer 63 as a p-type cap layer were epitaxially grown successively. Consequently, a compound semiconductor stacked body 5 was formed. As a condition for epitaxial growth, the temperature was set to about 700° C.
As materials for growing the GaAs layers, TMG (trimethyl gallium) and AsH3 (arsine) were used. As materials for growing InGaP layers, TMI (trimethyl indium), TMG and PH3 (phosphine) were used. As materials for growing AlInP layers, TMA (trimethyl aluminum), TMI and PH3 were used.
Further, as an impurity material for forming the n-type GaAs layer, n-type InGaP layer and n-type AlInP layer, SiH4 (mono-silane) was used. As an impurity material for forming the p-type GaAs layer, p-type InGaP layer and p-type AlInP layer, DEZn (diethyl zinc) was used.
Further, as materials for growing the AlGaAs layer, TMA, TMG and AsH3 were used, and as an impurity material for forming the p-type AlGaAs layer, CBr4 (carbon tetrabromide) were used.
Next, on a surface of p-type GaAs layer 63, an Au—Zn film was vapor-deposited, and a prescribed heat treatment was performed. Next, on a surface of the Au—Zn film, an Au plating film having the thickness of about 5 μm was formed. Consequently, on the surface of p-type GaAs layer 63, a back surface electrode layer 6 was formed, as shown in
Thereafter, wax 7 was applied to the surface of back surface electrode layer 6, for protection, as shown in
Then, by etching using an acid solution, the exposed n-type InGaP layer 51 as the intermediate layer was removed, and n-type GaAs layer 52 was exposed as shown in
Then, to cover the resist pattern, an Au film (containing Ge of 12% by weight) was formed to the thickness of about 100 nm by resistance heating. Thereafter, by the EB vapor deposition, an Ni film having the thickness of about 20 nm and an Au film having the thickness of about 5000 nm were formed successively. Next, by the lift-off method, the resist pattern, the Au film formed on the resist pattern, the Ni film formed on the Au film, and the Au film formed on the Ni film were removed. In this manner, a surface electrode layer 8 was formed as shown in
Next, using surface electrode layer 8 as a mask, etching with an alkali solution was performed, to remove exposed portions of n-type GaAs layer 52 where surface electrode layer 8 was not formed. Thereafter, a prescribed resist pattern was formed to cover surface electrode layer 8. Using the resist pattern as a mask, a part of compound semiconductor stacked body 5 was etched with an alkali solution and with an acid solution, so that an exposed portion was formed by exposing part of back surface electrode layer 6. In this manner, on the surface of back surface electrode layer 6, compound semiconductor stacked body 5 was divided into a plurality of pieces.
Further, by the EB vapor deposition method, a TiO2 film having the thickness of about 55 nm and an MgF2 film having the thickness of about 100 nm were formed continuously, as an anti-reflection film, on the side where the sunlight enters (surface of n-type AlInP layer 53). Thereafter, by cutting back surface electrode layer 6 along the exposed back surface electrode layer 6, two solar cells having the structure shown in
The two solar cells formed in the above-described manner were electrically connected by welding of first wiring member 10a and second wiring member 10b, respectively, as shown in
Welding of the first and second wiring members 10a and 10b was performed in the following manner. Specifically, a step of applying a load of about 1 kg to a tip end (having the size of 0.5 mm×1 mm) of a molybdenum (Mo) electrode as the electrode for welding, and welding with a current of 0.5 kA, voltage of 1.1 V for a conduction time of 1/60 sec. was repeated for 15 cycles, as one welding operation, and for each connection between the wiring member and each electrode, five portions were welded.
Thereafter, as shown in
Then, characteristics of the solar cell string in accordance with Example 1 were evaluated by a solar simulator. The solar simulator refers to an irradiation light source used for conducting indoor characteristics test and reliability test of solar cells, and in accordance with the object of testing, irradiation intensity, uniformity and spectrum conformity are set to satisfy the requirements.
First, as a reference light source, reference sunlight having air mass (AM) of 0 was used. The current-voltage characteristic of the solar cell string in accordance with Example 1 irradiated with the reference sunlight was measured.
Based on the measured current-voltage characteristic, short-circuit current Isc, open circuit voltage Voc, fill factor FF and conversion efficiency Eff were calculated. As a result, short-circuit current Isc was 340 mA, open circuit voltage Voc was 4.8 V, fill factor FF was 0.82 and conversion efficiency Eff was 23.7%, and hence, it was confirmed that the solar cell string in accordance with Example 1 had satisfactory characteristics.
First, by epitaxially growing the following compound semiconductor layers on a p-type Ge substrate, a compound semiconductor stacked body 5 shown in the schematic cross-section of
Thereafter, on p-type AlGaAs layer 105, a p-type InGaP layer 106 having the thickness of 0.1 μm was formed as a back surface electric field layer, and on p-type InGaP layer 106, a p-type GaAs layer 107 having the thickness of 3 μm was formed as a base layer. Then, on p-type GaAs layer 107, an n-type GaAs layer 108 having the thickness of 0.1 μm was formed as an emitter layer, and on n-type GaAs layer 108, an n-type AlInP layer 109 having the thickness of 0.03 μm was formed as a window layer. Thereafter, on n-type AlInP layer 109, an n-type InGaP layer 110 having the thickens of 0.02 μm was formed, and on n-type InGaP layer 110, a p-type AlGaAs layer 111 having the thickness of 0.02 μm was formed. Here, n-type InGaP layer 110 and p-type AlGaAs layer 111 form a tunnel junction.
Then, on p-type AlGaAs layer 111, a p-type AlInP layer 112 having the thickness of 0.03 μm was formed as a back surface electric field layer, and on p-type AlInP layer 112, a p-type InGaP layer 113 having the thickness of 0.5 μm was formed as a base layer. Then, on p-type InGaP layer 113, an n-type InGaP layer 114 having the thickness of 0.05 μm was formed as an emitter layer, and on n-type InGaP layer 114, an n-type AlInP layer 115 was formed as a window layer. Thereafter, on n-type AlInP layer 115, an n-type GaAs layer 116 having the thickness of 0.5 μm was formed as the cap layer. In this manner, the compound semiconductor stacked body 5 shown in the schematic cross-section of
As the condition for epitaxial growth described above, the temperature was set to about 700° C. Further, as materials for growing the GaAs layers, TMG and AsH3 were used. As materials for growing the InGaP layers, TMI, TMG and PH3 were used. As materials for growing the AlInP layers, TMA, TMI and PH3 were used.
As an impurity material for forming each of the n-type GaAs layer, n-type InGaP layer and n-type AlInP layer, SiH4 was used. As an impurity material for forming each of the p-type GaAs layer, p-type InGaP layer and p-type AlInP layer, DEZn was used.
Further, as a material for growing the AlGaAs layer, TMA, TMG and AsH3 were used, and as an impurity material for forming the p-type AlGaAs layer, CBr4 was used.
Next, as shown in the schematic cross-section of
Next, as shown in the schematic cross-section of
Then, the p-type Ge substrate 101 having the diameter of 50 mm was cut into a plurality of rectangular plates having the width of 20 mm and the length of 20 mm, whereby a plurality of first compound semiconductor stacked bodies 5a were formed.
Thereafter, as shown in the schematic cross-section of
Thereafter, as shown in the schematic cross-section of
Thereafter, the surface of transparent protective member 121 was covered by a resist, and the thickness of p-type Ge substrate 101 was reduced by etching using a hydrofluoric acid-based etchant, to the thickness of 20 μm. Then, on the surface of p-type Ge substrate 101 thus made thin, an Au film having the thickness of 30 nm and an Ag film having the thickness of 3000 nm were successively vapor-deposited and thereafter heat-treated, so that the third electrode 8b shown in the schematic cross-section of
The characteristics of the solar cell in accordance with Example 2 were evaluated using the solar simulator, in the similar manner as Example 1. As a result, short-circuit current Isc was 17 mA, open circuit voltage Voc was 2.5 V, fill factor FF was 0.85 and conversion efficiency Eff was 26.3%. Therefore, it was confirmed that the solar cell in accordance with Example 2 had satisfactory characteristics.
First, on a p-type Ge substrate, the following compound semiconductor single crystal layers were epitaxially grown successively, to form compound semiconductor stacked body 5 shown in the schematic cross-section of
Thereafter, on p-type AlGaAs layer 128, a p-type AlInP layer 129 having the thickness of 0.03 μm was formed as a back surface electric field layer, and on p-type AlInP layer 129, a p-type InGaP layer 130 having the thickness of 0.5 μm was formed as a base layer. Then, on p-type InGaP layer 130, an n-type InGaP layer 131 having the thickness of 0.05 μm was formed as an emitter layer, and on n-type InGaP layer 131, an n-type AlInP layer 132 having the thickness of 0.03 μm was formed as a window layer. Thereafter, on n-type AlInP layer 132, an n-type GaAs layer 133 having the thickness of 0.5 μm was formed as a cap layer. In this manner, compound semiconductor stacked body 5 shown in the schematic cross-section of
As the condition for epitaxial growth described above, the temperature was set to about 700° C. Further, as materials for growing the GaAs layers, TMG and AsH3 were used. As materials for growing the InGaP layers, TMI, TMG and PH3 were used. As materials for growing the AlInP layers, TMA, TMI and PH3 were used.
As an impurity material for forming each of the n-type GaAs layer, n-type InGaP layer and n-type AlInP layer, SiH4 was used. As an impurity material for forming each of the p-type GaAs layer, p-type InGaP layer and p-type AlInP layer, DEZn was used.
Further, as a material for growing the AlGaAs layer, TMA, TMG and AsH3 were used, and as an impurity material for forming the p-type AlGaAs layer, CBr4 was used.
Next, as shown in the schematic cross-section of
Then, as shown in the schematic cross-section of
Thereafter, p-type Ge substrate 125 having the diameter of 50 mm was cut into a plurality of rectangular plates having the width of 20 mm and the length of 20 mm, whereby a plurality of first compound semiconductor stacked bodies 5a were formed.
Thereafter, as shown in the schematic cross-section of
Thereafter, as shown in the schematic cross-section of
Thereafter, the surface of transparent protective member 121 was covered by a resist, and p-type Ge substrate 125 and p-type GaAs layer 126 were removed by etching using a hydrofluoric acid-based etchant, and etching was stopped when the surface of p-type InGaP layer 127 was exposed, as shown in the schematic cross-section of
Then, as shown in the schematic cross-section of
Further, as shown in the schematic cross-section of
The characteristics of the solar cell in accordance with Example 3 were evaluated using the solar simulator, in the similar manner as Example 1. As a result, short-circuit current Isc was 21 mA, open circuit voltage Voc was 2.1 V, fill factor FF was 0.85 and conversion efficiency Eff was 27.2%. Therefore, it was confirmed that the solar cell in accordance with Example 3 had satisfactory characteristics.
First, as shown in the schematic cross-section of
Thereafter, on n-type AlInP layer 409, an n-type InGaP layer 410 having the thickness of 0.02 μm, a p-type AlGaAs layer 411 having the thickness of 0.02 μm, and a p-type AlInP layer 412 having the thickness of 0.03 μm as a back surface electric field layer were formed, and a p-type InGaP layer 413 having the thickness of 0.5 μm as a base layer, an n-type InGaP layer 414 having the thickness of 0.05 μm as an emitter layer, an n-type AlInP layer 415 having the thickness of 0.03 μm as a window layer and an n-type GaAs layer 416 having the thickness of 0.5 μm as a cap layer were epitaxially grown successively. Consequently, compound semiconductor stacked body 5 was formed. Here, n-type InGaP layer 410 and p-type AlGaAs layer 411 form a tunnel junction. Further, p-type InGaP layer 413 and n-type InGaP layer 414 in contact with each other function as a photo-electric conversion layer.
As the condition for epitaxial growth described above, the temperature was set to about 700° C. Further, as materials for growing the GaAs layers, TMG and AsH3 were used. As materials for growing the InGaP layers, TMI, TMG and PH3 were used. As materials for growing the AlInP layers, TMA, TMI and PH3 were used.
As an impurity material for forming each of the n-type GaAs layer, n-type InGaP layer and n-type AlInP layer, SiH4 was used. As an impurity material for forming each of the p-type GaAs layer, p-type InGaP layer and p-type AlInP layer, DEZn was used.
Further, as a material for growing the AlGaAs layer, TMA, TMG and AsH3 were used, and as an impurity material for forming the p-type. AlGaAs layer, CBr4 was used.
Next, a resist was applied to the entire surface of n-type GaAs layer 416, photolithography was performed to leave a part of the resist, and n-type GaAs layer 416 at portions where the resist was not left was removed to a prescribed pattern by using an ammonia-based etchant, as shown in the schematic cross-section of
Next, a resist was again applied to the entire surfaces of n-type GaAs layer 416 and n-type AlInP layer 415, and the resist corresponding to portions of removal of compound semiconductor stacked body 5 was removed.
Thereafter, as shown in the schematic cross-section of
Then, as shown in the schematic cross-section of
Thereafter, by the lift-off method, a part of the surface electrode layer 8 formed on resist pattern 417 was removed together with resist 417, and thereafter, heat treatment was performed. Consequently, the first and second electrodes 8a and 6a shown in the schematic cross-section of
Thereafter, as shown in the schematic cross-section of
Then, as shown in the schematic cross-section of
Thereafter, the surface of transparent protective member 121 was covered by a resist, and n-type GaAs substrate 401 and n-type GaAs layer 402 were removed by an ammonia-based etchant. Then, on the exposed surface of n-type InGaP layer 403, an Au film having the thickness of 30 nm and an Ag film having the thickness of 3000 nm were vapor-deposited successively and then heat-treated, to form the third electrode 8b on the entire exposed surface of n-type InGaP layer 403, whereby the solar cell of Example 4 shown in the schematic cross-section of
The characteristics of solar cell of Example 4 were evaluated by a solar simulator under the same condition as Example 1 except that air mass (AM) was set to 1.5. As a result, short-circuit current Isc was 39 mA, open circuit voltage Voc was 2.47 V, fill factor FF was 0.83 and conversion efficiency Eff was 20%. Therefore, it was confirmed that the solar cell in accordance with Example 4 had satisfactory characteristics. Further, in manufacturing the solar cell of Example 4, the first and second electrodes 8a and 6a could be formed simultaneously, and therefore, the steps of forming the electrodes could be simplified.
Although the present invention has been described and illustrated in detail, it is clearly understood that the same is by way of illustration and example only and is not to be taken by way of limitation, the spirit and scope of the present invention being limited only by the terms of the appended claims.
Number | Date | Country | Kind |
---|---|---|---|
2005-039555 (P) | Feb 2005 | JP | national |
2005-168124 (P) | Jun 2005 | JP | national |
2005-332580 (P) | Nov 2005 | JP | national |