Claims
- 1. A solid state light emitting device comprising on a semiconductor substrate, a light emitting portion which emits light by injection of a carrier, wherein
- said substrate has a stripe-shaped mesa part defined by a surrounding epitaxial layer of higher resistivity isolating regions which layer has a low impurity concentration, the top surfaces of said mesa part and the surrounding higher resistivity isolating regions being level with respect to each other thereby forming a flat surface,
- said light-emitting portion comprising at least two epitaxial growth regions of semiconductor crystal each of different conductivity types, said epitaxial growth regions including, in combination, a light-emitting active region therein, a neighboring region which is disposed contiguous to said light-emitting active region with a p-n junction inbetween, said epitaxial growth regions being formed upon said flat surface to cover said mesa part and said higher resistivity isolating regions,
- an overlying semiconductor layer formed on said light-emitting portion having a p-n junction inbetween, said overlying semiconductor layer having a stripe-shaped opening therein which opening is in alignment with the underlying mesa part, and
- a metal electrode formed in said stripe shaped opening.
- 2. The device according to claim 1 wherein said higher resistivity semiconductor isolating regions are of a III-V compound.
- 3. The device according to claim 1 wherein said higher resistivity semiconductor regions are of GaAs or GaAlAs.
- 4. The device according to claim 1 wherein said light-emitting portion comprises a heterostructure.
- 5. The device according to claim 4 wherein said heterostructure comprises GaAs-GaAlAs junction.
- 6. The device according to claim 1 wherein said light-emitting portion comprises a double hetero-structure of GaAlAs-GaAs-GaAlAs and said overlying layer forms semiconductor isolation regions of GaAlAs, said isolation regions being formed by epitaxial growth on said light- emitting portion in a manner such that said isolation regions are disposed above and in the geometry corresponding to said higher resistivity semiconductor isolating regions.
- 7. A solid state light-emitting device comprising:
- a semiconductor substrate;
- a mesa region formed of said substrate, said mesa region having a stripe-shaped configuration;
- surrounding epitaxial layer regions of GaAlAs which surrounds said mesa and has a lower impurity concentration and higher resistivity than said semiconductor substrate, the top faces of the surrounding higher resistivity isolating regions and the top face of the mesa region being of the same level thereby defining a flat surface,
- a light-emitting portion formed with a plurality of layers which are formed sequentially as epitaxial layers upon said flat surface, said light-emitting region comprising the sequential layers of:
- (i) an n-type GaAlAs layer,
- (ii) a p-type GaAs active layer,
- (iii) a p-type GaAlAs layer, and
- (iv) a p.sup.+ -type GaAs layer,
- thereby forming a light-emitting double heterostructure of GaAlAs-GaAs-GaAlAs on said flat surface,
- an overlying n-type GaAlAs layer on said p.sup.+ -type GaAs layer, said overlying n-type GaAlAs layer having a stripe shaped opening which is in alignment with the underlying mesa part; and
- a vapor deposited stripe-type metal electrode formed on the top surface of said light-emitting portion exposed in said opening.
- 8. The semiconductor light-emitting device according to claim 7 wherein said surrounding epitaxial layer is Ga.sub.1-x Al.sub.x As wherein .ltoreq.x.ltoreq.1.
- 9. A solid state light-emitting device comprising the following sequential elements, one upon the other, of:
- a first metal electrode;
- a substrate of GaAs having a central mesa region of striped geometry;
- a layer of Ga.sub.1-x Al.sub.x As, where 0.ltoreq.X.ltoreq.1, surrounding said mesa region and having a resistivity higher than and flush with the top surface of said mesa region;
- a layer of n-type Ga.sub.0.7 Al.sub.0.3 As;
- a layer of p-type GaAs;
- a layer of p-type Ga.sub.0.7 Al.sub.0.3 As;
- a layer of p.sup.+ -type GaAs;
- a layer of n-type Ga.sub.1-y Al.sub.y As, where 0<y.ltoreq.1, having an opening therein corresponding to and in alignment with said mesa region;
- a second metal electrode contacting said p.sup.+ -type GaAs layer through said opening in said n-type layer, said second metal electrode forming an electrode contact layer on said p.sup.+ -type layer,
- whereby a lasing current is supplied from said second metal electrode through the intermediate layers to said first metal electrode, the path of said lasing current being defined by said opening and said mesa region.
- 10. The semiconductor light-emitting device of claim 9 wherein said layer of Ga.sub.1-x Al.sub.x As is epitaxially deposited on said substrate and around said mesa region by thermal decomposition of trimethylgallium and arsine.
- 11. The semiconductor light-emitting device of claim 10 wherein said layer of Ga.sub.1-x Al.sub.x As has a resistivity of 10.sup.4 ohms.
Priority Claims (1)
Number |
Date |
Country |
Kind |
50-75902 |
Jun 1975 |
JPX |
|
Parent Case Info
This is a continuation of application Ser. No. 693,471 filed June 7, 1976, now abandoned.
US Referenced Citations (3)
Number |
Name |
Date |
Kind |
3697336 |
Lamorte |
Oct 1972 |
|
3849790 |
Gottsmann et al. |
Nov 1974 |
|
3984262 |
Burnham et al. |
Oct 1976 |
|
Non-Patent Literature Citations (2)
Entry |
Tsukada, "GaAs-Ga.sub.1-x Al.sub.x As Buried-Heterostructure Injection Lasers," J. of Applied Physics, vol. 45, No. 11, Nov. 1974, pp. 4899-4906. |
Teramoto, "New Structures Boost Semiconductor Laser Performance--At Last A Practical Room-Temp. Visible Laser," JEE Mar. 1975, pp. 32-37. |
Continuations (1)
|
Number |
Date |
Country |
Parent |
693471 |
Jun 1976 |
|