Patent Application
20070288109
These and other details of my invention will be described in connection with the accompanying drawings, which are furnished only by way of illustration and not in limitation of the invention, and in which drawings:
In
Processing of sound selection and playback is distributed between the PIC processor and the sound processor to distribute the resources between the two processors; a unique sound and control protocol between the two processors is used for communication to synchronize sound playback and control events.
The Opto-coupler (“OP1”) shuts down a power amp (“IC4”) to preserve power to allow main processing to remain operational in both the PIC processor and the sound processor and to resume sound generation after brief power interruptions to prevent kick-back that could create a malfunction of standard reversing electronics in locomotives.
The PIC processor measures track voltage with the “A/D filter” circuit to sequence the various rpm levels in a conventional mode, as shown in
The PIC processor measures positive DC offset length with the “Offset Detector” circuit caused by user horn button activation length to repetitively play a s sound file to provide a horn or whistle of variable length by repeatedly issuing play commands to the sound processor while the positive DC offset is present.
The PIC processor measures a negative DC offset length with the “Offset Detector” circuit caused by user bell button activation length to measure the bell button release and select a sound based on the bell button activation length.
The PIC processor measures the same bell button activation length to activate a bell by normal bell button usage, which is less then 2 seconds.
The PIC processor calibrates a DC offset detector at power on one time to allow for variations of PIC processor production variables and component variables and places the calibration in non-volatile storage for subsequent operation.
The sound processor dynamically allocates voice channels to play as many concurrent sounds as possible in two channels to allow realistic sounds. If the rpm levels are on sound channel 2, and the bell is on sound channel 1, playing the horn would stop the bell, and blow the horn. If the rpm levels were silenced, the bell would be moved to sound channel 2, thus playing the horn on sound channel 1 would be concurrent.
The PIC processor adjusts the volume of each sound and stores the adjustment in a non-volatile storage in the PIC processor to tailor each sound to a pleasing volume. This volume setting is set on the sound processor at power on by the PIC processor.
In use, the sound producing method for model trains comprises using the PIC processor to control the electronic sound chip for storing digitized sounds, the sound chip containing a sound processor for producing sound from at least one of the voice channels in the sound chip, the PIC processor using an internal comparator used as a voltage controlled oscillator present in the PIC processor, the comparator detecting variable DC offset frequencies input by a user and thereby activating one of the voice channels of sound in the sound chip, in which the PIC processor self-calibrates on an initial power on, as indicated in
The first time the power is applied to the system, the PIC processor looks for a calibration value. If not present, the system delays for 3 seconds for the comparator, operating as a voltage controlled oscillator, to stabilize. Then the base frequency of this oscillation is measured and locked in non-volatile storage. This calibration is done at the factory test, and there is no DC offset present during the calibration sequence. The calibration sequence is capable of locking onto the base frequency within ±5 us of the nominal 1250 us rate. Once this calibration is completed, subsequent power up sequences proceed directly to operating mode. Normal operating mode is entered at “B”, which involves looking for serial data present on the PIC “RS Data” line. If this serial data is present, the operation continues on
This command monitor loop waits for a data byte to be received, and then this data byte is compared to the supported sounds. If the data byte matches a supported sound, the appropriate sequence is sent to the sound processor, which plays the corresponding sound. If the data byte matches a supported command, the appropriate sequence is sent to the sound processor, which configures the sound processor operation. Only a representative decode is depicted in
Only a few high level functions are maintained in a monitor loop. These consist of a comparator frequency measurement for the DC offset (if present), and an analog to digital (A/D) measurement of the track voltage. This loop runs at the nominal frequency of the comparator oscillation, which ranges from 1150 us to 1350 us. The loop is paced by the rising edge of the comparator oscillation cycle. Once the rising edge is found the time to the falling edge is measured. The measurement is in 5 us. increments, and this measured value is compared to the nominal no offset value locked in the non-volatile storage from the calibration sequence. When this measured value is 80 us less then the calibration value, there is a negative DC offset present. A positive DC offset is detected when the measured value is 120 us more than the calibration value. The number of times the monitor loop has found this DC offset to exist is a measurement of the time that the offset existed. This time is important for filtering noise pulses, and selecting the commanded sound to play. Once the determination of the sound is made, the appropriate command is sent to the sound processor, which plays the corresponding sound.
The other task in the conventional mode monitor loop is to read the track voltage by using the built-in A/D converter. This reading is average filtered to prevent “hunting” at thresholds that the RPM levels are adjusted. The voltage thresholds are easily changed in the PIC processor firmware with an in-circuit programmer, and are initially set to sequence the RPM levels about every 2 volts of track voltage change. When the track voltage increases, the next higher RPM level is commanded to the sound processor; likewise when the track voltage decreases, the next lower RPM level is commanded to the sound processor. The RPM levels are adjusted on the lower track voltages, reaching max revs at about ⅔ of the AC maximum; this is done as the model train is typically operated between 8 and 12 volts AC.
It is important to note that additionally this chip also contains the digitized sounds to be played, which are encoded from industry standard “.wav” files and digitized when the sound chip is programmed. These encoded sounds are changed as needed, and programmed into the sound chip on demand. Since this sound chip is socketed, new sounds are made available to the user simply by changing this chip on the Sound Commander product.
The monitor loop checks the ports for a strobe to signify a command is present. This command could be a sound, such as a horn blast, or a command, such as setting a volume of a voice channel. The strobe for a sound to play, in comparison to a command to execute, is on a different I/O pin; so this is easily determined. After the strobe is detected, the 4-bit value is read in from the data port (port 1). This value is used to determine the course of action needed. If a sound command is requested, the voice channels are checked for idle, and once an idle channel is located, the digitized sound is played. If a command, the appropriate control register of the sound processor is modified.
The sound processor is very limited in processing capability. Unique to the Sound Commander, the sound processor firmware is able to queue up to 2 sounds before “stalling”. When the sound processor stalls, the sound processor cannot read the information on the ports, which is where the commands are present to direct the operation of the sound processor. As this condition would create a loss of control it is not acceptable, so the sound processor must not “stall”. When a digitized sound is played, the digitized sound data contains a “marker”, this marker is used to prevent a second play command from being sent to the sound chip playback engine—which if sent would cause a “stall”. If the marker is not detected, the play command is queued, not played.
The “marker” present in the digitized sound data is created when the sounds are prepared for use in the sound chip. This marker is found by trial and error, and is set to a sample number that causes the sound processor to stall, and backing off the marker by 100 samples. Sound set preparation is only done each time a new sound set released.
On a “Steam sounds set”, there is a “chuff” sound requirement. This sound must be triggered by rotation of the locomotive wheels. An external switch is used for this, and is connected to a port pin for detection. In the monitor loop, when the switch closure is detected, a “chuff” sound is played.
IC1 is a switching power supply. This part and associated parts provide for a regulated 5 v power supply. The entire sound system runs on this 5 v power supply. The schematic for the power supply is per the recommended design on the IC1 data sheet.
Components C1, D11, D10, R10, C2, and D12 form a voltage doubler for supplying a useable voltage at low track conditions. Without this doubler, the sound card would not operate at low voltages on the track, especially when DC offsets are being created. Lowering the positive_of the AC supply can generate these offsets; and without the doubler the sound card would not have enough positive voltage to regulate to 5 v. The minimum voltage is 7.5 v on the input of IC1. R10/D12 form a transient voltage suppressor, as the input of the IC1 is limited to 60 v DC.
The input voltage on the input of IC1 can be derived thusly: Typically trains run on a max of 18-20 v AC. The peak voltage is determined by 20*1.414=28.28 v. This is doubled and you arrive at 56.56 v DC max into the input of IC1. As the doubler is not 100% efficient, typically the voltage does not exceed 50 v at the input of IC1.
The processor, IC2 is the supervisory component on the system. The serial data present on pin 2 (“RS Data”) is used to determine what sound is activated in command mode. Command mode is determined by the presence of this serial signal. When absent, the system enters into conventional mode, utilizing the DC offsets to activate sounds. These modes are mutually exclusive.
The conventional mode adds complexity to the design, and requires a DC offset detector and track voltage detector. This DC offset detector is used to activate the selected sound, and the voltage detector is used to “ramp” the motor rev sounds as the loco responds to the voltage that determines the speed it moves on the track.
The Offset detector is comprised of hardware and software. R11, C10, R12, C11 form a 2 stage integrator. This converts any DC offset in the AC waveform to a smooth value that may be used to adjust a VCO (voltage controlled oscillator), comprised of IC2 and R23, R24, and C21. The base frequency is controlled by C21, and is selected to be about 800 Hz. In reality it seems the variations of the PIC comparator allow this frequency to vary from 700 Hz to 900 Hz. At first power up, the VCO is measured and an internal reference is stored in the non-volatile ram in the PIC for detection on subsequent operations.
Pin 13 of the PIC is the voltage threshold point at which the VCO can switch state from hi to low and back, thus oscillating. Note the voltage is at zero volts at R12/C11 junction with zero DC offset; R21 and R22 were selected to set the VCO to a 50% duty cycle.
With a positive or negative “influence” at R12/C11, the VCO will change the duty cycle, which is compared to the calibration value. This delta will be detected by IC2 firmware, and then an appropriate sound may be activated.
Pin 3 of IC2 is an A/D input. This analog to digital conversion is allows track voltage measurement. The voltage is peak detected, filtered, and scaled between 0 v to 5 v for the input of IC2 representing the track voltages for model train operation. This is done with D14, R13, C12, R14, C13, and R15. The A/D input on IC2 pin 3 will measure 0 v to 5 v based on a track of 0 v to 15 v, all higher voltages will be clamped by the input protection of IC2 pin3. Mapping voltage to rev rpm levels is not an exact science, and is not linear in response. Thus the intent is to step through 4 rev rpm levels from 7 v to 15 v, or about every 2 v of track voltage change. The thresholds have hysteresis and in firmware to prevent hunting near rpm rev change set points.
IC3 is the sound processor, and can digitize and store 2 channels (voices) of sound data. Software provided by the chip manufacturer converts industry standard “.wav” files into sound data which can be “played” by the sound chip. The firmware, unique to this design, operating on this component sequences the sounds. For example, when the horn is blown, the firmware plays an attack sound, a sustain sound, and then the decay sound. This type of control eliminates the IC2 processor from commanding each step of the sound playback. The sound processor is not very powerful, and will not respond to I/O pin control (commands) when playing.
Commands to IC3, are selected with a command set architected to activate sounds, and to set playback characteristics, such as volume settings.
Port 1 on IC3 (4 bits) is set as a data port, with 0-15 possible settings. Port 2 is the strobe select. When port 2, bit 0 is toggled, the request is a sound command, such as play the horn sound. When port 2, bit 1 is toggled, the request is a control command, like set the voice channel volume. Port 2, pin 2 and 3 allow for external sound requests, used for generating a chuff sound for a steam locomotive. See the following charts for the full command descriptions.
IC4 is a power amplifier. This part is configured to “sum” the 2 channels (voices) from the sound chip (IC3). The gains may be set by selection of R44, and currently this is about 3 times the input signal. Most importantly the “shutdown” pin in combination with OP1, R16, and C44, turn off the power amplifier soon as the power is removed. This “conserves” the charge in the voltage doubler, thus keeping IC1 from losing regulation. When IC1 does not lose regulation, the doubler circuit does not produce “kick-back”; eliminating the need for a battery in the system. Since the power is still active, the processor and sound chip still run, and retain state. Doing so does not drain the power supply quickly, and they can be left running, as the real power draw is in driving the speaker.
When power is restored, the sounds continue playing where they left off. This is great for the Bell, as typically in a switching yard, one would be interrupting the power to reverse the locomotive direction, and this is where the bell would be used. This gives a nice touch to the conventional operator (where track power is in constant flux), making the operation realistic.
In use, there are two modes of operation: “conventional mode” and “command mode”. The unique features of the Sound Commander of the present invention that set it apart from current market products are as follows.
Regarding conventional mode features and operations, the Sound Commander of the present invention uses a special circuit to shut down the current draw of the power amplifier so the power supply can hold regulation for a long enough period of time (8-12 seconds) to prevent “kick-back” in this critical time.
The Sound Commander of the present invention has a very unique way to detect the positive and negative offsets. Internally to the selected PIC microprocessor a comparator is configured to oscillate. This comparator when configured as an oscillator is very non-deterministic relative to the frequency at which it will oscillate; additionally the manufacturing tolerances of the PIC add more variation. This frequency may be bounded by the use of external precision resistors and capacitors. The DC offset integrator comes into play to vary the frequency of this oscillator, forming a voltage-controlled oscillator. The uniqueness of the Sound Commander of the present invention system is such that it self calibrates on the initial power on at factory test, and thus the base frequency is measured and locked internally in non-volatile storage for later comparison against offset frequencies produced by the offset voltage to frequency conversion.
The Sound Commander of the present invention only detects a full 3 v to 5 v DC offset voltage, thus ignoring the fast pulses. The Sound Commander of the present invention can select additional sounds beyond horn and bell. This way this is done is during the noise filtering, a counter is maintained as to the length of the DC offset present. Below a certain count, the offset is dismissed as noise. Once the counter is over a critical count, which represents time the offset is present, to be considered a valid signal, the horn or bell is activated. This counter can also be leveraged to represent how long the horn (positive offset) or bell (negative offset) was presented as valid. If the valid time exceeds a certain point, the sound may be re-triggered or an optional sound may be activated.
The horn (positive offset) is used to repeat the horn sound; thus the horn can last longer in response to the operator request.
The bell (negative offset) is used to operate additional sounds by checking the counter when the offset is removed. This is a key point to selection of different sounds. While current products sounds in prior art devices are triggered by creation of the offset, the Sound Commander of the present invention negative detector activates the sound on removal of the offset. Thus the time of the press may be measured. To be effective the timing is measured in seconds, and has a practical limit of one, possibly 2 alternate sounds; it is sufficient to provide additional sound selections. For example: when the Bell (negative offset) is 2 seconds or less, the Bell operates. When the offset lasts greater than 2 seconds but less than 3 seconds, the first alternate sound operates. When the offset lasts greater than 3 seconds, the second alternate sound operates. This take a bit of getting used to by the operator, but is a learned behavior to release the button to hear the bell (or alternate sound).
Command mode operation in the Sound Commander of the present invention may be initiated in two ways. The first is to simply trigger sounds, one per I/O pin state change. This is a match up to the NMRA DCC decoders. These Decoders change an I/O pin state based on the sound they wish to activate. These outputs are tied into the input pins of the Sound Commander of the present invention and are used to activate the requested sound. In the AC train market, the sound control data is provided in serial format per the Lionel TMCC specification. This serial data is used to activate the particular sound based on the 8-bit data byte value. Since volume related commands are part of the data packet, this affords a bit more creativity to the system behavior. The ability to lower the volume on the individual sounds opens an opportunity to optimize the sound generation. The Sound Commander of the present invention delivers the motor rev sounds on one channel, and either horn or bell on the second channel so that the horn and bell are mutually exclusive.
The Sound Commander of the present invention employs “Dynamic Sound Mapping™”; this feature moves the sounds between channels dynamically based on volume settings. If the motor rev sounds are lowered to non-audible levels, the bell is dynamically moved to the audio channel the motor rev sounds were on. This mode of operation is a desirable characteristic, as many operators grow tired of the motor rev sounds constantly playing. Thus moving the horn and bell on separate channels when the motor revs are not active allows both the horn and bell to play concurrently.
It is understood that the preceding description is given merely by way of illustration and not in limitation of the invention and that various modifications may be made thereto without departing from the spirit of the invention as claimed.
