Speckle patterns are spatial patterns which result from interferences of waves of the same frequency but different amplitudes and phases. Due to constructive interference creating brighter spots and destructive interference creating darker spots, the resultant wave would vary in intensity. This effect can be achieved in practice by aiming a light at an uneven surface. This would create scattered lights that can then be collected to create optical speckle patterns via interferences.
This property is one of the discoveries that has been made with laser technology. Originally, the fact that lasers can produce speckle patterns when reflected off an uneven surface is considered to be a flaw. The variable resulting patterns was thought of as noise. Later however, it came to be realized that these variations actually meant that speckle images carry information concerning the surface that produced them. This has led to the development of image invariant speckle pattern capturing technology as a means of imagining a particular surface and its features. An advantage of speckle pattern based comparison technologies is that it can perform localizing and image shift calculations to a precision of one micrometer or even less. These properties allow speckle pattern technology to be used for precision control and movement sensing applications
A typical device making use of the speckle pattern technology is shown in
This invention relates to an electronic circuit design capable of performing high-speed measurements of image shift of image-invariant speckle patterns, and output the results using I2C or A/B phase serial signals, providing a method for high precision control applications. The design consists of a high speed image detector, an image capture unit, an image matcher. By working in parallel, the design can supply outputs to the I2C or A/B phase signals at very high frame rates.
The first objective of this invention is to provide an image detection circuit capable of high speed spectral imaging. The second objective of this invention is a circuit for high speed image matching and image shift calculations. The third objective is to provide an I2C and AB serial output to transmit the image shift value to a backend MCU.
The image detection circuitry (as shown in
The large number of optical diodes to be read poses an obstacle to high speed image detection. In order to achieve higher speed, therefore, the optical array is arranged as M number of sub-arrays of diodes, placed in parallel. Each sub-array then cycles through its set of diodes for exposure independently, thus achieving an overall speed increase over sequential exposures by a factor of M times. Within each optical sub-array, each diode is exposed, integrated, and sampled in a pace controlled by the clock generator and as a pipeline. The sampled voltages are then converted into 8 bit, 256-level grey-scale digital values. Since the analogue to digital converter operates at a much faster speed than diode exposures are capable of, a multiplexer is deployed to maximize the efficiency. The multiplexer sequentially selects each of the M sets of sampled voltages to be converted into 8 bit digital grey scales. Each of the 256 levels of grey scale values can thus represent a single pixel. There are a total of M*L pixels within a complete image.
The high speed image matching and image shift calculations circuit compares consecutive images by calculating how much distance the second image have moved relative to its preceding one. This is achieved by using an image duplicator (31), a central image memory (32), an image matching circuit (34), a image shift accumulator (35), and a clock signal generator (33). Since the image detector needs to be capable of high speed capturing, this means that the grey-scale image memory's contents are also refreshed within a corresponding time period. For example, a 5000 frames per second image detector would refresh the memory every 0.2 ms. The system thus imposes the same timing constraint on the image matching and image shift calculating operations.
The calculation process is outlined in
To determine the image shift, therefore, the image matcher compares the sum of absolute differences between the ROI pixels, and the pixels at each of the possible new positions. This is repeated until the image with the highest similarity, SADmax, is found at the coordinate (Xmax, Ymax). If SADmax exceeds the threshold value, then the image at (Xmax, Ymax) is considered to be a successful match and designated as the new ROI. The image shift calculator can thus determine the image shift between the current image of speckle pattern and the previous one. The shift is accumulated in registers for serial output.
Lastly, the design includes circuitry for providing I2C and AB serial output (
In this implementation, the optical device (12) is setup as shown in
When a user scrolls over the contact surface (10) or moves the scrollable optical device (12), the action causes the contact surface to exhibit movement in the perspective of the optical device. As this occurs, the device will detect and capture successive image-invariant spectral patterns, upon which image matching can then be performed. The resulting image shift values between successive speckle patterns constitute the device's serial output. This output can then be utilized by the microcontroller.
The high speed image detector (2) deploys the optical sensor as an array of 22*22 optical diodes (M=22, L=22). The integrator array (21) contains 22 integrators working in parallel, one for each of the sub-arrays of optical diodes. Accordingly the voltage sampler circuit (22) contains 22 sample-hold units arranged in parallel. These all feed into the multiplexer (23) which carries out 23-to-1 signal multiplexing for the analogue-to-digital converter (24). Because the ADC has a sample rate of 4 M samples/sec, far faster than the rest of the circuit, the multiplexer allows one ADC to efficiently service the whole circuit. To achieve higher than 5000 frames/sec operation speed, the optical diode arrays, integrator array, and voltage sampler array operate in a pipelined way.
Each speckle-pixel data is got from a optical diode with 7.6 um*7.6 um physical layout size, and the integrating time for each pixel is less than 200 us. Thus the high speed image detector is capable of attaining a sampling rate of 5000 frames per second, or more. Information of each of these pixels is stored as a 256-level grey-scale value, within a 22*22 byte grey-scale memory unit (26).
The image matching and image shift calculation unit (3) contains an image duplicator (31) in its circuitry. The implementation of the copier has it taking a 10*10 byte block from the centre of the current image of speckle pattern, which is stored as a 22*22 byte grey-scale memory unit. It then copies the block into the central image memory (32) as the new Region of Interest (ROI). A subsequent grey-scale image can then be matched to the ROI by the image matching circuit (34). Because the ROI originally appears in the centre position (Xo, Yo) of the previous grey-scale image, at the next frame, there is a total of (22−10+1)*(22−10+1)=169 new possible positions where the image may have moved to.
To determine the image shift, image matcher uses the sum of absolute differences (SAD) method between the pixels to calculate the difference between each of these new possible positions and the original image. If the maximum value, SADmax, of these similarity matches exceeds the preset threshold value, then the pattern with SADmax similarity is considered a successful match to the ROI. Based on the coordinate (Xmax, Ymax) at which the desired pattern locates, the shifted distance from its previous position (Xmax-Xo, Ymax-Yo) is accumulated (35). At this point the process repeats, using the new ROI to search for a match in the next image again.
In this implementation, the serial signal generator (4) outputs the accumulated image shift values via two methods. The first is the synchronous A/B phase signals. This can output the image shift values at rates corresponding to the speed of the speckle image input, for instance, 200 us for 5000 frames/sec at the image detector. This is the suitable option for applications where synchronized updates is desired. The alternative is for the circuit to output its results using I2C signals. This provides an alternative for applications which only seek to read image shift values with asynchronous way.