The present application relates to the field of electronics, and more particularly, to methods of forming electronic component packages and related structures.
A Micro Electro Mechanical Systems (MEMS) package typically includes a MEMS sensor die, sometimes called a MEMS electronic component. As the MEMS sensor die receives external excitations such as sound waves, pneumatic pressure, or inertial force, the variations in the excitation signals are converted to electrical signals.
The MEMS sensor die is typically packaged along with an Application Specific Integrated Circuit (ASIC) into a MEMS package. The ASIC converts the signals(s) from the MEMS sensor die as required for the particular application. As the ASIC is mounted to the substrate along with the MEMS sensor die in a side by side arrangement, the resultant MEMS package is relatively large.
In the following description, the same or similar elements are labeled with the same or similar reference numbers.
As an overview and in accordance with one embodiment, referring to
By staggering MEMS electronic component 104 directly on converter electronic component 106 instead of locating MEMS electronic component 104 in a side by side arrangement with converter electronic component 106, the total package width of staggered die MEMS package 100 is minimized. Stated another way, staggered die MEMS package 100 has a minimum footprint.
Further, by locating converter electronic component 106 within converter cavity 122 and staggering MEMS electronic component 104 directly on converter electronic component 106, the total package height, sometimes called Z-height, of staggered die MEMS package 100 is minimized.
Now in more detail,
Substrate 102 includes a dielectric material such as laminate, ceramic, printed circuit board material, or other dielectric material. Formed on an upper, e.g., first, surface 102U of substrate 102 are electrically conductive upper, e.g., first, terminals 110, e.g., formed of copper. Substrate 102 further includes a lower, e.g., second, surface 102L.
Substrate 102 further includes upper, e.g., first, traces 112 formed at upper surface 102U and lower, e.g., second, traces 114 formed at lower surface 102L. Lower traces 114 are electrically connected to upper traces 112 by electrically conductive vias 116 extending through substrate 102 between upper surface 102U and lower surface 102L.
Substrate 102 can further include an upper, e.g., first, solder mask at upper surface 102U that protects first portions of upper traces 112 while exposing second portions, e.g., terminals 110, of upper traces 112. Substrate 102 can further include a lower, e.g., second, solder mask at lower surface 102L that protects first portions of lower traces 114 while exposing second portions, e.g., lands 118, of lower traces 114.
In one embodiment, lands 118 are distributed in an array thus forming a Land Grid Array (LGA). Alternatively, interconnection balls, e.g., solder balls, are formed on lands 118 thus forming a Ball Grid Array (BGA).
Although a particular electrically conductive pathway is described above, other electrically conductive pathways can be formed. For example, contact metallizations can be formed between the various electrical conductors.
Further, instead of straight though vias 116, in one embodiment, substrate 102 is a multilayer substrate and a plurality of vias and/or internal traces form the electrical interconnection between upper traces 112 and lower traces 114.
Converter electronic component 106 is a conventional converter electronic component, sometimes called an Application Specific Integrated Circuit (ASIC) chip. Accordingly, the features and functions of converter electronic component 106 are well known to those of skill in the art. Thus, only a general description of various features and functions of converter electronic component 106 are set forth below. Generally, converter electronic component 106 converts the signals(s) from MEMS electronic component 104 as required for the particular application.
Converter electronic component 106 includes an active, e.g., first, surface 106U and an opposite inactive, e.g., second, surface 106L. Active surface 106U includes bond pads 120. Converter electronic component 106 further includes sides 106S extending perpendicularly between active surface 106U and inactive surface 106L. Although the terms parallel, perpendicular, and similar terms are used herein, it is to be understood that the described features may not be exactly parallel and perpendicular, but only substantially parallel and perpendicular to within accepted manufacturing tolerances.
To accommodate converter electronic component 106, substrate 102 is formed with a converter cavity 122 in upper surface 102U. Converter cavity 122 is defined by a converter cavity base 124 and converter cavity sidewalls 126. Substrate 102 is sometimes called a cavity laminate substrate.
Converter cavity base 124 is generally parallel to upper surface 102U of substrate 102. Converter cavity base 124 is between planes defined by lower surface 102L and upper surface 102U such that substrate 102 remains between converter cavity base 124 and lower surface 102L.
Converter cavity sidewalls 126 extend perpendicularly between converter cavity base 124 and upper surface 102U of substrate 102.
In accordance with this embodiment, converter electronic component 106 is mounted within converter cavity 122 in a wire bond configuration. More particularly, inactive surface 106L is mounted to converter cavity base 124, e.g., by an adhesive 128.
The depth of converter cavity 122, i.e., the height of converter cavity sidewalls 126, is equal to the thickness of converter electronic component 106 between active surface 106U and inactive surface 106L including adhesive 128 (the thickness of adhesive 128 is generally negligible). Accordingly, active surface 106U of converter electronic component 106 is parallel to and coplanar with upper surface 102U of substrate 102. Stated another way, converter electronic component 106 is embedded within substrate 102. Although various features may be described as being equal or coplanar, in light of this disclosure, those of skill in the art will understand that the features may not be exactly equal or coplanar but only substantially equal or coplanar to within accepted manufacturing tolerances.
Further, the width of converter cavity 122, i.e., the distance between opposite converter cavity sidewalls 126, is equal to or slightly greater than the width of converter electronic component 106, i.e., the distance between opposite sides 106S. Accordingly, converter cavity 122 is the same size or slightly greater than converter electronic component 106 allowing converter electronic component 106 to be mounted within converter cavity 122.
Bond pads 120 of converter electronic component 106 are electrically connected to respective terminals 110 with electrically conductive bond wires 130.
MEMS electronic component 104 is a conventional MEMS microphone electronic component, sometimes called a MEMS chip. Accordingly, the features and functions of MEMS electronic component 104 are well known to those of skill in the art. Thus, only a general description of various features and functions of MEMS electronic component 104 are set forth below. In this embodiment, MEMS electronic component 104 is an acoustical microphone.
MEMS electronic component 104 includes a lower, e.g., first, surface 104L and an opposite upper, e.g., second, surface 104U. MEMS electronic component 104 further includes sides 104S extending perpendicularly between upper surface 104U and lower surface 104L.
MEMS electronic component 104 further includes a moveable compliant diaphragm 132 and bond pads 134 formed at upper surface 104U. Bond pads 134 are electrically connected to respective terminals 110 with electrically conductive bond wires 136.
Optionally, one or more of bond pads 134 of MEMS electronic component 104 are electrically connected to respective one or more bond pads 120 of converter electronic component 106 with bond wires 136. Accordingly, bond pads 134 of MEMS electronic component 104 are electrically connected to respective terminals 110, to respective bond pads 120 of converter electronic component 106, or to both respective terminals 110 and respective bond pads 120 of converter electronic component 106.
MEMS electronic component 104 further includes a rigid perforated backplate 138 at lower surface 104L. MEMS electronic component 104 further includes an aperture 140 extending through MEMS electronic component 104 and between upper surface 104U and lower surface 104L. More particularly, aperture 140 extends between and separates diaphragm 132 and backplate 138 such that diaphragm 132 and backplate 138 form a capacitor.
As described further below, during operation, sound waves move diaphragm 132 thus causing changes in the capacitance between diaphragm 132 and backplate 138. An electrical signal corresponding to the capacitance variations is output on bond pads 134.
Substrate 102 further includes an optional bottom port 142. Bottom port 142 is an aperture, sometimes called opening or hole, extending through substrate 102 between lower surface 102L and upper surface 102U. Bottom port 142 is defined by a bottom port sidewall 144, e.g., a cylindrical sidewall, extending through substrate 102 between lower surface 102L and upper surface 102U. Bottom port 142 is located adjacent to converter cavity 122. By forming bottom port 142 in substrate 102, formation of a through hole in converter electronic component 106 is avoided.
MEMS electronic component 104 is mounted to both substrate 102 and converter electronic component 106 in a staggered die arrangement. More particularly, lower surface 104L of MEMS electronic component 104 is mounted to upper surface 102U of substrate 102 and active surface 106U of converter electronic component 106, e.g., with an adhesive 146.
By staggering MEMS electronic component 104 directly on converter electronic component 106 instead of locating MEMS electronic component 104 in a side by side arrangement with converter electronic component 106, the total package width of staggered die MEMS package 100 is minimized. Stated another way, staggered die MEMS package 100 has a minimum footprint. Further, by locating converter electronic component 106 within converter cavity 122 and staggering MEMS electronic component 104 directly on converter electronic component 106, the total package height, sometimes called Z-height, of staggered die MEMS package 100 is minimized.
MEMS electronic component 104 is mounted to substrate 102 above bottom port 142. More particularly, bottom port 142 is in fluid communication with aperture 140 of MEMS electronic component 104. Accordingly, during use, sound travels through bottom port 142 and aperture 140 and moves diaphragm 132. As described above, the motion of diaphragm 132 from the sound is converted into an electrical signal that is output on bond pads 134.
Lid 108 is mounted to upper surface 102U of substrate 102 with a lid adhesive 148. In one embodiment, lid 108 is or includes an electrically conductive material to provide Radio Frequency (RF) shielding or more generally to provide shielding from ElectroMagnetic Interference (EMI).
In accordance with this embodiment, lid adhesive 148 is electrically conductive, e.g., is an electrically conductive epoxy, solder, or other electrically conductive adhesive. Lid 108 is mounted to and electrically connected by lid adhesive 148 to terminals 110. In one embodiment, a reference voltage source, e.g., ground, is provided to terminals 110 and thus lid 108.
However, in another embodiment where EMI shielding is not required or desired, lid 150 and lid adhesive 148 are non-conductive and are not electrically connected to terminals 110 or to a reference voltage source such as vias 116 connected to ground.
Lid 108 further includes an optional top port 150. Top port 150 is an aperture, sometimes called opening or hole, extending through lid 108. More particularly, top port 150 is in fluid communication with a lid cavity 152 of lid 108 and thus diaphragm 132 of MEMS electronic component 104. Accordingly, during use, sound travels through top port 150 and lid cavity 152 and moves diaphragm 132. As described above, the motion of diaphragm 132 from the sound is converted into an electrical signal that is output on bond pads 134.
Although both a bottom port 142 and a top port 150 are described above, in another embodiment, staggered die MEMS package 100 includes either bottom port 142 or top port 150, but not both. Bottom port 142 and aperture 140 are acoustically sealed from top port 150 and lid cavity 152 across diaphragm 132.
Although MEMS electronic component 104 is described above as a MEMS microphone, in other embodiments, MEMS electronic component 104 is another type of MEMS device. For example, MEMS electronic component 104 is a pressure sensor or other MEMS electronic component where access to the ambient environment is required or desired.
In accordance with one embodiment, MEMS electronic component 104 is a pressure sensor. In accordance with this embodiment, staggered die MEMS package 100 includes: (1) bottom port 142; (2) top port 150; or (3) bottom port 142 and top port 150. For example, where differential pressure between bottom port 142 and top port 150 is to be measured by MEMS electronic component 104, staggered die MEMS package 100 includes both bottom port 142 and top port 150.
As set forth, lid 108 includes a lid cavity 152. More particularly, lid 108 includes a lid plate 154 having top port 150 formed therein, lid sidewalls 156 extending downwards from lid plate 154, and lid base 158 at the lower surfaces of sidewalls 156. Lid base 158 is mounted to substrate 102 and optionally, terminals 110, with lid adhesive 148.
Referring now
Illustratively, flip chip bumps 260, e.g., solder, copper, gold or other electrically conductive material, forms the physical and electrical interconnection between bond pads 120 of converter electronic component 106 and terminals 110. Optionally, an underfill is applied between converter electronic component 106 and converter cavity base 124.
The depth of converter cavity 122, i.e., the height of converter cavity sidewalls 126, is equal to the thickness of converter electronic component 106 between active surface 106U and inactive surface 106L and the height of flip chip bumps 260. Accordingly, inactive surface 106L of converter electronic component 106 is parallel to and coplanar with upper surface 102U of substrate 102.
Further, the width of converter cavity 122, i.e., the distance between opposite converter cavity sidewalls 126, is equal to or slightly greater than the width of converter electronic component 106, i.e., the distance between opposite sides 106S. Accordingly, converter cavity 122 is the same size or slightly greater than converter electronic component 106 allowing converter electronic component 106 to be mounted within converter cavity 122.
MEMS electronic component 104 is mounted to both substrate 102 and converter electronic component 106 in a staggered die arrangement. More particularly, lower surface 104L of MEMS electronic component 104 is mounted to upper surface 102U of substrate 102 and inactive surface 106L of converter electronic component 106, e.g., with adhesive 146.
Referring now to
Further, substrate 102 is formed without bottom port 142. Optionally, lid 108 is formed with top port 150.
However, in another embodiment where access to the ambient environment is not necessary or desired, lid 108 is formed without top port 150 such that lid cavity 152 is a sealed cavity that is sealed from the ambient environment. For example, MEMS electronic component 104 is an inertial sensor such as an accelerometer, a gyroscope, or other MEMS device that does not require access to the ambient environment for proper operation.
Referring now to
Further, substrate 102 is formed without bottom port 142. Optionally, lid 108 is formed with top port 150.
However, in another embodiment where access to the ambient environment is not necessary or desired, lid 108 is formed without top port 150 such that lid cavity 152 is a sealed cavity that is sealed from the ambient environment. For example, MEMS electronic component 104 is an inertial sensor such as an accelerometer, a gyroscope, or other MEMS device that does not require access to the ambient environment for proper operation.
In accordance with this embodiment, staggered die MEMS package 500 includes a flat lid 108A. Staggered die MEMS package 500 further includes a cavity substrate 102A similar to substrate 102 of MEMS packages 100, 200, 300, 400 as described above.
However, in accordance with this embodiment, cavity substrate 102A includes sidewalls 562 extending upwards from upper surface 102U of substrate 102A. Upper surface 102U and sidewalls 562 form a cup shaped enclosure defining a substrate cavity 564.
Sidewalls 562 extend upwards to and include a lid mounting surface 566, e.g., a rectangular annular surface. Flat lid 108A is mounted to lid mounting surface 566 by lid adhesive 148 thus sealing substrate cavity 564.
In one embodiment, flat lid 108A is or includes an electrically conductive material to provide RF shielding or more generally to provide shielding from EMI. In accordance with this embodiment, lid adhesive 148 is electrically conductive, e.g., is an electrically conductive epoxy, solder, or other electrically conductive adhesive. Flat lid 108A is mounted to and electrically connected by lid adhesive 148 to terminals 110 on lid mounting surfaces 566. In one embodiment, a reference voltage source, e.g., ground, is provided to terminals 110 and thus flat lid 108A.
However, in other embodiments, flat lid 108A and lid adhesive 148 are non-conductive and lid mounting surface 566 is formed without terminals 110.
Flat lid 108A further includes optional top port 150. More particularly, top port 150 is in fluid communication with substrate cavity 564 and thus diaphragm 132 of MEMS electronic component 104. Accordingly, during use, sound travels through top port 150 and substrate cavity 564 and moves diaphragm 132. As described above, the motion of diaphragm 132 from the sound is converted into an electrical signal that is output on bond pads 134.
Although staggered die MEMS package 500 of
In accordance with this embodiment, WLFO staggered die MEMS package 600 includes a dielectric package body 670 including an upper, e.g., first, surface 670U and an opposite lower, e.g., second, surface 670L. WLFO staggered die MEMS package 600 further includes one or more dielectric buildup layers 672, 674, and a buildup circuit pattern 676.
Upper surface 670U and lower surface 670L of package body 670 are parallel to and coplanar with inactive surface 106L and active surface 106U of converter electronic component 106, respectively.
Illustratively, converter electronic component 106 is mounted active surface 106U down to a carrier. Converter electronic component 106 (which may be one of a plurality of converter electronic components 106 mounted to the carrier) is then overmold in a dielectric material to form a reconstituted wafer, sometimes called a molded WLFO wafer. In one embodiment, the dielectric material is backgrinded to expose inactive surface 106L of converter electronic component 106 thus forming package body 670 contacting sides 106S of converter electronic component 106. The reconstituted wafer is removed from the carrier to expose active surface 106U including bond pads 120 of converter electronic component 106 and lower surface 670L of package body 670.
Buildup layer 672 is mounted to active surface 106U and lower surface 670L of package body 670. Via apertures are formed in buildup layer 672 and filled with an electrically conductive material to form electrically conductive vias 678 of buildup circuit pattern 676. Vias 678 are electrically connected to vias 680 extending through package body 670 and also to bond pads 120 of converter electronic component 106. Vias 680 extending through package body 670 may be formed at earlier or later stages during fabrication.
Traces 682 of buildup circuit pattern 676 are formed on or embedded within buildup layer 672 and are electrically connected to vias 678. In one embodiment, traces 682 and vias 678 are formed at the same time, e.g., in a plating operation.
Buildup layer 674 is formed on and covers buildup layer 672. Buildup layer 674 is also formed on and covers traces 682 except that buildup layer 674 has openings formed therein that expose lands 684 of traces 682. Although two buildup layers 672, 674 and a particular buildup circuit pattern 676 are illustrated and described above, in light of this disclosure, those of skill in the art will understand that more or less buildup layers, and different circuit patterns can be formed depending upon the particular application, e.g., depending upon the electrical redistribution desired.
Optionally, formed at or embedded within upper surface 670U of package body 670 are terminals 686. Terminals 686 are electrically connected to vias 680.
WLFO staggered die MEMS package 600 further includes an optional bottom port 142A. Bottom port 142A is an aperture, sometimes called opening or hole, extending through substrate 670 and buildup layers 672, 674. Bottom port 142A is defined by a bottom port sidewall 144A, e.g., a cylindrical sidewall, extending through substrate 670 and buildup layer 672, 674. Bottom port 142A is located adjacent to converter electronic component 106.
MEMS electronic component 104 is mounted to both package body 670 and converter electronic component 106 in a staggered die arrangement. More particularly, lower surface 104L of MEMS electronic component 104 is mounted to upper surface 670U of package body 670 and inactive surface 106L of converter electronic component 106, e.g., with adhesive 146.
MEMS electronic component 104 is mounted to substrate 670 above bottom port 142A. More particularly, bottom port 142A is in fluid communication with aperture 140 of MEMS electronic component 104. Accordingly, during use, sound travels through bottom port 142A and aperture 140 and moves diaphragm 132. As described above, the motion of diaphragm 132 from the sound is converted into an electrical signal that is output on bond pads 134.
Bond pads 134 are electrically connected to terminals 686 by bond wires 136. Terminals 686 are formed to facilitate electrically interconnection with bond wires 136. However, in another embodiment, terminals 686 are not formed and bond wires 136 are directly connected to vias 680.
Lid 108 is mounted to upper surface 670U of package body 670 with lid adhesive 148. Illustratively, lid 108 is mounted to and electrically connected by lid adhesive 148 to vias 680 (or terminals 686 connected to vias 680). In one embodiment, a reference voltage source, e.g., ground, is provided to terminals vias 680 and thus lid 108.
As set forth above, WLFO staggered die MEMS package 600 is formed without a substrate or use of a die attach process thus simplifying manufacturing as well as reducing cost while at the same time minimizing total package height and width.
Referring now to
Further, package body 670 is formed without bottom port 142A. Optionally, lid 108 is formed with top port 150.
However, in another embodiment where access to the ambient environment is not necessary or desired, lid 108 is formed without top port 150 such that lid cavity 152 is a sealed cavity that is sealed from the ambient environment. For example, MEMS electronic component 104 is an inertial sensor such as an accelerometer, a gyroscope, or other MEMS device that does not require access to the ambient environment for proper operation.
Although specific embodiments were described herein, the scope of the invention is not limited to those specific embodiments. Numerous variations, whether explicitly given in the specification or not, such as differences in structure, dimension, and use of material, are possible. The scope of the invention is at least as broad as given by the following claims.
Number | Name | Date | Kind |
---|---|---|---|
3868724 | Perrino | Feb 1975 | A |
3916434 | Garboushian | Oct 1975 | A |
4322778 | Barbour et al. | Mar 1982 | A |
4525817 | Takuya | Jun 1985 | A |
4532419 | Takeda | Jul 1985 | A |
4642160 | Burgess | Feb 1987 | A |
4645552 | Vitriol et al. | Feb 1987 | A |
4685033 | Inoue | Aug 1987 | A |
4706167 | Sullivan | Nov 1987 | A |
4716049 | Patraw | Dec 1987 | A |
4786952 | MacIver et al. | Nov 1988 | A |
4806188 | Rellick | Feb 1989 | A |
4811082 | Jacobs et al. | Mar 1989 | A |
4897338 | Spicciati et al. | Jan 1990 | A |
4905124 | Banjo et al. | Feb 1990 | A |
4964212 | Deroux-Dauphin et al. | Oct 1990 | A |
4974120 | Kodai et al. | Nov 1990 | A |
4996391 | Schmidt | Feb 1991 | A |
5021047 | Movern | Jun 1991 | A |
5072075 | Lee et al. | Dec 1991 | A |
5072520 | Nelson | Dec 1991 | A |
5081520 | Yoshii et al. | Jan 1992 | A |
5091769 | Eichelberger | Feb 1992 | A |
5108553 | Foster et al. | Apr 1992 | A |
5110664 | Nakanishi et al. | May 1992 | A |
5191174 | Chang et al. | Mar 1993 | A |
5229550 | Bindra et al. | Jul 1993 | A |
5239448 | Perkins et al. | Aug 1993 | A |
5247429 | Iwase et al. | Sep 1993 | A |
5250843 | Eichelberger | Oct 1993 | A |
5278726 | Bernardoni et al. | Jan 1994 | A |
5283459 | Hirano et al. | Feb 1994 | A |
5353498 | Fillion et al. | Oct 1994 | A |
5371654 | Beaman et al. | Dec 1994 | A |
5379191 | Carey et al. | Jan 1995 | A |
5404044 | Booth et al. | Apr 1995 | A |
5463253 | Waki et al. | Oct 1995 | A |
5474957 | Urushima | Dec 1995 | A |
5474958 | Djennas et al. | Dec 1995 | A |
5497033 | Fillion et al. | Mar 1996 | A |
5508938 | Wheeler | Apr 1996 | A |
5530288 | Stone | Jun 1996 | A |
5531020 | Durand et al. | Jul 1996 | A |
5546654 | Wojnarowski et al. | Aug 1996 | A |
5574309 | Papapietro et al. | Nov 1996 | A |
5581498 | Ludwig et al. | Dec 1996 | A |
5582858 | Adamopoulos et al. | Dec 1996 | A |
5616422 | Ballard et al. | Apr 1997 | A |
5637832 | Danner | Jun 1997 | A |
5674785 | Akram et al. | Oct 1997 | A |
5719749 | Stopperan | Feb 1998 | A |
5726493 | Yamashita et al. | Mar 1998 | A |
5739581 | Chillara | Apr 1998 | A |
5739585 | Akram et al. | Apr 1998 | A |
5739588 | Ishida et al. | Apr 1998 | A |
5742479 | Asakura | Apr 1998 | A |
5774340 | Chang et al. | Jun 1998 | A |
5784259 | Asakura | Jul 1998 | A |
5798014 | Weber | Aug 1998 | A |
5822190 | Iwasaki | Oct 1998 | A |
5826330 | Isoda et al. | Oct 1998 | A |
5835355 | Dordi | Nov 1998 | A |
5847453 | Uematsu et al. | Dec 1998 | A |
5883425 | Kobayashi | Mar 1999 | A |
5894108 | Mostafazadeh et al. | Apr 1999 | A |
5898219 | Barrow | Apr 1999 | A |
5903052 | Chen et al. | May 1999 | A |
5907477 | Tuttle et al. | May 1999 | A |
5936843 | Ohshima et al. | Aug 1999 | A |
5952611 | Eng et al. | Sep 1999 | A |
6004619 | Dippon et al. | Dec 1999 | A |
6013948 | Akram et al. | Jan 2000 | A |
6021564 | Hanson | Feb 2000 | A |
6028364 | Ogino et al. | Feb 2000 | A |
6034427 | Lan et al. | Mar 2000 | A |
6035527 | Tamm | Mar 2000 | A |
6040622 | Wallace | Mar 2000 | A |
6060778 | Jeong et al. | May 2000 | A |
6069407 | Hamzehdoost | May 2000 | A |
6072243 | Nakanishi | Jun 2000 | A |
6081036 | Hirano et al. | Jun 2000 | A |
6119338 | Wang et al. | Sep 2000 | A |
6122171 | Akram et al. | Sep 2000 | A |
6127833 | Wu et al. | Oct 2000 | A |
6160705 | Stearns et al. | Dec 2000 | A |
6172419 | Kinsman | Jan 2001 | B1 |
6175087 | Keesler et al. | Jan 2001 | B1 |
6184463 | Panchou et al. | Feb 2001 | B1 |
6194250 | Melton et al. | Feb 2001 | B1 |
6204453 | Fallon et al. | Mar 2001 | B1 |
6214641 | Akram | Apr 2001 | B1 |
6235554 | Akram et al. | May 2001 | B1 |
6239485 | Peters et al. | May 2001 | B1 |
D445096 | Wallace | Jul 2001 | S |
D446525 | Okamoto et al. | Aug 2001 | S |
6274821 | Echigo et al. | Aug 2001 | B1 |
6280641 | Gaku et al. | Aug 2001 | B1 |
6316285 | Jiang et al. | Nov 2001 | B1 |
6351031 | Iijima et al. | Feb 2002 | B1 |
6353999 | Cheng | Mar 2002 | B1 |
6365975 | DiStefano et al. | Apr 2002 | B1 |
6376906 | Asai et al. | Apr 2002 | B1 |
6392160 | Andry et al. | May 2002 | B1 |
6395578 | Shin et al. | May 2002 | B1 |
6405431 | Shin et al. | Jun 2002 | B1 |
6406942 | Honda | Jun 2002 | B2 |
6407341 | Anstrom et al. | Jun 2002 | B1 |
6407930 | Hsu | Jun 2002 | B1 |
6448510 | Neftin et al. | Sep 2002 | B1 |
6451509 | Keesler et al. | Sep 2002 | B2 |
6479762 | Kusaka | Nov 2002 | B2 |
6489676 | Taniguchi et al. | Dec 2002 | B2 |
6497943 | Jimarez et al. | Dec 2002 | B1 |
6517995 | Jacobson et al. | Feb 2003 | B1 |
6522762 | Mullenborn et al. | Feb 2003 | B1 |
6534391 | Huemoeller et al. | Mar 2003 | B1 |
6544638 | Fischer et al. | Apr 2003 | B2 |
6586682 | Strandberg | Jul 2003 | B2 |
6608757 | Bhatt et al. | Aug 2003 | B1 |
6660559 | Huemoeller et al. | Dec 2003 | B1 |
6715204 | Tsukada et al. | Apr 2004 | B1 |
6727645 | Tsujimura et al. | Apr 2004 | B2 |
6730857 | Konrad et al. | May 2004 | B2 |
6734542 | Nakatani et al. | May 2004 | B2 |
6740964 | Sasaki | May 2004 | B2 |
6753612 | Adae-Amoakoh et al. | Jun 2004 | B2 |
6774748 | Ito et al. | Aug 2004 | B1 |
6781231 | Minervini | Aug 2004 | B2 |
6787443 | Boggs et al. | Sep 2004 | B1 |
6803528 | Koyanagi | Oct 2004 | B1 |
6815709 | Clothier et al. | Nov 2004 | B2 |
6815739 | Huff et al. | Nov 2004 | B2 |
6838776 | Leal et al. | Jan 2005 | B2 |
6862002 | Demicco et al. | Mar 2005 | B2 |
6888240 | Towle et al. | May 2005 | B2 |
6919514 | Konrad et al. | Jul 2005 | B2 |
6921968 | Chung | Jul 2005 | B2 |
6921975 | Leal et al. | Jul 2005 | B2 |
6931726 | Boyko et al. | Aug 2005 | B2 |
6946325 | Yean et al. | Sep 2005 | B2 |
6953995 | Farnworth et al. | Oct 2005 | B2 |
6963141 | Lee et al. | Nov 2005 | B2 |
7015075 | Fay et al. | Mar 2006 | B2 |
7030469 | Mahadevan et al. | Apr 2006 | B2 |
7081661 | Takehara et al. | Jul 2006 | B2 |
7087514 | Shizuno | Aug 2006 | B2 |
7125744 | Takehara et al. | Oct 2006 | B2 |
7132307 | Wang et al. | Nov 2006 | B2 |
7166910 | Minervini | Jan 2007 | B2 |
7185426 | Hiner et al. | Mar 2007 | B1 |
7189593 | Lee | Mar 2007 | B2 |
7198980 | Jiang et al. | Apr 2007 | B2 |
7242081 | Lee | Jul 2007 | B1 |
7242089 | Minervini | Jul 2007 | B2 |
7282394 | Cho et al. | Oct 2007 | B2 |
7285855 | Foong | Oct 2007 | B2 |
7345361 | Mallik et al. | Mar 2008 | B2 |
7372151 | Fan et al. | May 2008 | B1 |
7381589 | Minervini | Jun 2008 | B2 |
7382048 | Minervini | Jun 2008 | B2 |
7420809 | Lim et al. | Sep 2008 | B2 |
7429786 | Karnezos et al. | Sep 2008 | B2 |
7434305 | Minervini | Oct 2008 | B2 |
7439616 | Minervini | Oct 2008 | B2 |
7459202 | Magera et al. | Dec 2008 | B2 |
7501703 | Minervini | Mar 2009 | B2 |
7537964 | Minervini | May 2009 | B2 |
7548430 | Huemoeller et al. | Jun 2009 | B1 |
7550857 | Longo et al. | Jun 2009 | B1 |
7633765 | Scanlan et al. | Dec 2009 | B1 |
7671457 | Hiner et al. | Mar 2010 | B1 |
7777351 | Berry et al. | Aug 2010 | B1 |
7825520 | Longo et al. | Nov 2010 | B1 |
8018049 | Minervini | Sep 2011 | B2 |
20020017712 | Bessho et al. | Feb 2002 | A1 |
20020061642 | Haji et al. | May 2002 | A1 |
20020066952 | Taniguchi et al. | Jun 2002 | A1 |
20020195697 | Mess et al. | Dec 2002 | A1 |
20030025199 | Wu et al. | Feb 2003 | A1 |
20030035558 | Kawamura et al. | Feb 2003 | A1 |
20030128096 | Mazzochette | Jul 2003 | A1 |
20030134450 | Lee | Jul 2003 | A1 |
20030141582 | Yang et al. | Jul 2003 | A1 |
20030169575 | Ikuta et al. | Sep 2003 | A1 |
20030197284 | Khiang et al. | Oct 2003 | A1 |
20040063246 | Karnezos | Apr 2004 | A1 |
20040145044 | Sugaya et al. | Jul 2004 | A1 |
20040159462 | Chung | Aug 2004 | A1 |
20040184632 | Minervini | Sep 2004 | A1 |
20050046002 | Lee et al. | Mar 2005 | A1 |
20050139985 | Takahashi | Jun 2005 | A1 |
20050242425 | Leal et al. | Nov 2005 | A1 |
20060008944 | Shizuno | Jan 2006 | A1 |
20060157841 | Minervini | Jul 2006 | A1 |
20060270108 | Farnworth et al. | Nov 2006 | A1 |
20070082421 | Minervini | Apr 2007 | A1 |
20070201715 | Minervini | Aug 2007 | A1 |
20070202627 | Minervini | Aug 2007 | A1 |
20070215962 | Minervini et al. | Sep 2007 | A1 |
20070273049 | Khan et al. | Nov 2007 | A1 |
20070281471 | Hurwitz et al. | Dec 2007 | A1 |
20070290376 | Zhao et al. | Dec 2007 | A1 |
20080150111 | Hiller et al. | Jun 2008 | A1 |
20080230887 | Sun et al. | Sep 2008 | A1 |
20090057876 | Chien et al. | Mar 2009 | A1 |
20090115049 | Shiraishi et al. | May 2009 | A1 |
20100102428 | Lee et al. | Apr 2010 | A1 |
20100119097 | Ohtsuka | May 2010 | A1 |
20100221860 | Hawat et al. | Sep 2010 | A1 |
Number | Date | Country |
---|---|---|
05-109975 | Apr 1993 | JP |
05-136323 | Jun 1993 | JP |
07-017175 | Jan 1995 | JP |
08-190615 | Jul 1996 | JP |
10-334205 | Dec 1998 | JP |
2000-307164 | Nov 2000 | JP |
2002-057482 | Feb 2002 | JP |
2010-187277 | Aug 2010 | JP |
Entry |
---|
Gabriel, K., “Akustica”, Sep. 29, 2005, 46 pages, Akustica, Inc., Pittsburgh, PA, USA. |
IBM Technical Disclosure Bulletin, “Microstructure Solder Mask by Means of a Laser”, vol. 36, Issue 11, p. 589, Nov. 1, 1993. (NN9311589). |
Kim et al., “Application of Through Mold Via (TMV) as PoP base package” 58th ECTC Proceedings, May 2008, Lake Buena Vista, FL, 6 pages, IEEE. |
Scanlan, “Package-on-package (PoP) with Through-mold Vias”, Advanced Packaging, Jan. 2008, 3 pages, Vol. 17, Issue 1, PennWell Corporation. |
“Infineon®-SMM310™ Silicon MEMS Microphone”, Product Brief, 2007, 2 pages, Infineon Technologies AG, Munich, Germany. No author provided. |
“Surface Mount MEMS Microphones”, 2 pages. Retrieved on Apr. 28, 2010 from the Internet: <URL:http://www.knowles.com/search/product.htm?x—sub—cat—id=3>. No author provided. |
Hiner et al., “Printed Wiring Motherboard Having Bonded Interconnect Redistribution Mesa”, U.S. Appl. No. 10/992,371, filed Nov. 18, 2004. |
Huemoeller et al., “Build Up Motherboard Fabrication Method and Structure”, U.S. Appl. No. 11/824,395, filed Jun. 29, 2007. |
Huemoeller et al., “Buildup Dielectric Layer Having Metallization Pattern Semiconductor Package Fabrication Method”, U.S. Appl. No. 12/387,691, filed May 5, 2009. |
Miller Jr. et al., “Thermal Via Heat Spreader Package and Method”, U.S. Appl. No. 12/421,118, filed Apr. 9, 2009. |
Scanlan et al., “Semiconductor Package Including a Top-Surface Metal Layer for Implementing Circuit Features”, U.S. Appl. No. 12/589,839, filed Oct. 28, 2009. |
Hiner et al., “Semiconductor Package Including Top-Surface Terminals for Mounting Another Semiconductor Package”, U.S. Appl. No. 12/655,724, filed Jan. 5, 2010. |
Hiner et al., “Semiconductor Package Including Top-Surface Terminals for Mounting Another Semiconductor Package”, U.S. Appl. No. 12/802,661, filed Jun. 10, 2010. |
Scanlan et al., “Semiconductor Package Including a Top-Surface Metal Layer for Implementing Circuit Features”, U.S. Appl. No. 12/802,715, filed Jun. 10, 2010. |
Syed et al., “Top Port MEMS Microphone Package and Method”, U.S. Appl. No. 12/834,682, filed Jul. 12, 2010. |
Scanlan, “Stacked Redistribution Layer (RDL) Die Assembly Package”, U.S. Appl. No. 12/924,493, filed Sep. 27, 2010. |
Miks et al., “Top Port with Interposer MEMS Microphone Package and Method”, U.S. Appl. No. 13/016,343, filed Jan. 28, 2011. |
Kuo et al., “Metal Mesh Lid MEMS Package and Method”, U.S. Appl. No. 13/096,359, filed Apr. 28, 2011. |