Patent Application
20240282889
An embodiment of the present invention relates to a stacked structure including a gallium nitride-based semiconductor layer formed on an amorphous substrate, and a gallium nitride-based semiconductor device configured by the stacked structure.
Gallium nitride is used in light-emitting diodes and is expected to find applications in power transistors and integrated circuits as a next-generation semiconductor material. The gallium nitride is formed by the metal organic chemical vapor deposition (MOCVD) method. The growth of gallium nitride by MOCVD requires heating the substrate to 1,000° C. or higher, which is problematic because the power consumption required to manufacture the device is enormous. Therefore, development of technologies to fabricate crystalline gallium nitride films using the sputtering method, which enables deposition even at low temperatures, is underway. For example, a gallium nitride sputtering target is used to deposit a crystalline gallium nitride layer on a single-crystal silicon or sapphire substrate.
For the growth of gallium nitride films, substrates with crystallinity, such as sapphire and single-crystal silicon substrates, are used. However, the sapphire substrate and single-crystal silicon substrate are expensive, and it is difficult to increase the substrate size. If amorphous substrates, such as glass substrates used in liquid crystal displays, can be used as substrates for forming the gallium nitride film, the cost of substrates can be reduced, and it will be easier to increase the area of substrates. However, so far, there is no reported case of high-quality gallium nitride with crystalline quality on an amorphous substrate such as a glass substrate.
A stacked structure in an embodiment according to the present invention includes an amorphous substrate, a buffer layer on the amorphous substrate, and a gallium nitride-based semiconductor layer on the buffer layer. The gallium nitride-based semiconductor layer includes at least one gallium nitride layer, and an oxygen concentration of the gallium nitride layer is less than 1×1021/cm3.
A gallium nitride-based semiconductor device in an embodiment according to the present invention includes an amorphous substrate, a buffer layer on the amorphous substrate, and a gallium nitride-based semiconductor layer on the buffer layer. The gallium nitride-based semiconductor layer includes at least one gallium nitride layer, and an oxygen concentration of the gallium nitride layer is less than 1×1021/cm3.
Hereinafter, embodiments of the present invention are described with reference to the drawings. However, the present invention can be implemented in many different aspects and should not be construed as being limited to the description of the following embodiments. For the sake of clarifying the explanation, the drawings may be expressed schematically with respect to the width, thickness, shape, and the like of each part compared to the actual aspect, but this is only an example and does not limit the interpretation of the present invention. For this specification and each drawing, elements similar to those described previously with respect to previous drawings may be given the same reference sign (or a number followed by a, b, etc.) and a detailed description may be omitted as appropriate. The terms “first” and “second” appended to each element are a convenience sign used to distinguish them and have no further meaning except as otherwise explained.
As used herein, where a member or region is “on” (or “below”) another member or region, this includes cases where it is not only directly on (or just under) the other member or region but also above (or below) the other member or region, unless otherwise specified. That is, it includes the case where another component is included in between above (or below) other members or regions.
The amorphous substrate 102 preferably has a low coefficient of thermal expansion, a high strain point, and a high surface flatness. For example, the amorphous substrate 102 preferably has an expansion coefficient lower than 50×10−7/° C. and a strain point of 600° C. or higher. The amorphous substrate 102 in this embodiment only needs to have a heat resistance of about 700° C. and is not required to have a heat resistance of 1000° C. or higher which is required for sapphire substrates for example. The amorphous substrate 102 preferably contains 0.1% or less of an alkali metal such as sodium (Na).
As the amorphous substrate 102 that meets these characteristics, for example, a glass substrate consisting of at least one of aluminoborosilicate glass and aluminosilicate glass can be used, and it is preferred that the glass substrate be an alkali-free glass substrate. Such glass substrates are used in liquid crystal displays and organic electroluminescence (OLED) displays, and large-area glass substrates, called mother glass, are available in the market. Using the glass substrate as the amorphous substrate 102 allows the formation of the gallium nitride-based semiconductor layer 108 on the large-area glass substrate.
A flexible resin substrate such as a polyimide substrate, acrylic substrate, siloxane substrate, or fluoropolymer substrate can be used as the amorphous substrate 102. A quartz glass substrate can also be used as the amorphous substrate 102.
As shown in
The silicon nitride layer 104a has a function of preventing impurities contained in the amorphous substrate 102 from diffusing into the buffer layer 106 and the gallium nitride-based semiconductor layer 108. A particularly problematic impurity is an alkali metal such as sodium, which is contained in trace amounts in the amorphous substrate 102. The silicon nitride layer 104a can prevent diffusion of alkali metals as long as the film thickness is 20 nm or more. The thickness of the silicon nitride layer 104a is preferably, for example, 20 nm or more and 500 nm or less, preferably 100 nm or more and 300 nm or less, and can be formed with a film thickness of, for example, 150 nm. The silicon oxide layer 104b can increase the adhesiveness of the buffer layer 106 and prevent delamination. The silicon oxide layer 104b preferably has a film thickness of 20 nm or more. The thickness of the silicon oxide layer 104b is preferably 20 nm or more and 500 nm or less, preferably 50 nm or more and 200 nm or less, and can be formed with a thickness of, for example, 100 nm.
The underlying insulating layer 104 on the amorphous substrate 102 prevents impurity diffusion into the gallium nitride-based semiconductor layer 108 and makes it highly pure. Thereby, it is possible to form the gallium nitride-based semiconductor layer 108 with high crystallinity.
The buffer layer 106 is disposed on the amorphous substrate 102. The buffer layer 106 is preferably crystalline, that is, at least one of a crystalline metal and a metal compound. The crystallinity of the buffer layer 106 is preferably oriented, and the orientation of the buffer layer 106 is preferably c-axis oriented. The buffer layer 106 is preferably crystalline with rotational symmetry, for example, its crystalline surface preferably has six-fold symmetry. For example, the buffer layer 106 is preferably a hexagonal close-packed structure, a face-centered cubic structure, or an equivalent structure. Here, the hexagonal close-packed structure or a structure equivalent to the face-centered cubic structure includes a crystal structure in which the c-axis is not 90 degrees to the a-axis and b-axis. The buffer layer 106 using a conductive material having a hexagonal close-packed structure or a structure equivalent thereto is preferably oriented in the (0001) direction, that is, in the c-axis direction with respect to the amorphous substrate 102 (hereinafter referred to as (0001) orientation of the hexagonal close-packed structure). The buffer layer 106 having a face-centered cubic structure or an equivalent structure is preferably oriented in the (111) direction with respect to the amorphous substrate 102 (hereinafter referred to as (111) orientation of the face-centered cubic structure).
The buffer layer 106 is disposed between the amorphous substrate 102 and the gallium nitride-based semiconductor layer 108. In order to form the gallium nitride-based semiconductor layer 108 having crystallinity on the amorphous substrate 102, the buffer layer 106 has a function as a buffer layer to relax the lattice mismatch. The buffer layer 106 has crystallinity as described above, which enables the crystallization of the gallium nitride-based semiconductor layer 108. In other words, the buffer layer 106 has a crystalline surface with c-axis orientation and six-fold rotational symmetry, such as a hexagonal close-packed structure or a face-centered cubic structure, so that the orientation of the gallium nitride-based semiconductor layer 108 can be controlled so that the c-axis of the layer 108 grows in the film thickness direction.
The buffer layer 106 is preferred to have a flat surface. When the flatness of the surface of the buffer layer 106 is expressed in terms of arithmetic mean roughness (Ra), the value is preferably smaller than 2.5 nm and more preferably smaller than 2.3 nm. The crystallinity of the gallium nitride-based semiconductor layer 108 is enhanced by the buffer layer 106 having a flat surface. The Ra of the buffer layer 106 is preferable the smaller it is, for example, the arithmetic mean roughness (Ra) should be over 0 nm, 0.1 nm or more, preferably 0.01 nm or more. The surface roughness of the buffer layer 106 can be measured using an atomic force microscope (AFM).
The buffer layer 106 is preferably crystalline and thin. There is no particular limitation on the thickness of the buffer layer 106 as long as it can be regarded as a thin film. However, if the film thickness is excessively thin, the surface flatness may be inferior and the film may not be crystalline. On the other hand, if the film thickness of the buffer layer 106 is excessively thick, the surface morphology peculiar to the metal will appear due to crystallization and the surface planarity will be reduced. Therefore, the film thickness of the buffer layer 106 is preferably 5 nm or more and 500 nm or less and is more preferably 10 nm or more and 200 nm or less. The film thickness of the buffer layer 106 can be measured with a contact step meter, an optical film thickness meter (ellipsometry), or from images obtained with a scanning electron microscope (SEM) or transmission electron microscope (TEM).
The buffer layer 106 is formed of metal. Titanium (Ti) and aluminum (Al) are preferably used as metal materials to form the buffer layer 106, and silver (Ag), nickel (Ni), copper (Cu), strontium (Sr), rhodium (Rh), palladium (Pd), iridium (Ir), platinum (Pt) and gold (Au) may also be used. The buffer layer 106 may also use metal oxide materials such as zinc oxide (ZnO) and titanium dioxide (TiO2).
This type of buffer layer 106 can be prepared by sputtering or electron beam vacuum evaporation.
The buffer layer 106 may also be formed with an insulating layer instead of a metallic layer. That is, the buffer layer 106 may also be formed of an insulating material.
Aluminum nitride (AlN), aluminum oxide (Al2O3) and the like can be used as the insulating buffer layer 106. The insulating buffer layer 106 is preferably of the same crystallinity as described above and has a similar film thickness.
The gallium nitride-based semiconductor layer 108 includes at least one gallium nitride (GaN) layer. For example, the gallium nitride-based semiconductor layer 108 is a single gallium nitride layer. The gallium nitride-based semiconductor layer 108 includes a gallium nitride layer and further includes at least one layer selected from an indium gallium nitride (InGaN) layer and an aluminum gallium nitride (AlGaN) layer, which are stacked. The gallium nitride layer, the indium gallium nitride layer and the aluminum gallium nitride layer, which form the gallium nitride-based semiconductor layer 108, are preferably stoichiometric in composition, but may deviate from stoichiometric composition.
The gallium nitride-based semiconductor layer 108 preferably has crystallinity. That is, the gallium nitride layer forming the gallium nitride-based semiconductor layer 108 is preferably crystalline. The gallium nitride layer is preferably single crystalline and may be polycrystalline, microcrystalline, or nanocrystalline. The crystal structure of the gallium nitride layer preferably has a wurtzite structure. The gallium nitride layer forming the gallium nitride-based semiconductor layer 108 preferably has a c-axis orientation or a (111) orientation.
The conductive type of the gallium nitride layers forming some or all of the gallium nitride-based semiconductor layer 108 may be substantially intrinsic or may be an n-type or p-type conductive type. The gallium nitride layers may contain dopants for valence control. The n-type gallium nitride layer may be doped with one element selected from silicon (Si) or germanium (Ge) as a dopant. The p-type gallium nitride layer may be doped with one element selected from magnesium (Mg), zinc (Zn), cadmium (Cd) and beryllium (Be) as a dopant. The n-type gallium nitride layer is preferred to have a carrier concentration of 1×1018/cm3 or higher. The p-type gallium nitride layer is preferred to have a carrier concentration of 5×1016/cm3 or more. The substantially intrinsic (otherwise known as high resistivity) gallium nitride layer may also contain zinc (Zn) as a dopant.
The gallium nitride layer forming part or all of the gallium nitride-based semiconductor layer 108 is disposed in contact with the buffer layer 106. The gallium nitride layer is deposited on the buffer layer 106. As mentioned above, the buffer layer 106 has a c-axis oriented crystal plane, which enables the formation of a gallium nitride layer having a c-axis or (111) orientation. The gallium nitride layer may contain an amorphous structure in the region near the interface where it contacts the buffer layer 106, although it is preferred that the layer is crystalline in the region away from the interface (bulk). The crystallinity of the gallium nitride layer forming part or all of the gallium nitride-based semiconductor layer 108 improves the performance of the gallium nitride-based semiconductor device. For example, when the gallium nitride-based semiconductor device is a light-emitting device, the luminous intensity can be enhanced, and when the device is an active device such as a transistor, the carrier mobility can be enhanced.
The gallium nitride layer forming part or all of the gallium nitride-based semiconductor layer 108 may contain oxygen (O), carbon (C), hydrogen (H) and fluorine (F) as impurity elements other than elements added as dopants. The concentration of oxygen contained in the gallium nitride layer is preferably 2×1021/cm3 or less, and 1×1021/cm3 or less is more preferred. The concentration of carbon in the gallium nitride layer is preferably 5×1019/cm3 or less, and 3×1019/cm3 or less is more preferred. The concentration of hydrogen in the gallium nitride layer is preferably 3×1020/cm3 or less, and 2×1020/cm3 or less is more preferred. The concentration of fluorine in the gallium nitride layer is preferably 1×1019/cm3 or less, and 5×1017/cm3 or less is more preferred.
The lower limit values of oxygen (O), carbon (C), hydrogen (H) and fluorine (F) as impurity elements are not limited in terms of high purity of the gallium nitride layer, and less is preferred, however, the lower limit may be equal to or higher than the lower limit of detection of the measurement device that detects these impurity elements. When the oxygen (O), carbon (C), hydrogen (H) and fluorine (F) concentrations in the gallium nitride layer are measured by secondary ion mass spectrometry, they may be specified as equal to or above the background level. For example, the lower limit may be set at 6×1016/cm3 or more for oxygen (O), 4×1016/cm3 or more for carbon (C), 2×1017/cm3 or more for hydrogen (H) and 2×1015/cm3 or more for fluorine (F).
It is not preferred if the impurity concentration in the gallium nitride layer is high, as the crystallinity will decrease and increase the density of defect levels that act as carrier traps. Oxygen in the gallium nitride layer acts as a dopant, so exceeding the above range may change the conductive properties and degrade the device characteristics. Hydrogen in the gallium nitride layer may passivate and inactivate p-type dopants in particular, so it is preferable that the above range is not exceeded. Carbon in the gallium nitride layer should not exceed the above range, as it may form crystal defects and form defective levels, reducing luminous efficiency.
The concentration of these impurity elements is based on measurements obtained by the secondary ion mass spectrometry method. The above impurity concentrations are based on values obtained by measuring the secondary ion intensity in the depth direction (film thickness direction) for each element using cesium ions (Cs+) as the primary ion, and quantifying based on the secondary ion intensity.
These impurity elements such as oxygen, hydrogen, carbon and fluorine in the gallium nitride-based semiconductor layer 108 result from impurities in the sputtering target. These impurity elements result from residual gases in the deposition chamber of the sputtering apparatus. These impurity elements in the gallium nitride layer are considered to be contaminated in the film during sputtering deposition from these sources. Unlike impurities that are intentionally added for the purpose of valence control, these impurity elements can be said to be impurities that are inevitable.
The crystallinity of the gallium nitride layer can be enhanced by increasing the purity of the gallium nitride layer so that the concentration of oxygen, carbon, hydrogen and fluorine inevitably contained in the gallium nitride layer forming part or all of the gallium nitride-based semiconductor layer 108 is in the numerical range as described above. That is, the stacked structure 100 according to the present embodiment can enhance the crystallinity of the gallium nitride layer forming part or all of the gallium nitride-based semiconductor layer 108 disposed on the amorphous substrate 102 by increasing the purity of the gallium nitride layer.
The stacked structure 100 of the present embodiment is not limited to any method of manufacturing. The stacked structure 100 of the present embodiment may suitably be fabricated according to the following manufacturing method.
The method of manufacturing the stacked structure 100 may include the processes of forming the buffer layer 106 on the amorphous substrate 102 and the gallium nitride-based semiconductor layer 108 on the buffer layer 106. When providing the underlying insulating layer 104, the process includes forming the underlying insulating layer 104 on the amorphous substrate 102 before forming the buffer layer 106. The process of forming the gallium nitride-based semiconductor layer 108 includes a deposition process using the sputtering method. In the following description, the process of forming the underlying insulating layer 104 is included.
A glass substrate is used as the amorphous substrate 102. The glass substrate is an alkali-free glass substrate formed of aluminoborosilicate glass, aluminosilicate glass, or the like. The amorphous substrate 102 is cleaned to form a clean surface. The method of cleaning is optional, for example, cleaning is performed with a mixed cleaning solution containing sulfuric acid and hydrogen peroxide or hydrochloric acid and hydrogen peroxide, followed by an ultrapure water rinse to remove the mixed cleaning solution.
The underlying insulating layer 104 is formed by a silicon nitride layer 104a and a silicon oxide layer 104b. There is no limitation on the method of forming the silicon nitride layer 104a and the silicon oxide layer 104b. For example, the silicon nitride layer 104a is prepared by a plasma CVD (Chemical Vapor Deposition) method using reaction gases such as silane (SiH4), ammonia (NH3) and nitrogen (N2). The silicon oxide layer 104b is prepared by a plasma CVD method using reaction gases such as silane (SiH4), nitrous oxide (N2O) and tetraethyl orthosilicate (TEOS). When the plasma CVD apparatus is equipped with multiple deposition chambers, the silicon nitride layer 104a and the silicon oxide layer 104b can be continuously deposited. The silicon nitride layer 104a may be formed by reactive sputtering using silicon as the sputtering target, and the silicon oxide layer 104b may be formed using quartz as the sputtering target.
The silicon nitride layer 104a is formed with a thickness of 20 nm or more and 500 nm or less, preferably 100 nm or more and 300 nm or less, for example, 150 nm, as described above. The silicon oxide layer 104b is formed with a thickness of 20 nm or more and 500 nm or less, preferably 50 nm or more and 200 nm or less, for example, 100 nm.
The buffer layer 106 is formed on the underlying insulating layer 104. The buffer layer 106 is prepared by a sputtering method or vacuum evaporation method. As a sputtering method, known sputtering methods can be used. DC sputtering, RF sputtering, AC sputtering, DC magnetron sputtering, RF magnetron sputtering, pulsed sputtering, ion beam sputtering and induced plasma-assisted sputtering methods are among the known methods. Among these, the DC magnetron sputtering or RF magnetron sputtering methods are preferred for uniform and fast deposition on large-area glass substrates.
When the buffer layer 106 is prepared by sputtering, metal, oxide or nitride targets are used as sputtering targets. As the buffer layer 106 is preferably to have orientation, the target material is preferably of high purity, and a purity of 5N (99.999%) or more is preferred. To prevent abnormal discharges and suppress particle generation, it is preferable to use a target material with a low defect density and a smooth surface.
When a metal buffer layer is formed as the buffer layer 106, titanium (Ti) and aluminum (Al) are preferred as the metal material, as described above. The buffer layer 106 may also be formed with other metals such as silver (Ag), nickel (Ni), copper (Cu), strontium (Sr), rhodium (Rh), palladium (Pd), iridium (Ir), platinum (Pt) and gold (Au). The buffer layer 106 may be formed of a metal oxide such as zinc oxide (ZnO) or titanium dioxide (TiO2) instead of a metal. The buffer layer 106 may also be formed of an insulating material such as aluminum nitride (AlN) or aluminum oxide (Al2O3). The buffer layer 106 is formed with a thickness of 5 nm or more and 500 nm or less, preferably 10 nm or more and 200 nm or less.
When the buffer layer 106 is formed of the metal, a high-purity metal is used as a sputtering target. When the buffer layer 106 is formed of the metal oxide, a sintered metal oxide is used as the sputtering target. When the buffer layer 106 is formed of the insulating material, a sintered insulating material is used as the sputtering target. These sputtering targets are brazed to a backing plate of copper (Cu), aluminum (Al) or stainless steel. When the sputtering target is metal, the backing plate may be formed in one piece.
It is preferable to use a deposition apparatus capable of high vacuum evacuation for the preparation of the buffer layer 106. For example, when the buffer layer 106 is prepared by sputtering, the ultimate vacuum of the deposition chamber of the sputtering equipment should be 1×10−4 Pa or lower. It is possible to increase the degree of ultimate vacuum in the deposition chamber to remove residual gases as much as possible and reduce impurities contained in the buffer layer 106 during film deposition, thereby enhancing orientation film. To orient the buffer layer 106, the substrate temperature is preferably heated to between 100° C. and 300° C. It is possible to form a highly oriented buffer layer 106 with c-axis orientation by depositing the film at the substrate temperature in this range.
In this embodiment, the gallium nitride-based semiconductor layer 108 is prepared by a sputtering method. A gallium nitride-based sintered material is used as the sputtering target. When the gallium nitride layer is formed as the gallium nitride-based semiconductor layer 108, a gallium nitride sintered material is used as the sputtering target. From the viewpoint of improving the crystallinity of the gallium nitride layer, the lower the oxygen content in the sputtering target, the better. For example, the oxygen content in a gallium nitride sintered material used as a sputtering target is preferably 3 at % or less in atomic percentage, and 1 at % or less is even more preferred. In the gallium nitride sintered material, the content of metallic impurities other than gallium is preferably 0.1 at % or less, and 0.01 at % or less is even more preferred. The resistivity of the sputtering target with gallium nitride sintered material is preferably 1×102 Ω cm or less, the density is preferably 3.0 g/cm3 or more and 5.4 g/cm3 or less, and there is preferably no precipitation of gallium metal. The area of the sputtering target is preferably 18 cm2 or more, and 100 cm2 or more is more preferred. The larger the area of the sputtering target, the more stable the discharge and the lower the gas pressure and power density. Furthermore, the uniformity of the thickness and quality of the gallium nitride layer can be improved by using a sputtering target of such a size.
As for sputtering methods, DC sputtering method, RF sputtering method, AC sputtering method, DC magnetron sputtering method, RF magnetron sputtering method, pulse sputtering method, and ion beam sputtering method and induced plasma assisted sputtering method can be used. In these methods, DC magnetron sputtering and RF magnetron sputtering methods are preferred selections as they are capable of handling the large area of the amorphous substrate 102. In the DC and RF magnetron sputtering methods, the moving magnet method is preferred, as it allows erosion of the sputtering target over its entire surface, thereby ensuring effective use of the material.
The gas pressure during deposition of the gallium nitride layer by sputtering is less than 0.3 Pa, less than 0.1 Pa is preferred, and less than 0.08 Pa is even preferred. The lower gas pressure during sputtering deposition enhances the surface diffusion of sputter particles adhering to the deposited surface and improves crystallinity.
The ultimate vacuum in the deposition chamber of the sputtering apparatus is preferably less than 3×10−5 Pa, and less than 1×10−5 Pa. A baking treatment of the deposition chamber and vacuum exhaust system is preferred in order to remove residual moisture in the deposition chamber and to enable high vacuum evacuation. In this way, the ultimate vacuum in the deposition chamber is being increased, so that residual gases are less likely to be contaminated as impurities in the gallium nitride layer, and crystallinity can be improved.
Before depositing the gallium nitride layer, the amorphous substrate 102 (that is, the surface of the buffer layer 106, which is the deposited surface) is preferably subjected to reverse sputtering. The reverse sputtering is a method of cleaning the surface by irradiating noble gas ions such as argon (Ar) onto the amorphous substrate 102, rather than on the sputtering target side. The reverse sputtering cleans the surface of the amorphous substrate 102 (that is, the surface of the buffer layer 106, which is the deposition surface), planarizes the minute irregularities on the surface and removes factors that inhibit crystal growth. It is preferable that the sputtering apparatus has a dedicated processing chamber for the reverse sputtering in addition to the deposition chamber, so that the film can be deposited while keeping the surface of the amorphous substrate 102 (that is, the surface of the buffer layer 106, which is the deposited surface) clean by sending it to the deposition chamber without exposing it to the outside air after the reverse sputtering is performed.
To improve the crystallinity of the gallium nitride layer, the substrate temperature during deposition is preferably controlled. It is possible to improve the crystallinity of the gallium nitride layer by increasing the substrate temperature, thereby enhancing the surface diffusion of sputter particles adhering to the deposited surface. The substrate temperature (also referred to as “deposition temperature”) during sputter deposition is preferably between room temperature and 600° C., and 100° C. or more and 400° C. or less is more favorable. On the other hand, at temperatures higher than 600° C., the heat resistance temperature of the amorphous substrate 102 is exceeded, the sputtering apparatus becomes expensive and the advantages of using the sputtering method become less advantageous. The substrate temperature can be from room temperature (including cases where the substrate is not intentionally heated) to higher temperatures, and preferably low-temperature deposition on the amorphous substrate 102 at 100° C. or more and 400° C. or less can improve the crystallinity of the gallium nitride layer deposited on the buffer layer 106.
The gas used for sputtering (sputter gas) is usually a noble gas such as argon (Ar), but nitrogen (N2) gas is preferably used for the deposition of gallium nitride films. It is possible to suppress the formation of nitrogen defects by using nitrogen gas as the sputtering gas.
A power density of 5 W/cm2 or less is preferred, 2.5 W/cm2 or less is more preferred and 1.5 W/cm2 or less is even more preferred as power during discharge. A lower limit of 0.1 W/cm2 or more is preferred, and 0.3 W/cm2 or more is even more preferred. The power density calculation is based on the power applied during discharge divided by the area of the sputtering target material. When the power applied during discharge is higher than 5 W/cm2, coarse polycrystalline particles are more likely to detach from the sputtering target. When the power density is less than 0.1 W/cm2, the discharge becomes stable and the deposition rate decreases, resulting in lower film productivity.
The thickness of the gallium nitride layer is preferably 30 nm or more, and 50 nm or more is even more preferred. With such a film thickness, it is possible to form the gallium nitride layer with crystallinity on top of the buffer layer 106. The thickness of the gallium nitride layer is preferably less than 5000 nm, preferably less than 1000 nm, more preferably, for example, less than 200 nm to 500 nm.
The present embodiment describes a method for manufacturing the gallium nitride layer as a gallium nitride-based semiconductor layer 108. It is possible to manufacture crystalline thin films with different compositions, such as an indium gallium nitride (InGaN) layer and an aluminum gallium nitride (AlGaN) layer, by changing the material of the sputtering target. In addition, it is possible to form a gallium nitride-based semiconductor layer 108 with a plurality of layers with different compositions, by using a sputtering apparatus having multiple deposition chambers and attaching a sputtering target with a different composition to each deposition chamber.
As shown in this embodiment, In the fabrication of the gallium nitride-based semiconductor layer 108, it is possible to prepare the gallium nitride-based semiconductor layer 108 with a low concentration of impurities such as oxygen, carbon, hydrogen and fluorine, and high crystallinity, by reducing the concentration of impurities such as oxygen in the sputtering target, and by performing high vacuum evacuation during sputtering deposition, and by cleaning the deposited surface by processes such as reverse sputtering. In other words, the gallium nitride layer may be prepared with the oxygen concentration less than 2×1021/cm3, preferably less than 1×1021/cm3, the carbon concentration less than 5×1019/cm3, preferably less than 3×1019/cm3, the hydrogen concentration less than 3×1020/cm3, preferably less than 2×1020/cm3, and the fluorine concentration less than 1×1019/cm3, preferably less than 5×1017/cm3. It is possible to prepare the stacked structure 100 in which the gallium nitride-based semiconductor layer 108 having crystallinity is formed on the amorphous substrate 102 by having such an impurity concentration.
As described above, the gallium nitride-based semiconductor layer 108 is prepared using the sputtering target consisting of gallium nitride with reduced impurities such as oxygen. In the sputtering process, the amorphous substrate 102 is subjected to a reverse sputtering process and the deposition chamber is evacuated to a high vacuum before sputtering deposition is carried out at a specified power density. The concentration of impurities such as oxygen, carbon, and hydrogen are reduced, and the gallium nitride-based semiconductor layer 108 having high crystallinity and low defect density can be obtained, by such a film forming method.
The stacked structure 100 according to the present embodiment can be used to manufacture gallium nitride-based semiconductor devices, such as light-emitting devices and transistors. An example of a device using the stacked structure 100 as the basic structure is shown below. The devices shown below are examples, and devices realized by the stacked structure 100 are not limited to the structure illustrated.
The light-emitting device 150 shown in
An active layer of the transistor 160 is formed by the gallium nitride-based semiconductor layer 108 on the amorphous substrate 102. The gallium nitride-based semiconductor layer 108 has high crystallinity with reduced concentrations of impurities such as oxygen, carbon and hydrogen, and reduced defect density, thus providing a transistor with excellent switching characteristics and high-speed operation at a low cost.
An example of the stacked structure 100 is shown below, but the present invention is not limited to this example.
An alkali-free glass substrate was used as the amorphous substrate 102. A silicon nitride layer 104a and a silicon oxide layer 104b were formed on the alkali-free glass substrate with a thickness of 150 nm and 100 nm, respectively, as the underlying insulating layer 104. The silicon nitride layer 104a and the silicon oxide layer 104b were prepared by the plasma CVD method. The silicon nitride layer 104a was deposited using silane (SiH4), ammonia (NH3) and nitrogen (N2) as reaction gases at an RF power density of 0.24 W/cm2 and a substrate temperature of 400° C. The silicon oxide layer 104b was deposited using silane (SiH4) and nitrous oxide (N2O) as reaction gases at an RF power density of 0.61 W/cm2 and a substrate temperature of 380° C.
A titanium (Ti) layer was formed as the buffer layer 106 on top of the underlying insulating layer 104 to a thickness of 50 nm. The titanium (Ti) layer was deposited at room temperature without substrate heating using a titanium (Ti) target by sputtering method.
A gallium nitride layer was prepared as the gallium nitride-based semiconductor layer 108 by sputtering. The sputtering conditions are as follows.
The impurity concentration in the gallium nitride layer prepared under the conditions described above was evaluated by secondary ion mass spectrometry. The concentrations of oxygen, hydrogen, carbon and fluorine were measured as impurities in the gallium nitride layer.
The conditions for analysis by secondary ion mass spectrometry are shown below.
The graph in
Table 1 shows the concentrations of oxygen, hydrogen, carbon and fluorine in the gallium nitride layer, as read from the graph shown in
This example shows that it is possible to prepare a gallium nitride layer with excellent crystallinity even when using an amorphous substrate such as a glass substrate by reducing as much as possible the impurities that inevitably enter when gallium nitride films are prepared by the sputtering method.
| Number | Date | Country | Kind |
|---|---|---|---|
| 2021-176842 | Oct 2021 | JP | national |
This application is a Continuation of International Patent Application No. PCT/JP2022/038069, filed on Oct. 12, 2022, which claims the benefit of priority to Japanese Patent Application No. 2021-176842, filed on Oct. 28, 2021, the entire contents of which are incorporated herein by reference.
| Number | Date | Country | |
|---|---|---|---|
| Parent | PCT/JP2022/038069 | Oct 2022 | WO |
| Child | 18647501 | US |
