Patent Application
20100321957
1. Field of the Invention
The present invention relates to switching power conversions, and more particularly relates to switching power conversions capable of reducing standby power consumption.
2. Description of the Related Art
In supplying the power for electronic equipments, switching power converters are widely adopted due to the advantages of high conversion efficiency and small component size they possess.
Taking the fly-back AC-to-DC power adapter as an example,
In the architecture, the input rectification and filtering unit 101 is used to generate a main input voltage according to an AC input.
The primary side voltage clamping snubber 102 is used to clamp the maximum primary side voltage of the main transformer 103 when the NMOS transistor 115 is off.
The main transformer 103, having a primary side coupled to the main input voltage and a secondary side coupled to the diode 104, is used to convert power from the AC input to the DC output of the adapter.
The diode 104 and the capacitor 105 are used as an output rectification and filtering unit to generate a DC output voltage Vout.
The resistor 106, resistor 107, resistor 108, programmable shunt regulator 109 and photo-coupler 110 are used to generate a feedback signal VFB, which is coupled to the COMP pin of the PWM IC 111, according to an error signal derived from a reference voltage and the DC output voltage Vout.
The PWM IC 111 is used to generate a gating signal VG according to the feedback signal VFB and a current sensing signal VCS to regulate the DC output voltage Vout at an expected level.
The auxiliary coil 112, diode 113 and capacitor 114 are used to generate a DC supply voltage VCC for the operation of the PWM IC 111.
The NMOS transistor 115, responsive to the gating signal VG, is used to control the power conversion via the main transformer 103.
The resistor 116 is used to carry the current sensing signal VCS.
Through a periodic on-and-off switching of the NMOS transistor 115, which is driven by the gating signal VG generated from the PWM IC 111, the input power is transformed through the main transformer 103 to the output.
However, when the powered electronic equipment enters standby mode, the power delivered by the typical adapter of
One solution that conventional power converters utilize to solve this problem is to add an enable pin on the PWM IC and add a second photo-coupler for receiving a control signal from the powered electronic equipment.
Please refer to
Since most of the components of the circuit in
The photo-coupler 210 is used to generate a feedback signal VFB, which is coupled to the COMP pin of the PWM IC 211, according to an error signal derived from a reference voltage and the DC output voltage Vout.
The PWM IC 211 has an enable pin IC_EN in addition to the COMP pin. The COMP pin is coupled to an output side of the photo-coupler 210 to receive the feedback signal VFB. The enable pin IC_EN is coupled to an enable signal VEN from an output side of the photo-coupler 217, and the PWM IC 211 will enter standby mode to reduce the power converted to the electronic equipment when the enable signal VEN is pulled down to a low level.
The photo-coupler 217 has an input side coupled to a control signal VCONTROL from the electronic equipment and the output side for generating the enable signal VEN, which is coupled to the enable pin IC_EN of the PWM IC 211. As shown in
However, the additional photo-coupler 217 and the additional enable pin IC_EN for the PWM IC 211 will increase the cost of the adapter, and the fact that the DC output voltage Vout remains the same for the standby mode and the normal PWM mode due to the effect of the feedback signal VFB will cause the adapter to convert excessive power to the electronic equipment in standby mode, since the operation voltage of the electronic equipment in standby mode can be lower than that in the normal PWM mode.
Therefore, there is a need to provide a solution capable of lowering the DC output voltage Vout in standby mode without any additional photo-coupler or additional enable pin for the PWM IC.
Seeing this bottleneck, the present invention proposes a novel adapter topology without any additional photo-coupler or additional enable pin for the PWM IC to lower the DC output voltage Vout in standby mode in response to a control signal from an electronic equipment.
One objective of the present invention is to provide a standby power saving method for a switching power converter to lower the DC output voltage in standby mode without any additional photo-coupler or additional enable pin for the PWM IC.
Another objective of the present invention is to further provide a standby power saving apparatus for a switching power converter to lower the DC output voltage in standby mode without any additional photo-coupler or additional enable pin for the PWM IC.
To achieve the foregoing objectives of the present invention, a standby power saving method for power module applications is proposed, the method comprising the steps of: generating a mode signal according to voltage comparison of a feedback signal and a threshold voltage, wherein the mode signal has a normal mode state and a standby mode state; generating a pulse signal according to the mode signal, wherein the pulse signal has a normal PWM mode responsive to the normal mode state of the mode signal, and a VCC mode responsive to the standby mode state of the mode signal; and generating a gating signal according to the pulse signal for driving a primary side power switch.
To achieve the foregoing objectives, the present invention further provides a standby power saving apparatus for power module applications, comprising: a mode detector, used for generating a mode signal according to voltage comparison of a feedback signal and a threshold voltage, wherein the mode signal has a normal mode state and a standby mode state; a VCC mode unit, used for generating a pulse signal according to the mode signal, wherein the pulse signal has a normal PWM mode responsive to the normal mode state of the mode signal, and a VCC mode responsive to the standby mode state of the mode signal; and a driver, used for generating a gating signal according to the pulse signal for driving a primary side power switch.
To make it easier for our examiner to understand the objective of the invention, its structure, innovative features, and performance, we use preferred embodiments together with the accompanying drawings for the detailed description of the invention.
The present invention will be described in more detail hereinafter with reference to the accompanying drawings that show the preferred embodiment of the invention.
Please refer to
In the architecture, the input rectification and filtering unit 301 is used to generate a main input voltage according to an AC input.
The primary side voltage clamping snubber 302 is used to clamp the maximum primary side voltage of the main transformer 303 when the NMOS transistor 315 is off.
The main transformer 303, having a primary side coil with NP turns coupled to the main input voltage and a secondary side coil with NS turns coupled to the diode 304, is used to convert power from the AC input to the output of the adapter.
The diode 304 and the capacitor 305 are used as an output rectification and filtering unit to generate a DC output voltage Vout.
The resistor 306, resistor 307, resistor 308, programmable shunt regulator 309 and photo-coupler 310 are used to generate a feedback signal VFB, which is coupled to the COMP pin of the PWM IC 111, according to an error signal derived from a reference voltage and the DC output voltage Vout when a control signal Vcontrol.is at an active state. When the control signal Vcontrol.is at a standby state, the feedback signal VFB will be pulled down to a low level.
The PWM IC 311 can operate in a normal PWM mode or in a VCC mode according to the state of the feedback signal VFB. When the feedback signal VFB is not pulled down to a low level, the PWM IC 311 will operate in the normal PWM mode and generate a gating signal VG according to the feedback signal VFB and a current sensing signal VCS to regulate the DC output voltage Vout at an expected level, wherein the feedback signal VFB is coupled to the COMP pin of the PWM IC 111. When the feedback signal VFB is pulled down to a low level, the PWM IC 311 will operate in the VCC mode and generate a gating signal VG according to a DC supply voltage VCC so that the DC supply voltage VCC will be kept within a range from a first reference voltage to a second reference voltage. As shown in
The auxiliary coil 312, diode 313 and capacitor 314 are used to generate the DC supply voltage VCC for the operation of the PWM IC 311. The auxiliary coil 312 has Naux turns, so when the PWM IC 311 is in the VCC mode, the DC supply voltage VCC will relate to the DC output voltage Vout by the turn ratio Naux/NS.
The NMOS transistor 315, responsive to the gating signal VG, is used to control the power conversion via the main transformer 303.
The resistor 316 is used to carry the current sensing signal VCS.
Please refer to
In step a, the mode signal is generated according to voltage comparison of a feedback signal and a threshold voltage, wherein the mode signal has a normal mode state and a standby mode state.
In step b, the pulse signal is generated according to the mode signal, wherein the pulse signal has a normal PWM mode responsive to the normal mode state of the mode signal, and a VCC mode responsive to the standby mode state of the mode signal. The normal PWM mode of the pulse signal is responsive to the feedback signal and to a current sensing signal for generating a DC output voltage. The VCC mode of the pulse signal is responsive to the DC supply voltage to keep the DC supply voltage within a range from a first reference voltage to a second reference voltage, wherein the DC supply voltage is rectified from an auxiliary coil. The DC supply voltage in the VCC mode is related to the DC output voltage by a turn ratio of the auxiliary coil to a secondary side coil.
In step c, the gating signal generated according to the pulse signal is used for driving a primary side power switch.
Please refer to
The mode detector 311a is used for generating a mode signal VM according to voltage comparison of the feedback signal VFB and a threshold voltage, wherein the mode signal VM has a normal mode state and a standby mode state.
The VCC mode unit 311b is used for generating a pulse signal VP according to the mode signal VM, wherein the pulse signal VP has a normal PWM mode responsive to the normal mode state of the mode signal VM, and a VCC mode responsive to the standby mode state of the mode signal VM. The normal PWM mode of the pulse signal VP of the VCC mode unit 311b is responsive to the feedback signal VFB and to a current sensing signal VCS for generating a DC output voltage. The VCC mode of the pulse signal VP of the VCC mode unit 311b is responsive to a DC supply voltage VCC to keep the DC supply voltage within a range from a first reference voltage to a second reference voltage, wherein the DC supply voltage is rectified from an auxiliary coil and the DC supply voltage in the VCC mode of the VCC mode unit 311b is related to the DC output voltage by a turn ratio of the auxiliary coil to the secondary side coil.
The driver 311c is used for generating a gating signal VG according to the pulse signal VP for driving the primary side power switch.
Through the implementation of the present invention, a more power saving performance in standby mode for power module applications is achieved. The lowered DC output voltage in standby mode of the present invention does reduce the standby power consumption even by around 30%.
While the invention has been described by way of example and in terms of a preferred embodiment, it is to be understood that the invention is not limited thereto. To the contrary, it is intended to cover various modifications and similar arrangements and procedures, and the scope of the appended claims therefore should be accorded the broadest interpretation so as to encompass all such modifications and similar arrangements and procedures.
In summation of the above description, the present invention herein enhances the performance than the conventional structure and further complies with the patent application requirements and is submitted to the Patent and Trademark Office for review and granting of the commensurate patent rights.
