Number | Name | Date | Kind |
---|---|---|---|
6131182 | Beakes et al. | Oct 2000 | A |
6184711 | Graef et al. | Feb 2001 | B1 |
6286126 | Raghavan et al. | Sep 2001 | B1 |
6363516 | Cano et al. | Mar 2002 | B1 |
6378109 | Young et al. | Apr 2002 | B1 |
6446239 | Markosian et al. | Sep 2002 | B1 |
6499131 | Savithri et al. | Dec 2002 | B1 |
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Mark Basel, Ph. D., “Accurate and Efficient Extraction of Interconnect Circuits for Full-Chip Timing Analysis,” IEEE, 1997, pp. 118-123.* |
Huang et al., “Improving the Accuracy of On-Chip Parasitic Extraction,” IEEE, 1997, pp. 42-45.* |
Ferreira et al., “Lasca—Interconnect Parasitic Extraction Tool for Deep-Submicron IC Design,” IEEE, 2000, pp. 327-332. |