The present invention relates to a step-down controller circuit, in particular to a step-down controller circuit having an input having a first and a second input terminal for the purpose of applying an input voltage, an output having a first and a second output terminal at which an output voltage can be provided, a series circuit comprising a switch and an inductance which is coupled between the first input terminal and the first output terminal, the switch having a control input for the purpose of applying a control signal, and a first diode which is coupled between the junction point between the switch and the inductance and a reference potential such that, when the inductance is freewheeling, a current flow through the first diode is possible.
Such a circuit known from the prior art is illustrated in
The problem on which the invention is based will be described in the text which follows with reference to the step-down controller circuit illustrated in
Starting from the generic step-down controller circuit, the present invention is therefore based on the object of providing a step-down controller circuit which is characterized by improved EMIR and by a lower power loss.
The present invention is based on the knowledge that it is possible to improve EMIR by means of a flatter edge of the voltage across the diode D1. It is possible to improve the power loss by delayed charging of a snubber capacitor Ccent. In order to implement this idea, the generic step-down controller circuit also comprises a snubber network having the above mentioned snubber capacitor Ccent, a second diode D2, a third diode D3 and an auxiliary inductance LH. In this case, a series circuit comprising the snubber capacitor, the third diode and the auxiliary inductance is coupled in parallel with the inductance. The following embodiments are true for
When the switch S1 is closed, a current flows in the circuit Ccent, D3, LH, driven by the voltage difference Ue−Ua. Owing to this circuitry, the current rise when the switch S1 is turned on is braked by the inductance LH. As a result of the fact that the second diode is coupled with its first terminal to the reference potential and with its second terminal to the junction point between the snubber capacitor and the third diode, the second diode being polarized, as the first diode, with respect to the reference potential, and the third diode being polarized with respect to the second diode such that a current flow through a series circuit comprising the second diode and the third diode is possible, initially a current flow via LT, Ca, D2 and Ccent is made possible when the switch S1 is turned off. As soon as Ccent has been charged, the current flows via D2, D3, LH. The energy contained in the snubber transistor Ccent is thus not converted into power loss in the switch S1 but is used for charging the output circuit.
In a preferred embodiment, a fourth diode is arranged in parallel with the snubber capacitor, the fourth diode being oriented with respect to the second diode such that a current flow through a series circuit comprising the second diode and the fourth diode is possible. Owing to a fourth diode arranged in this way, a pronounced negative undershoot of the voltage across the cathode of the first diode and a peak charge current through the snubber capacitor Ccent, which can cause faults when detecting the current value and as a result during current regulation, are reduced. The introduction of the fourth diode results in the parasitic inductances Lpar not being magnetized immediately on commutation since the current flows via the second diode D2, the snubber transistor Ccent and the fourth diode D4. This embodiment is therefore characterized by a lower negative undershoot which results in less EMIR. A further advantage of this embodiment consists in it being possible to position the power semiconductors S1 and D1 more freely. Since the parasitic inductances Lpar do not need to be magnetized quickly, they can assume larger values. It is thus also possible for the feed line to D1 to be longer.
The cause of the lower negative undershoot is as follows: once the switch S1 has been opened, as a result of the parasitic inductances Lpar in the diode path of the diode D1, initially, for example, for approximately 100 Nos a current is connected via the series circuit comprising the diodes D2 and D4. Subsequently, i.e. if the parasitic inductance Lpar has been magnetized, the current changes over to the diode path of the diode D1. The reason for this lies in the dimensions of the diodes D1, D2, D4 which are in this case selected such that the on time of the diode D1 is approximately a factor of 10 over the on time of the diodes D2 and D4.
In the embodiments described above, a shunt resistor for the purpose of detecting the current is preferably arranged between the second output terminal and the point at which the second diode is coupled to the reference potential. The shunt resistor Rshe is required for driving the switch S1 via its control input St. In this case, control takes place using the current, i.e. if the current increases above a specific value, the switch S1 is turned off until the current driven by the inductance LT has fallen back to zero; the switch S1 is then turned on again.
A further embodiment is characterized by the fact that the current detection now takes place in the load circuit, i.e. the output capacitor has a first and a second terminal, the first terminal being coupled to the first output terminal, and the shunt resistor being arranged between the second terminal of the output capacitor and the second output terminal. Owing to this arrangement, faults in the current detection owing to the charge current peaks during charging of Ccent and LT are prevented. However, this positioning is unfavorable as regards dynamic current regulation.
With such an arrangement of the shunt resistor, the current flow through the switch S1 is not measured without error. In this case, two consequences result: the switch S1 may become faulty if it is turned on for too long. Secondly, it is only possible with great difficulty to respond to changes in the operating parameters of a lamp connected to the output terminals by driving the control input St. of the switch S1 on the basis of a current measurement carried out using a shunt resistor arranged in this way.
A particularly advantageous embodiment is characterized by the fact that it also comprises a filter capacitor CF and a filter inductance LF, the filter inductance LF being arranged in series with the auxiliary inductance LH between the filter inductance LF and the first output terminal, and the filter capacitor CF being arranged between the junction point between the auxiliary inductance LH and the filter inductance LF and the reference potential. By introducing a filter capacitor CF, the current flow for the purpose of charging the snubber capacitor Ccent via the shunt resistor Rshe is prevented. The current flows via the filter capacitor CF and thus past the shunt resistor Rshe. The energy stored in the filter capacitor CF is fed into the load circuit as a low direct current via the filter inductance LF. Alternatively, the energy stored in the filter capacitor can be supplied via an additional circuit, in particular via a series regulator, to a control circuit which provides the control signal for the switch S1.
Further advantageous embodiments are described in the sub claims.
Exemplary embodiments of the invention will now be described in more detail below with reference to the attached drawings, in which:
Components which have already been introduced and explained in connection with the illustration of the prior art shown in
In the exemplary embodiment illustrated in
Reference is made to the fact that in this case the output voltage Ua is less than or equal in value to half the input voltage Ue.
In the exemplary embodiment illustrated in
In the embodiment illustrated in
Number | Date | Country | Kind |
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10 2004 050 060 | Oct 2004 | DE | national |
Number | Name | Date | Kind |
---|---|---|---|
4734636 | Stevens | Mar 1988 | A |
4760324 | Underhill | Jul 1988 | A |
4857822 | Tabisz et al. | Aug 1989 | A |
5262930 | Hua et al. | Nov 1993 | A |
5815386 | Gordon | Sep 1998 | A |
5923153 | Liu | Jul 1999 | A |
5923547 | Mao | Jul 1999 | A |
6051961 | Jang et al. | Apr 2000 | A |
6259235 | Fraidlin et al. | Jul 2001 | B1 |
6525513 | Zhao | Feb 2003 | B1 |
6580259 | Liu et al. | Jun 2003 | B2 |
6710582 | Watanabe | Mar 2004 | B2 |
Number | Date | Country | |
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20060076942 A1 | Apr 2006 | US |