BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 is an explanatory figure showing the overall concept of a storage system according to an embodiment of the present invention;
FIG. 2 is an explanatory figure showing the overall structure of this storage system;
FIG. 3 is an explanatory figure showing the storage structure of a cache memory;
FIG. 4 is an explanatory figure showing the storage structure of a memory and a storage unit;
FIG. 5 is a block diagram showing the structure of a controller;
FIG. 6 is a block diagram showing the state of connection when a bus switch is in a normal mode;
FIG. 7 is a block diagram showing the state of connection when, on the other hand, the bus switch is in an updating mode;
FIG. 8 is a flow chart for the processing of a command from a host;
FIG. 9 is a flow chart showing the processing for synchronizing the storage contents of the cache memory;
FIG. 10 is a flow chart showing the processing when updating a program;
FIG. 11 is a flow chart showing the updating processing in FIG. 10;
FIG. 12 is an explanatory figure showing the overall structure of a storage system according to the second embodiment;
FIG. 13 is a flow chart showing the processing when updating the program;
FIG. 14 is a an explanatory figure showing the overall structure of a storage system according to the third embodiment;
FIG. 15 is an explanatory figure showing the overall structure of a storage system according to the fourth embodiment;
FIG. 16 is a flow chart showing the processing for deciding on update execution timing; and
FIG. 17 is an explanatory figure showing the overall structure of a storage system according to the fifth embodiment.