This application is based upon and claims the benefit of priority from Japanese Patent Application No. 2011-199795, filed on Sep. 13, 2011; the entire contents of which are incorporated herein by reference.
Embodiments of the present invention described herein relate to a storage device, a controller, and a read command executing method.
With increase in speed of an initiator (host) that issues a read command targeting on a SSD (Solid State Drive) including NAND flash memory, and the like, memory having a fast data transfer speed is sometimes used for a read buffer. SRAM is suited for such memory, but the SRAM has a small storage capacity compared to DRAM. Thus, enhancement in the transfer efficiency of the readout data from the storage device such as the SSD including the read buffer having a small storage capacity is desired.
However, in a conventional read command processing technique of when a scale of the read buffer is large, the readout data is randomly stored in the read buffer when a plurality of read commands received from the initiator is executed, and thus the transfer to the initiator cannot be started until the readout data with respect to each read command are all obtained in the read buffer. Therefore, firmware (F/W) needs to constantly monitor the transfer status between the NAND flash memory and the read buffer, which occupies the MPU and affects other processes and hence the transfer efficiency cannot be enhanced.
A storage device of the embodiment includes non-volatile memory; a memory control section; a table holding section for managing a table holding an identifier, with which a read command is identifiable, a logical address of readout data corresponding to the identifier, and readout data length corresponding to the identifier based on the read command; a read issuing section for issuing the logical address and the data length for each identifier to the memory control section; a read buffer for holding data received from the non-volatile memory based on a physical address corresponding to the logical address and the data length for each identifier instructed from the memory control section along with the identifier; and an identifier queue for receiving the identifier of a number proportional to a data length of the data when the data of the logical address is received for the same identifier in the read buffer. The storage device of the embodiment further includes a transfer section for transferring the data corresponding to the identifier received in the read buffer to outside when the identifier is held as incomplete readout in the table in order from the identifier at a head of the identifier queue.
The storage device 100 includes an MPU 2, ROM 3 including EEPROM, a command I/F (interface) 4 adapted to accept the command from the initiator 1, a reservation exchange table holding section 5 to be described later, an exchange executing section 8 adapted to execute the transfer control of the readout data to the initiator 1 and rewrite of a reservation exchange table 50 (
A firmware (F/W) 20 (see
A flow of a process of a read command received from the initiator 1 in the storage device 100 will be described below using flowcharts illustrated in
The read command issued from the initiator 1 to the storage device 100 is received by the command I/F 4, and once stored in an initiator command table 40 managed by the command I/F 4 (
The firmware 20 gives a TAG (tag), which is an identifier that differs at least among the read commands simultaneously entered to the reservation exchange table 50, with respect to the read command received from the initiator 1 through the command I/F 4. In other words, the tag is uniquely determined with respect to the read command from the initiator 1. The firmware 20 grasps (analyzes) the TAG, the head LBA, the transfer length, and the command information with respect to each read command. The command information is, for example, a SAS (Serial Attached SCSI) address for identifying (command from) which initiator. If a plurality of initiators is connected to the storage device 100 through an expander (hub), from which initiator the command is issued can be identified by the SAS address.
The firmware 20 enters the read command to the reservation exchange table 50 of the reservation exchange table holding section 5 based on the above analysis result. Specifically, the TAG, the head LBA, the transfer length, and the command information of each read command to be executed on the reservation exchange table 50 are respectively stored for each TAG (step S103). The reservation exchange table 50 is responsible for a read command process in a function block on a side (hereinafter referred to as initiator side) close to the initiator 1 in the storage device 100. As illustrated in
In parallel to the above, the firmware 20 also transmits the read command same as above to the NAND command issuing section 6. Specifically, the TAG, the head LBA, and the transfer length of each read command are stored (step S104). The NAND command issuing section 6 is responsible for the readout data transfer process on the side (hereinafter referred to as NAND side) of the NAND flash memory control section 7 and the NAND flash memories 70, 71, . . . , 7n.
Step S103 and step S104 are executed on all the read commands in the initiator command table 40. The firmware 20 is not involved in the subsequent operations. A command execution process (step S105) on the initiator side is executed after step S103, and a data transfer process (step S106) on the NAND side is executed after step S104. The command execution process (step S105) on the initiator side and the data transfer process (step S106) on the NAND side are processes respectively performed in hardware.
The flow of the data transfer process on the NAND side will be described based on the flowchart of
The read buffer 11 grasps in units of sectors to what extent the readout data is received from the NAND flash memories 70, 71, . . . , 7n from the head LBA for each TAG. The management information such as the data length (number of sectors) for each TAG necessary therefor are provided beforehand from the firmware 20.
When receiving, from the NAND flash memories 70, 71, . . . , 7n, the data of the number of sectors continued in terms of the LBA starting from the head LBA for a certain TAG, the read buffer 11 sequentially stores the TAG of the number of sectors in the read buffer command issuing section 9. For instance, when receiving from the NAND flash memories 70, . . . , 7n, the data of the number of sectors (four sectors) of LBA=0 to 3 when the readout of the TAG=“A” is LBA=0 to 15 as a whole, and then receiving from the NAND flash memories 70, . . . , 7n, the readout data of TAG=“B”, the four TAG “A” are first sequentially stored in the read buffer command issuing section 9, and then, the TAG=“B” is stored in the read buffer command issuing section 9 by the number of continuously received sectors. Thereafter, if the readout data after LBA=4 of the TAG=“A” are continuously received from the NAND 70, . . . , 7n, the TAG=“A” is stored in the read buffer command issuing section 9 by the number of continuously received sectors. If the data of the head LBA of the TAG=“A” is received for one sector, then the data of the head LBA of the TAG=″B″ is received for one sector, and then the data of the LBA after one sector from the head LBA of the TAG=“A” (data continuing to the data of TAG=“A” received first) is received for one sector, the TAG is stored in the order of TAG=“A”, “B”, “A” in the read buffer command issuing section 9.
Generally, when reception of the data continued from the head LBA for a certain TAG is completed for one cluster (e.g., eight sectors), which is a minimum unit of the readout data from the NAND flash memories 70, 71, . . . , 7n, the read buffer 11 sequentially stores the TAG same as the number (e.g., eight) of sectors of the received one cluster in the read buffer command issuing section 9. For instance, if the readout data of TAG=“A” is stored for eight sectors continuously in terms of LBA in the read buffer 11, eight TAGs of “A” are sequentially stored in the read buffer command issuing section 9.
The read buffer 11 sequentially stores the TAG of the number corresponding to the number of sectors of the continuously received data in the read buffer command issuing section 9 every time the data of the number of sectors continued in terms of LBA from the head LBA of a certain TAG is received from the NAND flash memories 70, 71, . . . , 7n. If the reception from the NAND of the readout data continued in the order of LBA is interrupted for the relevant TAG, the relevant TAG is not stored in the read buffer command issuing section 9 until the readout data of the head LBA of the non-transferred readout data of the TAG is received from the NAND. Therefore, the readout data in the order of LBA among the same TAG are read transferred to the initiator 1 while maintaining the order of LBA according to a mechanism described later.
The read buffer command issuing section 9 is a FIFO type buffer (tag queue), as illustrated in
The flow of the command execution process on the initiator side will now be described based on the flowchart of
If the exchange executing section 8 is not operating (step S303: No), a comparing unit 53 searches for the TAG, in which the actual registration request is made, from the reservation exchange table 50. Specifically, the comparing unit 53 searches for that in which the TAG, in which the actual registration request is made, is entered in the reservation exchange storing unit 51 and the normal termination flag and the error termination flag of the reservation exchange status 52 of the TAG are both not asserted. The comparing unit 53 sets the command information of the searched TAG in the exchange executing section 8 (step S306). The exchange executing section 8 transfers the readout data of the TAG from the read buffer 11 to the data frame generating section 10, and transmits the set command information to the data frame generating section 10. The data frame generating section 10 creates the data frame based on the readout data transmitted from the read buffer 11 and the command information from the exchange executing section 8, and transfers the same to the initiator 1 (read data transfer) (exchange execution: step S307).
If the exchange executing section 8 is operating (step S303: Yes), the comparing unit 53 determines whether or not the TAG in which the actual registration request is made is the same as the TAG being exchange executed (step S304). If the TAGs are the same (step S304: Yes), the read data transfer of the same TAG is continuously carried out based on the command information being executed (step S307). If the TAG of the actual registration request is different from the TAG being exchange executed (step S304: No), the head LBA and the transfer length in the reservation exchange storing unit 51 of the TAG being exchange executed are updated. Specifically, “head LBA” is rewritten to the LBA at the head of the non-transferred sector excluding the sectors transferred up to now, and “transfer length” is rewritten to the number of non-transferred sectors. In other words, the rewrite (feedback) of the reservation exchange table 50 is carried out with the interruption of the exchange with respect to the TAG being executed (step S305). After step S305, the comparing unit 53 searches for the command information of the TAG of the actual registration request from the reservation exchange storing unit 51 and sets the same in the exchange executing section 8 (step S306). The readout data of the TAG is transferred to the initiator 1 as the data frame (step S307).
Whether or not the transfer of the final sector of the readout data of the TAG is completed is determined every time the readout data of each TAG is transferred to the initiator 1 in units of sectors in step S307 (step S308), where the arrival of the next actual registration request is waited (step S302) if not completed (step S308: No). If the transfer of the final sector of the TAG in which the readout data is transferred to the initiator 1 is completed in step S308, that is, when the transfer length of the non-transferred sector of the TAG becomes 0 (step S308: Yes), the exchange being executed is completed and fed back to the reservation exchange table 50 (step S309). Specifically, the normal termination flag of the TAG of the reservation exchange status 52 is asserted. Alternatively, the entry of the TAG may be deleted from the reservation exchange table 50. If an error occurs in one of the process of the above procedure, for instance, if the data readout from the NAND flash memories 70, 71, . . . , 7n fails or if the initiator 1 and the storage device 100 are disconnected, the error termination flag of the reservation exchange status 52 of the TAG is asserted.
In the conventional read command processing technique, when a plurality of read commands identified by the TAG=“A”, “B”, “C” received from the initiator 1 in
According to the read command executing method of the storage device 100 of the present embodiment, on the other hand, the read data transfer to the initiator 1 is enabled, as illustrated in the timing chart of
In the present embodiment, efficient read data transfer can be carried out, similar to the first embodiment, since from which initiator 31, 32, . . . , 3n the read command is from can be identified by the SAS address, which is the command information of the reservation exchange storing unit 51 of the reservation exchange table 50. In other words, the transfer distribution of the readout data corresponding to the read command to the respective port (initiator) can be enabled.
However, for example, if one of the ports and the initiators are disconnected, the reservation exchange table holding section 5 temporarily stops the reception of the actual registration request based on the command information (SAS address) corresponding to the actual registration request (TAG) with respect to the actual registration request (read buffer command) from the read buffer command issuing section 9 corresponding to the read command from the initiator connected to the port, so that the processing of the read command from the initiator other than the relevant port can be executed without any problems.
As described above, according to the first and second embodiments, the efficient transfer of the readout data can be enabled in the small scale read buffer without the firmware monitoring the transfer status between the NAND flash memory and the read buffer.
While certain embodiments have been described, these embodiments have been presented by way of example only, and are not intended to limit the scope of the inventions. Indeed, the novel embodiments described herein may be embodied in a variety of other forms; furthermore, various omissions, substitutions and changes in the form of the embodiments described herein may be made without departing from the spirit of the inventions. The accompanying claims and their equivalents are intended to cover such forms or modifications as would fall within the scope and spirit of the inventions.
Number | Date | Country | Kind |
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2011-199795 | Sep 2011 | JP | national |