Claims
- 1. A method of processing data, comprising the steps of:storing data retrieved by a controller from a memory of a storage device using a register in said storage device; retrieving an area management information corresponding to the data using a converter in said storage device; converting the area management information into an area management flag having redundant information bits for error correction; and writing the area management flag into said memory.
- 2. The method according to claim 1, further comprising a step of detecting and correcting errors in the data stored in said register using an error correction code unit.
- 3. The method according to claim 1, further comprising a step of detecting and correcting errors in said area management flag when the redundant information bits are not the same using an error correction unit connected to said converter.
- 4. The method according to claim 1, wherein said memory is a flash memory comprised of a plurality of blocks; each block being comprised of plural pages.
- 5. A data processing system, comprising: a storage device for processing data stored in a memory of the storage device, comprising:a register for storing data retrieved by a controller from said memory; a converter for retrieving an area management information corresponding to the data and converting the area management information into an area management flag having redundant information bits for error correction; and a controller for writing the area management flag into said memory; and a data processing device for retrieving data and the area management flag stored in the memory of the storage device, and processing retrieved data in accordance with the corresponding area management flag.
- 6. The data processing system according to claim 5, wherein the storage device further comprises an error correction code unit for detecting and correcting errors in the data stored in said register.
- 7. The data processing system according to claim 5, wherein the storage device further comprises an error correction unit connected to said converter for detecting and correcting errors in said area management flag when the redundant information bits are not the same.
- 8. The data processing system according to claim 5, wherein said memory is a flash memory comprised of a plurality of blocks; each block being comprised of plural pages.
Priority Claims (1)
Number |
Date |
Country |
Kind |
P9-267172 |
Sep 1997 |
JP |
|
Parent Case Info
This application is a continuation of U.S. application Ser. No. 09/162,327, filed Sep. 28, 1998, now U.S. Pat. No. 6,460,145.
US Referenced Citations (10)
Foreign Referenced Citations (5)
Number |
Date |
Country |
3 541 115 |
May 1987 |
DE |
0 597 706 |
May 1994 |
EP |
0 669 751 |
Aug 1995 |
EP |
2 687 811 |
Aug 1993 |
FR |
2 730 833 |
Aug 1996 |
FR |
Continuations (1)
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Number |
Date |
Country |
Parent |
09/162327 |
Sep 1998 |
US |
Child |
10/215901 |
|
US |