This application claims priority of Chinese Patent Application No. 201310050840.4, filed on Feb. 8, 2013, the entire contents of which are incorporated by reference herein.
The present invention relates to the field of integrated circuits and computers, and in particular to a storage structure and information storage, retrieving, addressing method.
Memory is the storage element of a computer system, in which program and data are kept, all the information in a computer, including raw data input, the computer program, intermediate results and final operation results are stored in memory. It stores and reads out information at its storage location specified by the controller. A computer functions only with memory.
Thus, information storage is essential to a computer system. Meanwhile, in order to realize its value, information has to be addressed and retrieve after its storage. Two points are crucial, for information storage technology, the first being the storage space required, as it ties the cost of the computer; the second being the addressing and retrieving speed, as it ties to the operation speed of the computer, a measure of the computer performance.
Therefore, a storage processing structure and method of information storage, retrieving, and addressing that satisfy the points afore mentioned have always been the pursuit.
The purpose of the present invention is to provide a storage processing structure and method for information storage, retrieving, and addressing of the information in order to lower the storage space required for information storage, while also increasing the speed of retrieving and addressing the information.
This disclosure discloses a storage processing structure including: a first storage table, a second storage table and comparators, wherein: the first storage table comprises plurality storage elements organized in an array, the storage elements on each row stores information in a sequential order; the second storage table comprises plurality storage elements organized in an array, the second storage table has a same number of rows and columns as the first storage table, a memory element in the second storage table stores a representative value of the corresponding memory element in the first storage table; and the comparators compare newly arrived representative values with the representative values stored in the second storage table, the first storage table outputs the information corresponding to the newly arrived representative value based on the comparison result.
Optionally, the comparator compares the newly arrived representative value with the representative values stored in a row of the second table in parallel, and outputs a comparison result indicating “larger than”, “equal to” or “less than”; or indicating “larger than or equal” and “less than”; and a column address corresponding to the newly arrived representative value is acquired by monitoring different comparison results of adjacent comparators.
Optionally, information stored in the first storage table is data or instructions.
Optionally, information is stored using address, the address comprises a row address and a representative value; the information is stored in a first available memory element in a first storage table row indexed by a row address; and the representative value is stored in a corresponding second storage table element.
Optionally, the address of the information to be stored is stored in the first storage table.
Optionally, information is retrieved using address, the address comprises a row address and a representative value; the comparators compares the representative value in the address with representative values stored in a second storage table row indexed by the row address to generate a column address; and the first storage table outputs information in the memory element indexed by the row address and the column address.
Optionally, the column address of the larger representative value is selected as the column address corresponding to the representative value of the retrieving address if the representative value falls between two representative values of two adjacent columns of the second storage table; or the column address of the first column is selected as the column address corresponding to the representative value of the retrieving address if the representative value falls before the representative value of the first column of the second storage table; or a last column address plus one is selected as the column address corresponding to the representative value of the retrieving address if the representative value falls after the representative value of the last column of the second storage table.
Optionally, the column address of the smaller representative value is selected as the column address corresponding to the representative value of the retrieving address if the representative value falls between two representative values of two adjacent columns of the second storage table; or the column address of the first column minus one is selected as the column address corresponding to the representative value of the retrieving address if the representative value falls before the representative value of the first column of the second storage table; or the last column address is selected as the column address corresponding to the representative value of the retrieving address if the representative value falls after the representative value of the last column of the second storage table.
Optionally, the address of the addressing information includes a row address and a representative value; the comparators compare the representative values with the representative values stored in the second storage table to acquire a column address; and the row address and the column address are recorded for subsequent addressing.
Optionally, the representative value is retrieved from the second storage table based on the recorded row address and column address.
Optionally, the row address and column address are recorded in the first storage table.
Optionally, the structure further includes a third storage table, wherein the row address and column address are recorded in the third storage table.
Optionally, the column address of the larger representative value is selected as the column address corresponding to the representative value of the retrieving address if the representative value falls between two representative values of two adjacent columns of the second storage table; or the column address of the first column is selected as the column address corresponding to the representative value of the retrieving address if the representative value falls before the representative value of the first column of the second storage table; or the last column address plus one is selected as the column address corresponding to the representative value of the retrieving address if the representative value falls after the representative value of the last column of the second storage table.
Optionally, the column address of the smaller representative value is selected as the column address corresponding to the representative value of the retrieving address if the representative value falls between two representative values of two adjacent columns of the second storage table; or the column address of the first column minus one is selected as the column address corresponding to the representative value of the retrieving address if the representative value falls before the representative value of the first column of the second storage table; or the last column address is selected as the column address corresponding to the representative value of the retrieving address if the representative value falls after the representative value of the last column of the second storage table.
Optionally, the first storage table is a track table, a memory element of the track table stores a track address of a branch target instruction of a branch instruction stored in a memory, and a number of column of the track table is less than a number of instructions each memory row stores; and the second storage table is a mapping table, a memory element of the mapping table stores a representative value, which is the offset address of the branch instruction in the memory corresponding to a mapping table memory element.
Optionally, the row address corresponds to block address of instructions stored in the memory.
Optionally, the information stored in the memory element of the table includes memory address of memory element other than that of the track table.
Optionally, providing a first storage table and a second storage table, wherein the first storage table comprises plurality storage elements organized in an array, the second storage table comprises plurality storage elements organized in an array, the second storage table has a same number of rows and columns as in the first storage table; and acquiring an address of information being stored, the address comprises a row address and a representative value, wherein the information is stored in the first available memory element in the first storage table row indexed by the row address, wherein the memory element in the second storage table stores a representative value of the corresponding memory element in the first storage table.
Optionally, the first storage table stores the address of the information being stored.
Optionally, acquiring original content of the information being stored, wherein the original content comprises a row address and a representative value; providing comparators, wherein the comparators compare the representative value in the original value and the representative values stored in the second storage table to acquire a corresponding column address, wherein the first storage table stores the row address and the column address of the information being stored.
Optionally, the column address of the larger representative value is selected as the column address corresponding to the representative value of the original content if the representative value falls between two representative values of two adjacent columns of the second storage table; or the column address of the first column is selected as the column address corresponding to the representative value of the original content if the representative value falls before the representative value of the first column of the second storage table; or the last column address plus one is selected as the column address corresponding to the representative value of the original content if the representative value falls after the representative value of the last column of the second storage table.
Optionally, the column address of the smaller representative value is selected as the column address corresponding to the original content of the retrieving address if the representative value falls between two representative values of two adjacent columns of the second storage table; or the column address of the first column minus one is selected as the column address corresponding to the representative value of the original content if the representative value falls before the representative value of the first column of the second storage table; or the last column address is selected as the column address corresponding to the representative value of the original content if the representative value falls after the representative value of the last column of the second storage table.
This disclosure also discloses an information storage method. The method includes providing a first storage table, a second storage table and comparators, wherein the first storage table comprises plurality storage elements organized in an array, and storage elements on each row of the first storage table stores information in a sequential order; wherein the second storage table comprises plurality storage elements organized in an array, the second storage table has a same number of rows and columns as in the first storage table, and a memory element in the second storage table stores a representative value of the corresponding memory element in the first storage table; retrieving an address of information to be read, wherein the address comprises of a row address and a representative value; comparing, by comparators, the representative value of the retrieved address with the representative values stored in the second storage table to acquire a column address; and outputting, by the first storage table, the information corresponding to the row address in the retrieving address and the column address.
Optionally, the column address of the larger representative value is selected as the column address corresponding to the representative value of the retrieving address if the representative value falls between two representative values of two adjacent columns of the second storage table; or the column address of the first column is selected as the column address corresponding to the representative value of the retrieving address if the representative value falls before the representative value of the first column of the second storage table; or the last column address plus one is selected as the column address corresponding to the representative value of the retrieving address if the representative value falls after the representative value of the last column of the second storage table.
Optionally, the column address of the smaller representative value is selected as the column address corresponding to the representative value of the retrieving address if the representative value falls between two representative values of two adjacent columns of the second storage table; or the column address of the first column minus one is selected as the column address corresponding to the representative value of the retrieving address if the representative value falls before the representative value of the first column of the second storage table; or the last column address is selected as the column address corresponding to the representative value of the retrieving address if the representative value falls after the representative value of the last column of the second storage table.
This disclosure further discloses an information retrieving method, including: providing a first storage table, a second storage table and comparators, wherein the first storage table comprises plurality storage elements organized in an array, storage elements on each row of the stores information in sequential order; wherein the second storage table comprises plurality storage elements organized in an array, the second storage table has a same number of rows and columns as in the first storage table, and a memory element in the second storage table stores a representative value of the corresponding memory element in the first storage table; acquiring an address of information to be read, wherein the address comprises of a row address and a representative value; comparing, by the comparators, the representative value of the information address with the representative values stored in the second storage table to acquire a column address; outputting, by the first storage table, the information corresponding to the row address in the retrieving address and the column address; and recording the row address and the column address for subsequent addressing.
Optionally, the representative value is retrieved from the second storage table based on the recorded row address and column address.
Optionally, the row address and column address are recorded in the first storage table.
Optionally, the method further comprises a third storage table; the row address and column address are recorded in the third storage table.
Optionally, the column address of the larger representative value is selected as the column address corresponding to the representative value of the retrieving address if the representative value falls between two representative values of two adjacent columns of the second storage table; or the column address of the first column is selected as the column address corresponding to the representative value of the retrieving address if the representative value falls before the representative value of the first column of the second storage table; or the last column address plus one is selected as the column address corresponding to the representative value of the retrieving address if the representative value falls after the representative value of the last column of the second storage table.
Optionally, the column address of the smaller representative value is selected as the column address corresponding to the representative value of the retrieving address if the representative value falls between two representative values of two adjacent columns of the second storage table; or the column address of the first column minus one is selected as the column address corresponding to the representative value of the retrieving address if the representative value falls before the representative value of the first column of the second storage table; or the last column address is selected as the column address corresponding to the representative value of the retrieving address if the representative value falls after the representative value of the last column of the second storage table.
A storage processing structure, a method of information storage, retrieving, and addressing are provided. The storage processing structure, the method of information storage, retrieving, and addressing employ a first storage table, a second storage table and comparators. Each line of the first storage table stores information in sequential order to reduce the storage space requirement; the corresponding memory elements of the second storage table stores a representative value, this value can then be used to retrieve or address the information from the first storage table, to improve the speed of information retrieving and addressing.
a illustrates a schematic diagram of an exemplary implementation for a storage structure consistent with the disclosed embodiment 1;
b illustrates an alternative schematic diagram of an exemplary implementation for a storage structure consistent with the disclosed embodiment 1;
a illustrates the storage format comparison of existing memory and the memory structure of this invention;
b illustrates an alternative of the storage format comparison of existing memory and the memory structure of this invention;
Reference will now be made in detail to exemplary embodiments of the invention, which are illustrated in the accompanying drawings. The same reference numbers may be used throughout the drawings to refer to the same or similar parts. It is understood that the various components are listed for illustrative purposes, other components may be included and certain components may be combined or omitted.
a illustrates a schematic diagram of an exemplary implementation for a storage structure consistent with the disclosed embodiment 1. As shown in
In this embodiment, the first storage table 10 is illustrated in a 4×4 configuration, that is the said first storage table 10 has 4 rows and 4 columns, with a total of 16 memory cells; similarly, the said second storage table 11 has the same 4×4 structure.
Please refer to
Memory A of
Please refer to
It should be noted that in this and other embodiments of the present application, the representative value and BNY represent the same concept, the row address and BNX represent the same concept, the column address and MBNY represent the same concept. Here the row address and the representative value are the row address and the column address of the current memory, (i.e. memory A in
Please refer back to FIG 1a. When information is being stored in this embodiment, it addresses a row of the first storage table 10 with the BNX value of the information, and writes the information into the first unoccupied cell on that row. Representative value BNY of the information is written into the corresponding memory cell in the second storage table 11 (i.e. the memory cell in the second storage table 11 is addressed by the same BNX and MBNY as the memory cell in first storage table 10), and thus completes the information storage.
Specifically, there is a write pointer pointing to the first unoccupied memory cell in each row of the first storage table 10 (initially the write pointer points to the first memory cell of the row). During information store, the information is stored into the memory cell pointed by the write pointer, then the write pointer moves to the next sequential memory cell, and thus implements “write the information into the first unoccupied cell on that row.”
In this embodiment, the address of the information retrieving is given as BNX and BNY. It is necessary to map the BNY into the MBNY so the corresponding information can be retrieved from the first storage table 10. Specifically, when retrieving information, the BNY value of the information address (BNX, BNY) are compared with BNY values stored in the second storage table 11, to acquire the corresponding MBNY value, the resulting address (BNX, MBNY) is sent to the first storage table 10. The first storage table 10 outputs the information addressed by (BNX, MBNY), and thus completes the information retrieving. This embodiment provides two types of correlations between the BNY value and the MBNY value:
1. Selecting the column address of the larger representative value as the column address corresponding to the representative value of the retrieving address if the said representative value falls between two representative values of two adjacent columns of the said second storage table; or
selecting the column address of the first column as the column address corresponding to the representative value of the retrieving address if the said representative value falls before the representative value of the first column of the said second storage table; or
selecting the last column address plus one as the column address corresponding to the representative value of the retrieving address if the said representative value falls after the representative value of the last column of the said second storage table.
2. Selecting the column address of the smaller representative value as the column address corresponding to the representative value of the retrieving address if the said representative value falls between two representative values of two adjacent columns of the said second storage table; or
selecting the column address of the first column minus one as the column address corresponding to the representative value of the retrieving address if the said representative value falls before the representative value of the first column of the said second storage table; or
selecting the last column address as the column address corresponding to the representative value of the retrieving address if the said representative value falls after the representative value of the last column of the said second storage table.
The aforementioned are only examples of correlation between BNY and MBNY, other correlations are also allowed. This application sets no limit on the types of correlations.
The aforementioned two correlations can be further explained with respect to
Accordingly, this embodiment further illustrates the way that the BNY value is mapped to correspond to the MBNY value through employing comparators. Please refer to
In addition, for correlation 2, refer to FIG lb, the comparator 13 comprise 4 comparing units and 4 exclusive OR gates. The function of the comparator here is to detect from the second storage table row indexed by the BNX, the column number (MBNY) of the last BNY which is less than the BNY of the retrieving address. The functionality of the 4 comparing units in comparator 13 is similar to that of the comparator 12 in
In Embodiment 2, BNX and MBNY are employed as information retrieving address, wherein, BNY is translated prior to MBNY (e.g.: during the information store) and stored in the third storage table 23. The process of the said BNY translation to MBNY is the same as the described in embodiment 1, and therefore not repeated herein. In this embodiment 2, the MBNY value is stored in the third storage table 23 after translated from the corresponding BNY, by the time of information retrieving, the MBNY value stored in the third storage table 23 can be used to directly address the first storage table 20, by providing BNX and MBNY, and the said first storage table 20 outputs the corresponding information. It takes less time for embodiment 2 storage structure retrieving information comparing to that of embodiment 1. This is due to skipping the process of translating BNY to MBNY during retrieving. The MBNY can be directly accessed, and therefore, reduce the information retrieving time.
In embodiment two, it is capable of retrieving information from the first storage table 20 via another address which corresponds to the third storage table 23. For example, address of first storage table 20 (BNX, MBNY) can be retrieved from the third storage table 23 indexed by the another address, the said address of first storage table 20 then indexes the first storage table 20 to retrieve the information.
In addition, mapping of address BNX, MBNY into address BNX, BNY can be implemented through using the MBNY stored in a line in the third storage table 23 indexed by the BNX, the BNX, MBNY then indexes the second storage table 11 to retrieve the BNY value. The resulting BNX and BNY can be used to address a prior part (uncompressed) storage table.
The difference between embodiment 3 and embodiment 1 is that the information stored in the first storage table 30 includes representative value, which is the BNX and BNY of the information being retrieved. During information retrieving, it translates the BNX, BNY address into BNX, MBNY address in the same way as in embodiment 1. The BNX and MBNY addresses the first storage table 30, retrieving the BNX and BNY address stored in 30. This new BNX, BNY is subsequently translated into a new BNX, MBNY, which addresses the first storage table 30 again to retrieve the next information.
The difference between embodiment 4 and embodiment 2 is the content stored in the first storage table 40 is MBNY, that is the BNX and MBNY of the information being retrieved. During information retrieving, using BNX and MBNY address indexes the first storage table 40, retrieving the BNX and MBNY address stored in 40. This new BNX, MBNY subsequently addresses the first storage table 30 again to retrieve the next information. This way is faster in retrieving information comparing to the method employing BNX, BNY described in embodiment 3, because the process translating BNY to MBNY is skipped.
Specifically, the information stored in each memory cell of the first storage table 40 includes an address comprises BNX and MBNY, which points to a memory cell which stores the next piece of information. Hereon, named the information address original source address which comprises in the format of source BNX, source BNY, name the information address which indexes the first storage table 40 mapped source address in the format of source BNX, source MBNY. Further named the information address stored in one memory cell which points to another memory cell the original target address in the format of target BNX, target BNY, and name the information address which indexes the first storage table 40 mapped target address in the format of target BNX, target MBNY. When writing new information into a first storage table 40 line, mapped the information address into the mapped target address as afore described, then store the said mapped target address into the first un-occupied memory line in a first storage table 40 line which is indexed by the original source address BNX, then store the original source address BNY into the second storage table 41 cell corresponding to the said first un-occupied memory cell in the first storage table.
During information retrieving, the mapped source address (source BNX, source MBNY) retrieves information from the said first storage table 40. The said information comprises target address (target BNX, target MBNY) which points directly to the memory cell which contains the next piece of information. Therefore, the structure retrieves information through information stored in another memory cell without mapping. In addition, this track address not only point to this storage table, but also can point to other storage table. There is no limitation for track address point to which storage table.
In addition, the said track address can address not only the afore mentioned storage tables, but other types of storage tables. This disclosure does not limit the scope of which.
In this embodiment 4, MBNY can be mapped to BNY through addressing the second storage table 41 with BNX, MBNY, the BNY is in the retrieved memory cell content.
The resulting BNX, BNY can be used to retrieve information from uncompressed storage table. That is to say the branch instruction information stored in the afore mentioned first storage table 40 is the track address of the branch target instruction stored in another storage device/storage structure/storage table. This track address points to the next instruction. This track address can address other track table/storage table besides addressing this track table/storage themselves, this disclosure does not limit the scope. In summary, the storage processing structure, information storage, retrieve and addressing method disclosed by this application reduces the memory space requirement through store information in sequential order in the first storage table; and addresses and retrieves information utilizing the representative value stored in the corresponding memory cell of the second storage table, and therefore improve the speed of information retrieving and addressing.
The embodiments disclosed herein are exemplary only and not limiting the scope of this disclosure. Without departing from the spirit and scope of this invention, other modifications, equivalents, or improvements to the disclosed embodiments are obvious to those skilled in the art and are intended to be encompassed within the scope of the present disclosure.
Number | Date | Country | Kind |
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201310050840.4 | Feb 2013 | CN | national |
Filing Document | Filing Date | Country | Kind |
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PCT/CN2014/071808 | 1/29/2014 | WO | 00 |