Patent Application
20060053325
A processing system consumes power as it operates. For example, a processing system associated with a mobile computer might consume power from a battery. As the performance of a processing system is improved (e.g., by increasing the speed of the processor, allowing wireless communication, providing a larger display, and/or executing more complex applications), the amount of power consumed by the processing system may increase. As a result, a battery may need to be re-charged more frequently, which might be annoying for a user. Note that increasing the size of the battery might be impractical (e.g., because it would make a mobile computer too large).
To conserve power, a processing system may have a number of different power states. For example, the processing system might operate in a higher-power state when it is actively being used and in a lower-power state during periods of relative inactivity. In some case, however, the processing system may be unavailable while it transitions from a lower-power state to a higher-power state (e.g., it might take twenty seconds to complete the transition). Such a delay might be inconvenient for a user. Moreover, the delay might be inappropriate for some applications, such as a Voice Over Internet Protocol (VoIP) telephone (e.g., because a user may not want to wait ten seconds before he or she is able to make a telephone call).
Some embodiments described herein are directed to a “processing system.” As used herein, the phrase “processing system” may refer to any apparatus that includes one or more processors. Examples of processing systems include a desktop Personal Computer (PC), a mobile computer, a workstation, a server, a set top box (e.g., associated with a digital television receiver), a wireless telephone, a consumer electronic device, and a game system.
For example,
The processor 110 may store system information in a volatile memory device 120 as it executes the operating system and applications. The volatile memory device might be, for example, a system Random Access Memory (RAM) device. Note that when in an “idle” state, the processing system 100 may need to periodically “refresh” the volatile memory to ensure that information will not be lost. The processor 110 may also store and retrieve information from a hard disk drive 130 (e.g., the processor 110 might retrieve an MP3 file from the hard disk drive 130).
To conserve power, the processing system 100 might be able to operate in a number of different power states. For example, the processing system 100 might operate in a higher-power state when it is actively being used and in a lower-power state during periods of relative inactivity. While in a lower-power state, for example, the processor 100, various buses, and/or other devices might be turned off.
To reduce the amount of power being consumed when in a lower-power state, the processing system 100 might stop refreshing the volatile memory 120. That is, any information stored in the volatile memory 120 would be lost when processing system 100 transitions to the lower-power state. As a result, when the processing system 110 returns to the higher-power state it might be unable to return to the same state that existed when the lower-power state was originally entered.
By way of example, consider a user who executes a word processing application on a mobile computer and begins to create a document. If the user leaves mobile computer for an extended period of time, the mobile computer may enter a lower-power state (e.g., after no input from the user has been received for five minutes). When the user returns, the mobile computer may transition back to the higher-power state. Because the system RAM was not refreshed while in the lower-power state, however, the mobile computer might not re-execute the word processing application and/or the information in the document might be lost.
To prevent such a result, system information may be copied from the volatile memory 120 to the hard disk drive 130 when the lower-powered state is entered (e.g., just before entering the lower power state and the volatile memory 120 refresh is stopped). In this case, the system information can be copied from the hard disk drive 130 back to the volatile memory 120 when the higher-power state is re-entered (e.g., and the state of the processing system 100 may be preserved).
Note that this approach may increase the amount of time it takes for the processing system 100 to transition back to the higher-power state. For example, it might take twenty seconds to copy the system information from the hard disk drive 130 back to the volatile memory 120. Such a delay might be annoying and inconvenient for a user. Moreover, the delay might make the processing system 100 inappropriate for some applications (e.g., a VoIP telephone).
To conserve power, the processing system 200 might be able to operate in a number of different power states. For example, the processing system 200 might operate in a higher-power state when it is actively being used and in a lower-power state during periods of relative inactivity.
According to some embodiments, the processing system 200 operates in accordance with the Advanced Configuration and Power Interface (ACPI) Specification Revision 2.0b (October, 2002). In particular, the processing system 200 might be able to operate in a number of different “sleep” states: S0 (fully operational and consuming the most power), S1 (a low wake latency sleep state after which no system context is lost); S2 (a low wake latency sleep state after which processor and system cache context needs to be restored); and S3 (a low wake latency sleep state in which all context needs to be restored except for the system information stored in the volatile memory device 220). In addition to these higher-power states, the ACPI defines a lower-power state S4 in which all system information stored in the volatile memory device 220 is lost.
According to some embodiments, the system information may be copied from the volatile memory 220 to a persistent memory device 240 when such a lower-powered state is entered (e.g., just before entering S4). The persistent memory device 240 might comprise, for example, an Electrically Erasable Programmable Read-Only Memory (EEPROM) device, such as a flash memory device (e.g., a NOR or NAND flash memory device). Note that the persistent memory device 240 is a solid state device (e.g., has no moving parts) and information may be retrieved from it significantly faster as compared to the hard disk drive 230.
Other examples of persistent memory devices include polymer-based memory devices, Magnetoresistive RAM (MRAM) devices, Ovonic Unified Memory (OUM) devices, Ferroelectric RAM (FeRAM) devices, Ferroelectric Polymer RAM (FePRAM) devices, and Resistance RAM (RRAM) devices.
At 302, it is determined that a processing system is to transition from a higher-power state to a lower-power state. In an ACPI system, for example, it may be determined that sleep state S4 will be entered after a period of relative inactivity. According to some embodiments, the lower-power state is associated with a different sleep state (e.g., S3) or a different type of power state, such as a global state, a device power state, a processor power state, and/or a performance state. Note that the ACPI specification defines global states G0 through G3, device power states D0 through D3 (and device performance states P0 through Pn within D0), and processor power states C0 through C3.
At 304, system information is copied from a volatile memory device to a persistent memory device. For example, an operating system image may be copied from system RAM to flash memory. Moreover, any user data (e.g., applications, application data, and the state of applications) are also in the system RAM and will be stored to the low-latency, persistent flash memory.
At 306, it is arranged for the processing system to transition from the higher-power state to the lower-power state. For example, the lower-power state may be entered and refreshes to a system RAM may be halted. Note that the information in the persistent memory device can be maintained without consuming power.
At 404, system information is copied from the persistent memory device back to the volatile memory device. For example, a system image (e.g., including the operating system, application context, and user data) may be copied from flash memory back to system RAM. It is then arranged for the processing system to transition from the lower-power state to the higher-power state at 406. Note that because the system information has been restored to the volatile memory device, system context information may be preserved (e.g., the processing system may resume operating in the same state that existed when the transition was previously made to the lower-power state).
To save power, the ACPI system 600 may enter a number of different power states. The various power state may represent, for example, states in which the system 600 consumes an increasingly lower amount of power and application 670 instructions are not being executed by a processor in the platform hardware 610 (e.g., ACPI sleep states S1 or S2). In other power states, the system 600 may appear to be “turned off” to a user, such as when in ACPI sleep state S3, also referred to as “suspend to RAM” and ACPI sleep state S4, also referred to as “hibernate.”
According to some embodiments, a lower-power state is defined such that the system “suspends to flash” (or to another persistent memory device). Note one or more of the elements illustrated in
Note that implementing such an approach in BIOS and/or EFI might allow for a modified S3 and/or S4 ACPI sleep state without significant changes to an existing operating system.
According to some embodiments, the following software algorithm may be used to provide power state transitions:
The following illustrates various additional embodiments. These do not constitute a definition of all possible embodiments, and those skilled in the art will understand that many other embodiments are possible. Further, although the following embodiments are briefly described for clarity, those skilled in the art will understand how to make any changes, if necessary, to the above description to accommodate these and other embodiments and applications.
Although ACPI power states have been used herein as an example, embodiments of the present invention may be associated with any type of lower-power state. Moreover, although specific components have been described as performing specific functions, any of the functions described herein might be performed by a software application, a hardware device, an operating system, a driver, and/or a BIOS.
The several embodiments described herein are solely for the purpose of illustration. Persons skilled in the art will recognize from this description other embodiments may be practiced with modifications and alterations limited only by the claims.
