BRIEF DESCRIPTION OF THE DRAWING
To fully understand the features and objects of the present invention, the accompanying drawings and the description are provided below for reference, wherein:
FIG. 1 is an enlarged view of a porous matrix of the present invention.
FIG. 2 is a current-voltage curve diagram of an over-voltage protection element of the present invention.
FIGS. 3A and 3B are respectively a front view and a side view of the over-voltage protection device according to an embodiment of the present invention.
FIG. 4 is a current-voltage curve diagram of the over-voltage protection element of FIG. 3.
FIGS. 5A and 5B are respectively a front view and a side view of an over-voltage protection device according to another embodiment of the present invention.
FIG. 6 is a current-voltage curve diagram of the over-voltage protection element of FIG. 5.
DETAILED DESCRIPTION OF THE INVENTION
The present invention proposes a structure of a transient over-voltage protection device in an embodiment. The device includes a first electrode, a second electrode, and a porous matrix connected there between. FIG. 1 is an enlarged view of the porous matrix. In FIG. 1, the black part indicates pores. The size of the pores is approximately lower than 10 μm, and the black part takes 5%-90% of the total volume of the porous matrix.
According to an embodiment of the present invention, the material of the porous matrix includes semiconductor powder and an adhesive. Before the semiconductor powder is used to manufacture the over-voltage protection device, trivalent or pentavalent elements must be mixed into the semiconductor powder, such that the semiconductor powder has P-type or N-type characteristics. It should be noted that the present invention uses either the P-type or N-type semiconductor powders, instead of using both types of semiconductor powders. Then, a firing process is performed on the semiconductor powder and the adhesive that are formulated at a predetermined proportion and well blended. Thus, the porous matrix shown in FIG. 1 is obtained. It should be noted that the semiconductor powder used in this embodiment is a silicon-based semiconductor powder SiC, and the adhesive is a glass powder, a polymer resin solution, or a combination thereof. SiC is an artificial mineral, the SiC powder is generally formed by synthesizing silicon sand with coke, and nitrogen gas is required during the synthesis. Consequently, impurities often exist in the SiC powder. Generally, the purity of the synthesized SiC powder is 98%-99.99%. Thus, the synthesized SiC itself is semiconductive. Compared with the single crystal SiC applied in the semiconductor process with a purity up to 100% (i.e., an insulator), the silicon-based semiconductor powder applied in this embodiment is much cheaper, and is more easily obtained. It should be especially noted that the types of the semiconductor powder or the adhesive applied in the present invention are not limited to the aforementioned embodiment. Persons skilled in the art can easily use other materials with the same or similar characteristics to replace the above materials to fabricate the porous matrix.
In addition, the structural strength of the porous matrix, i.e., the adhesive force among the powder, is not generated by sintering, but generated by adhering with an appropriate amount of an appropriate adhesive. Moreover, as the formed porous structure has a stacked pore size naturally formed when powders accumulate, there are only physical contacts, without chemical bonding, in the powder except for the-positions where the adhesive is used for adhering. Therefore, the porous matrix formed according to the present invention has an extremely low capacitance. As long as an adhesive with appropriate characteristics is used, the amount of the adhesive is adjusted properly to prevent the adhesive from covering all the surface of the porous matrix. In other words, since there are only physical contacts, without chemical bonding, in the powder except for the positions where the adhesive is used, although the powder itself is semiconductive, contact impedance is naturally generated in the powder. Therefore, the over-voltage protection device manufactured according to this embodiment maintains a leakage current lower than 1 μA under a certain working voltage, and thus achieves a characteristic similar to insulation.
FIG. 2 is a current-voltage curve diagram of the over-voltage protection device of the aforementioned embodiment. As shown in FIG. 2, when the cross voltage across the over-voltage protection device exceeds a breakdown voltage Vt, a transient current is generated, such that the over-voltage protection device is changed from a high impedance to a low impedance transiently, and maintains the cross voltage at a relatively low voltage value Vc, so as to protect the circuit. Moreover, according to the embodiment of the present invention, when over-voltage protection devices with different breakdown voltages are required, the porous matrix must be first fabricated differently. Several practicable methods are listed as follows: (1) changing the compactness of the pores by adjusting the proportion of the semiconductor powder to the adhesive; (2) using semiconductor powder with different grain sizes or shapes; (3) using adhesives with different characteristics, for example, glass powders with different transition temperatures or different high temperature fluidities, polymer resins with different fluidity, or a combination of glass powder and polymer resins at different relative proportions.
FIGS. 3A and 3B are respectively a front view and a side view of the over-voltage protection device 10 according to an embodiment of the present invention. The over-voltage protection device 10 includes a substrate 1, electrodes 2, 3, and a porous matrix 5. There is a gap 4 between the electrodes 2 and 3, and the porous matrix 5 is attached above the gap 4 and partially above the electrodes 2, 3.
The over-voltage protection device 10 of FIGS. 3A and 3B is manufactured through a thick-film molding process, and the manufacturing method includes the following steps: forming two electrodes 2, 3 on an aluminum oxide substrate 1; mixing a predetermined proportion of the semiconductor powder and the adhesive evenly, for example, in this embodiment, mixing 60 weight % of P-type or N-type SiC powder, 10 weight % of glass powder, and 30 weight % of ethyl cellulose resin solution with a 3-roll mill to form a material paste; then, printing the material paste above the electrodes 2, 3 and the gap there between; and finally, performing a “850° C. firing process on the material paste, such that the material paste is cured to form the porous matrix 5 attached to the aluminum oxide substrate 1. Under a working voltage of 12V, the leakage current of the over-voltage protection device 10 manufactured through the process described above is about 0.001 μA, and the capacitance is about 0.1 μF. FIG. 4 is a current-voltage current diagram of the over-voltage protection device 10 measured with a transmission line pulse (TLP) system.
FIGS. 5A and 5B are respectively a front view and a side view of an over-voltage protection device 20 according to another embodiment of the present invention. The over-voltage protection device 20 includes a substrate 11, electrodes 12, 13, and a porous matrix 14. The porous matrix 14 is attached above the substrate 11 and the electrode 12, and the electrode 13 is attached above the substrate 11 and the porous matrix 14.
The method of manufacturing the over-voltage protection device 20 includes the following steps: forming an electrode 12 on an aluminum oxide substrate 11; forming a material paste according to the method described in the previous embodiment, and then, printing the material paste on the electrode 12; then, forming an electrode 13 to partially cover the printed material paste; and finally, curing the fired material paste to form the porous matrix 14 attached to the aluminum oxide substrate 11. Thus, the over-voltage protection device 20 is completely manufactured. Under the working voltage of 12V, the leakage current of the over-voltage protection device 20 manufactured according to the aforementioned embodiment is about 0.005 μA, and the capacitance is about 0.2 μF. FIG. 6 is a current-voltage current diagram of the over-voltage protection device 20 measured with a TLP system.
To sum up, the material of the over-voltage protection device in the present invention includes unpurified semiconductor powder that is easily obtained. Thus, the material cost is greatly reduced. The over-voltage protection device is not manufactured through the conventional semiconductor manufacturing process; Thus, the manufacturing cost is greatly reduced as well. Furthermore, the over-voltage protection device of the present invention has many pores, and the k value of the air is extremely low; thus, the over-voltage protection device has a capacitance lower than 1 μF. Moreover, the over-voltage protection device of the present invention can be manufactured through the thick-film process or the laminating process. Thus, it can be easily fabricated into a system on the chip.
The technical content and features of the present invention are disclosed above. Those skilled in the art can make modifications and variations without departing from the teaching and disclosure of the present invention. Therefore, the scope of protection of the present invention shall not be limited to what is disclosed by the embodiments, but shall include all other modifications and variations not departing from the present invention, given the modifications and variations covered by the following claims.
Patent Application
20080081226
