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"Quality of Design from an Automatic Logic Generator (ALERT)" by T. D. Friedman et al., IEEE 7th Design Automation Conference, 1970, pp. 71-89. |
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"Hierarchical Logic Synthesis System for VLSI" by I. Matsumoto et al., IEEE Proceedings of ISCAS 1985, pp. 651-654. |
N. Tredennick, "How to Flowchart for Hardware", Dec., 1981, IEEE, pp. 87-102. |
Daisy Hardware Compiler, Daisy Computer Systems, Nov., 1986, pp. 9-20 to 9-58. |