STTR Phase I: Integrated GaN FET based high density on board EV charger

Information

  • NSF Award
  • 1914247
Owner
  • Award Id
    1914247
  • Award Effective Date
    7/1/2019 - 5 years ago
  • Award Expiration Date
    6/30/2020 - 4 years ago
  • Award Amount
    $ 224,928.00
  • Award Instrument
    Standard Grant

STTR Phase I: Integrated GaN FET based high density on board EV charger

The broader impact/commercial potential of this project is the development of a high-power GaN half-bridge (HPGHB) module which is a generic building block for most power-electronic systems. Hence, HPGHB can be used in most high current converter applications. This project will start with high electric-vehicle (EV) application in collaboration with a well-known automotive parts maker. EVs need to be widely adopted in advanced cities and in the rural/underdeveloped world. High-power off-board charger may not always be available; hence high-power on-board charger (OBC), which is the topic of this STTR, is a critical enabler for wider adoption of EV leading to reduced carbon emission. On the educational front, this STTR will help train graduate students at the University to use GaN for power electronics which is a high demand area. Companies will be able to recruit and benefit from training of graduate students. Finally, regarding knowledge dissemination, technology developed under this proposal will be showcased in an exhibition booth at IEEE conferences like APEC and ECCE.<br/><br/><br/>This Small Business Technology Transfer (STTR) Phase I project aims to develop a robust and high-current HPGHB and a reference design for a fast-OBC by incorporating HPGHB. High-current integrated GaN HB is extraordinarily challenging from the point of high dV/dT control, short-circuit protection and thermal management. HPGHB is planned for areas where long-term reliability is important, such as in automotive/EV applications. This STTR plans to research design of HPGHB with various knobs to increase its reliability in demanding applications including EVs. Development of a fast-OBC with high efficiency and high-power density will accelerate the adoption of EVs. Planned OBC plans to use innovative multi-level topologies to enable use of low-cost 650V GaN-HEMT technology. Key challenges for this STTR project are a) protection against very-high dV/dt (of at least 150V/nS); b) protection against short circuit to prevent catastrophic damage; c) high efficiency to reduce cooling requirement and reduce size and weight; d) multilevel converter to enable usage of relatively-lower cost GaN-on-Si technology; e) good long-term reliability for automotive/EV market is addressed via dynamic high-temperature-operating-life (HTOL) test; and f) reduced overall system cost by minimizing the cost related to hot probing of the wafer which is the current practice.<br/><br/>This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.

  • Program Officer
    Muralidharan Nair
  • Min Amd Letter Date
    6/20/2019 - 5 years ago
  • Max Amd Letter Date
    6/20/2019 - 5 years ago
  • ARRA Amount

Institutions

  • Name
    TAGORE TECHNOLOGY, INC.
  • City
    ARLINGTON HEIGHTS
  • State
    IL
  • Country
    United States
  • Address
    5 E COLLEGE DR STE 200
  • Postal Code
    600041963
  • Phone Number
    8477903799

Investigators

  • First Name
    Sudip
  • Last Name
    Mazumder
  • Email Address
    mazumder@uic.edu
  • Start Date
    6/20/2019 12:00:00 AM
  • First Name
    Amitava
  • Last Name
    Das
  • Email Address
    amit.das@tagoretech.com
  • Start Date
    6/20/2019 12:00:00 AM

Program Element

  • Text
    STTR Phase I
  • Code
    1505

Program Reference

  • Text
    STTR PHASE I
  • Code
    1505
  • Text
    ADVANCED COMP RESEARCH PROGRAM
  • Code
    4080
  • Text
    Hardware Software Integration
  • Code
    8033