BRIEF DESCRIPTION OF THE DRAWINGS
Embodiments of the invention are described below in relation to the accompanying drawings. Throughout the drawings like reference numbers indicate like exemplary elements, components, and steps. In addition, various elements and regions in the drawings are drawn in a schematic manner and selected proportions and dimensions of various features are exaggerated for clarity of illustration. In the drawings:
FIG. 1A is a perspective view illustrating a substrate for a semiconductor package according to an embodiment of the present invention;
FIG. 1B is a cross-sectional view taken along a line II-II in the substrate shown in FIG. 1A;
FIGS. 2A through 2F are conceptual diagrams illustrating a zigzag unit structure according to an embodiment of the present invention;
FIG. 3 is a cross-sectional view illustrating a substrate for a semiconductor package according to another embodiment of the present invention;
FIG. 4 is a perspective view illustrating an EBG pattern according to an embodiment of the present invention;
FIGS. 5A and 5B are graphs illustrating results obtained when testing the electromagnetic-wave shielding performance of an EBG pattern according to an embodiment of the present invention;
FIG. 6A illustrates a conventional EBG pattern; and
FIG. 6B is a graph illustrating a result obtained when testing the electromagnetic-wave shielding performance using the EBG pattern of FIG. 6A.
DESCRIPTION OF EXEMPLARY EMBODIMENTS
Exemplary embodiments of the invention are described below with reference to the corresponding drawings. These embodiments are presented as teaching examples. The actual scope of the invention is defined by the claims that follow.
In the description that follows, features such as layers may be described as being formed “on” other features such as layers or substrates; however, where this or similar expressions are used to describe the relative positions of features, it should be understood that the features may be in direct contact with each other, or intervening features may also be present.
FIG. 1A is a perspective view illustrating a substrate for a semiconductor package according to an embodiment of the present invention and FIG. 1B is a cross-sectional view taken along a line II-II in the substrate of FIG. 1A.
Referring to FIGS. 1A and 1B, the substrate comprises a dielectric substrate 110, and a circuit pattern 120 formed on a first surface 110a of dielectric substrate 110 and connected to ground via a ground connection 170. The substrate further comprises an electromagnetic band gap (EBG) pattern 130 including a plurality of zigzag unit structures 100 formed on a second surface 110b of the dielectric substrate formed opposite first surface 110a. EBG pattern 130 is connected to ground connection 170 by way of a via 180 extending through dielectric substrate 110.
Zigzag unit structures 100 each comprise a conductor forming a zigzag pattern. Typically, each of the plurality of zigzag unit structures 100 is connected to the other of the plurality of zigzag unit structures 100 and at least one of the plurality of zigzag unit structures 100 is connected to ground connection 170. Examples of various different types of zigzag unit structures 100 are shown in FIGS. 2A through 2F. In particular FIGS. 2A through 2F illustrate zigzag unit structures 100 labeled 100a through 100f, respectively.
Referring to FIGS. 2A through 2F, each zigzag unit structure 100 comprises a plurality of zigzag patterns 101a repeated two or more times. In other words, the term “zigzag unit structure” in the present context refers to a structure including at least two of patterns 101a, as viewed from a two-dimensional perspective. Where patterns 101a are analyzed from a two-dimensional perspective, each of patterns 101a can be considered to have a first direction and a second direction. The first and second directions are illustrated, for example, in FIG. 2A. In FIG. 2A, the first and second directions are oriented at angles of 180° with respect to each other. However, this angle could be modified in various embodiments of the invention.
In each zigzag unit structure 100, the number of patterns δ 01a is preferably between 5 and 1000. On one hand, including less than five patterns 101a tends to be less effective for removing EMI. On the other hand, including more than one thousand patterns 101a can make it difficult to fabricate zigzag unit structure 100, and easier to produce defects in zigzag unit structure 100.
Referring to FIG. 2A, zigzag unit structure 100a comprises four meander structures 140 formed in predetermined regions on four sides of a flat square conductor 150 near the center of a conductor. In zigzag unit structure 100a, patterns 101a are arranged in the first and second directions at angles of 180° with respect to each other.
Referring to FIG. 2B, zigzag unit structure 100b comprises meander structures 140 similar to those of FIG. 2A formed in four sides of flat square conductor 150. Referring to FIG. 2C, zigzag unit structure 100c also comprises meander structures 140 similar to those of FIG. 2A formed in four corner regions of flat square conductor 150.
In FIGS. 2A through 2C, zigzag unit structures 100a, 100b, and 100c each comprise rectilinear shapes repeated in various directions. That is, each of zigzag unit structures 100a, 100b, and 100c comprises patterns repeated in the x-direction, the y-direction, or the x-direction and the y-direction. Since the capacitance of EBG pattern 130 is related to the physical size of zigzag unit structure 100, the particular pattern zigzag unit structure 100 may be selected in consideration of its size, and also the size of the substrate.
Zigzag unit structures 100a through 100c may be formed using similarly shaped meander structures 140 or differently shaped meander structures 140 based on electromagnetic properties of the substrate and related circuits.
Referring to FIG. 1D, zigzag unit structure 100d has a triangular shape. Referring to FIG. 1E, zigzag unit structure 100e comprises two juxtaposed zigzag unit structures 100d.
Zigzag unit structure 100d may yield a variety of EBG patterns having different connection relationships and juxtapositions such as zigzag unit structure 100e.
Referring to FIG. 1F, zigzag unit structure 100f has a hexagonal shape. Zigzag unit structure 100f comprises patterns 101a repeated in three directions to provide excellent EMI shielding performance.
Dielectric substrate 110 typically comprises a conventional nonconductive substrate. However, in a flexible tape substrate, dielectric substrate 110 may be formed of a flexible nonconductive polymer material. The flexible nonconductive polymer material may comprise, for example, polyimide resin, or other materials known to those skilled in the art.
Circuit pattern 120 is typically formed using a conventional method chosen based on the purpose or function of circuit pattern 120. In addition, the substrate is also typically fabricated using a conventional method.
FIG. 3 is a cross-sectional view of a substrate for a semiconductor package according to another embodiment of the invention. Referring to FIG. 3, the substrate comprises a stacked dielectric body 210 comprising a plurality of dielectric substrates 210a and 210b. Stacked dielectric body 210 comprises a first surface 240a, a second surface 240b, and an interface surface located at an interface between dielectric substrates 210a and 210b. The substrate further comprises circuit patterns 220a and 220b formed on first surface 240a and the interface surface, respectively, an EGB pattern 230 formed on second surface 240a, a ground connection 270 connected to circuit patterns 220a and 220b, and a via 280 penetrating stacked dielectric body 210 and connected between ground connection 270 and EGB pattern 230.
As seen in FIG. 3, portions of ground connection 270 and circuit patterns 220b are located at an interface between dielectric substrates 210a and 210b. EBG pattern 230 comprises a plurality of zigzag unit structures formed on at least one of first surface 240a, second surface 240b, and the interface surface.
The substrate of FIG. 3 can be modified to include “N” dielectric substrates in stacked dielectric body 210. In such a substrate, the total number of surfaces in stacked dielectric body 210, including first surface 240a, second surface 240b, and all interface surfaces will be equal to N+1. In addition, at least one of the (N+1) surfaces including the circuit pattern 220a or 220b will be connected to ground connection 270. Further, at least one of the (N+1) surfaces will further include an EBG pattern having a plurality of zigzag unit structures 100.
In some embodiments of the invention, an EBG pattern is formed only on one of first surface 240a, second surface 240b, or the interface surfaces of stacked dielectric body 210 to shield electromagnetic interference only in one direction.
The substrate of FIG. 3 can use zigzag unit structures 100 and EBG patterns similar to those illustrated in FIG. 2. In addition, the substrate illustrated in FIG. 3 is typically fabricated using conventional methods.
FIG. 4 is a perspective view illustrating a substrate for a semiconductor package according to another embodiment of the invention. Referring to FIG. 4, the substrate comprises a plurality of zigzag unit structures 100b arranged adjacent to each other.
Experiments were performed to measure the electromagnetic interference shielding effect of various substrates for semiconductor packages according to selected embodiments of the invention.
Semiconductor package substrates having EBG patterns including zigzag unit structures 100a and 100b, were fabricated and then the electromagnetic wave shielding capability of the structures was measured at various operation frequencies. Results of the measurements for structures 100a and 100b are shown in FIGS. 5A and 5B, respectively.
In FIGS. 5A and 5B, the frequency of input signals on circuit patterns in the substrates is measured on the x-axis, and the magnitude of detected electromagnetic-wave emission of the substrates is measured on the y-axis. In other words, electromagnetic-wave emission is plotted as a function of input signal frequency. The electromagnetic-wave emission is plotted on a log scale. Accordingly, values of electromagnetic-wave emission S21 closer to zero indicate lower electromagnetic-wave shielding capability by the substrates and values of EMI emission S21 further from zero indicate higher electromagnetic-wave shielding capability by the substrates.
As seen in FIGS. 5A and 5B, substrates according to selected embodiments of the invention are relatively good at shielding electromagnetic-waves generated by high-frequency input signals.
FIG. 6A illustrates a conventional substrate for a semiconductor package including a conductor pattern having a mesh structure. The electromagnetic-wave emission of the conventional substrate in FIG. 6A is illustrated in FIG. 6B.
Comparing FIG. 6A with FIGS. 5A and 5B, it can be seen that the electromagnetic-wave emission S21 in FIG. 6B has a minimum value at about 3.4 GHz while the electromagnetic wave emission S21 in FIGS. 5A and S21 in FIG. 5B have minimum values at about 6.6 GHz and 5 GHz, respectively. In addition, while the minimum value of S21 in FIG. 6B is only about −26 dB, the minimum value of S21 in FIGS. 5A and 5B ranges from −70 to −80 dB. In other words, substrates according to selected embodiments of the invention exhibit superior electromagnetic-wave shielding capability at higher frequencies compared with conventional substrates.
Since substrates for semiconductor packages according to selected embodiments of the invention exhibit maximum shielding capabilities at higher frequencies (e.g., around 6.6 GHz and 5 GHz), the substrates provided by selected embodiments of the invention can be advantageously applied to electronic devices having relatively high operational speeds.
Using the substrates for a semiconductor packages according to selected embodiments of the invention, EMI emissions can be effectively reduced.
The foregoing exemplary embodiments are teaching examples. Those of ordinary skill in the art will understand that various changes in form and details may be made to the exemplary embodiments without departing from the scope of the invention as defined by the following claims.
Patent Application
20070285188
