Patent Application
20120182282
The present invention relates to display devices, such as devices driving an active matrix electrophoretic display by varying the common voltage.
Displays, such as liquid crystal (LC) and electrophoretic displays include particles suspended in a medium sandwiched between a drive or pixel terminal and a common terminal. The pixel terminal can be controlled in various ways. The most simple and low cost way is direct control of the pixel electrode by a display controller. This is called a direct-drive or segmented display, where every pixel (also called a segment in this type of display) is under the direct control of the controller. Another way to control the pixel terminal is by way of passive-matrix driving, where the pixel terminals are connected to each other in rows and the common terminals are connected to each other in columns, where each row and column are under the direct control of a display controller. This way a simple matrix display is formed. This is commonly used for simple LC matrix displays. For electrophoretic media this way of driving does not work, as a requirement for passive matrix driving is a voltage threshold around 0V where the medium does not switch. This is absent in electrophoretic media. The common way to drive larger, higher resolution displays is by means of active-matrix addressing. In that case the pixel terminal includes pixel drivers, such as an array of thin film transistors (TFTs) that are controlled to switch on and off to form an image on the display. This conventional method of driving a display is referred to as scan line driving. The voltage difference between a TFT or the pixel terminal and the common terminal, which is on the viewer's side of the display, causes migration of the suspended particles, thus forming the image. Displays with an array of individually controlled TFTs or pixels are referred to as active-matrix displays.
In order to change image content on an electrophoretic display, such as from E Ink Corporation for example, new image information is written for a certain amount of time, such as 500 ms to 1000 ms. As the refresh rate of the active-matrix is usually higher, this results in addressing the same image content during a number of frames, such as at a frame rate of 50 Hz, 25 to 50 frames. Electrophoretic active matrix displays are applied in many applications such as e-readers. Although this text refers generally to E Ink as examples of electrophoretic displays, it is understood that the invention can be applied to electrophoretic displays in general, such as e.g. SiPix, where the microcups are filled with white particles in a black fluid.
Circuitry to drive displays, such as electrophoretic displays, are well known, such as described in U.S. Pat. No. 5,617,111 to Saitoh, International Publication No. WO 2005/034075 to Johnson, International Publication No. WO 2005/055187 to Shikina, U.S. Pat. No. 6,906,851 to Yuasa, and U.S. Patent Application Publication No. 2005/0179852 to Kawai; U.S. Patent Application Publication No. 2005/0231461 to Raap; U.S. Pat. No. 4,814,760 to Johnston; International Publication No. WO 01/02899 to Albert; Japanese Patent Application Publication Number 2004-094168 and WO2008/054209 and WO2008/054210 to Markvoort, each of which is incorporated herein by reference in its entirety.
Conventional active matrix E-ink displays suffer from various drawbacks. One drawback is that power consumption during an image update is relatively large, due to the relatively high voltages that must be applied during addressing of the display. A straightforward solution would be lowering the addressing voltages. However, the disadvantage of the lower voltage levels is that the image update time increases more than linear with the voltage reduction, leading to very long image update times (i.e., slower image updates). Another drawback is that the image update time of E-ink is relatively long despite the high voltage levels.
WO 2008/054209 referred to herein above discloses a display without an increased image update time, wherein the voltages on the active matrix and thereby the power consumption are decreased. The drive scheme uses a voltage not equal to zero on the common electrode of the display to reduce the voltages needed in the rows and columns of the active matrix. During a first period, wherein the pixels may be brought in an extreme pixel state corresponding to a first color (e.g. white or black), the voltage on the common electrode has a first polarity. The pixels now can be brought in the first color state by providing a column voltage with an opposite second polarity. The pixels that should not be brought in the first color state are provided with a column voltage having the same polarity and value as the voltage on the common electrode. As a result, there is a “stable transition”, wherein there is no voltage over the pixel and the color of the pixels concerned does not change. Thereby, image artifacts can be avoided. During a second period, wherein the pixels may be brought in an extreme pixel state corresponding to a second color (black if the first color is white and white if the first color is black), the voltage on the common electrode has the second opposite polarity. The pixels now can be brought in the second color state by providing a column voltage with the opposite first polarity. The pixels that should not be brought in the second color state are provided with a column voltage having the same polarity and value as the voltage on the common electrode, resulting in a stable transition without color change for those pixels.
Although the power consumption of the display known from WO2008/054209 is reduced with respect to other prior art display devices, it is desirable to reduce it even further, in particular to conserve battery life of mobile products.
According to a first aspect of the invention there is provided a display device comprising a plurality of switches, each of the switches comprising an operational terminal and controlling the voltage on said operational terminal. There are a plurality of pixels each having a pixel state that is driven by a driving voltage differential between a pixel voltage applied to a pixel terminal of the pixel and a common voltage applied to a common terminal of the pixel. Said pixel terminal is coupled to a corresponding operational terminal of the switch. The display device comprises furthermore a common driver for providing a variable common voltage to the common terminals.
A controller controls the common driver in a first pixel driving state, wherein pixels are driven to a first color, to provide a common voltage to the common terminals with a first polarity and controls the common driver in a second pixel driving state, wherein pixels are driven to a second color, to provide a common voltage to the common terminals with a second polarity opposite to the first polarity. It also controls the operation of the switches for driving said plurality of pixels. A swing on the common voltage, i.e. an absolute value of the difference between the common voltage in the first pixel driving state and the common voltage in the second driving state is larger than a swing on the pixel voltage, i.e. an absolute value of the difference between a maximum pixel voltage and a minimum pixel voltage. It should be noted that the maximum and minimum pixel voltage in the framework of this invention are the maximum and minimum voltages that may be reached during the charging of the pixel. At the times that the pixel is not charged, the pixel voltage may be larger or smaller due to capacitive coupling to other electrodes.
In case of using the electrophoretic medium supplied by E Ink, the first color is white and the first polarity is positive and the second color is black and the second polarity is negative. However, the electrophoretic medium supplied by SiPix reacts opposite to the electric field, so in that case the relations between the colours and the polarities are also opposite.
The ‘super low voltage’ drive state thus obtained can be applied to segmented (i.e. direct drive) displays using an electrophoretic medium. Here, the switches for controlling the voltage may be located in the controller itself. The switches maybe comprised of an output of a multi-level shift register, the output of an amplifier or a combination thereof, located in the controller. In the case of direct drive displays, the advantage is that the voltage that needs to be supplied by the driver can be reduced, thereby reducing the cost of the driver. Also the power consumption can be lowered, as the voltage swing on the electrode that needs to be switched the most can be reduced. Alternatively the switching speed can be increased with the same voltage swing on the multi-level driver.
According to an embodiment, the display is driven by active-matrix addressing. In that case, the switches are semiconductor switching devices such as transistors and the display device comprises a column driver and a row driver.
Each semiconductor switching device comprises a first operational terminal, which in case that semiconductor switching device is a TFT transistor is a source terminal thereof, a switching control terminal, which in case that semiconductor switching device is a TFT transistor is a gate terminal thereof, and second operational terminal, which in case that semiconductor switching device is a TFT transistor is a drain terminal thereof. The column driver is connected to the first operational terminals for providing column voltages. The row driver is connected to the switching control terminals for providing a row select voltage switching the semiconductor switching devices of a row to a conductive state and a row non-select voltage switching the semiconductor switching devices of a row to a non-conductive state.
The pixel terminal is connected to a second operational terminal of a corresponding semiconductor switching device and the pixel voltage is applied to the pixel terminal by providing a column voltage to the first operational terminal of a corresponding semiconductor switching device being in the conductive state.
The controller controls the operation of the column driver, row driver, and common driver for driving said plurality of pixels. The swing on the common voltage is larger than a swing on the column voltage, i.e. an absolute value of the difference between a maximum column voltage and a minimum column voltage, which can be provided by the column driver.
With active matrix addressing, the ‘super low voltage’ drive state has as effect, that the voltages applied to the active matrix (i.e. to the first operational terminals and the switching control terminals of the semiconductor switching devices) may be reduced compared to prior art arrangements. This leads to a reduction of the power consumption required for an image update, as that is proportional to the voltages squared and also reduces the cost of the drivers. Alternatively, during the super low voltage drive on the active matrix equal voltages may be applied with respect to prior art arrangements. This has the effect that the driving voltage standing over the pixels is increased and accordingly, that the image update time is decreased. This results in an increase in the operational lifetime and reduction of the power consumption as the display will be driven a smaller fraction of the time.
According to a further embodiment, a swing on the row voltage, i.e. an absolute value of the difference between the row select voltage and the row non-select voltage is larger than a swing on the column voltage, i.e. an absolute value of the difference between a maximum column voltage and a minimum column voltage, which can be provided by the column driver during the first and the second driving state, in such a way that the semiconducting switching devices can be switched in their conducting state and in their non-conducting state irrespective of column and pixel voltage levels. This is to ensure proper charging of the pixels when the semiconductor switching devices of a corresponding row are in the conductive state and proper retention of charge on the pixels when the semiconductor switching devices are in the non-conductive state.
The display device may additionally comprise a storage driver for providing a storage voltage to a storage capacitor, connected between the storage driver and the pixel terminal of the pixel, having a storage voltage swing being proportional to a common voltage swing. The storage driver may be controlled, by the controller to change the voltage of the storage capacitor with proportional amplitude to and at substantially the same time as the common voltage. By varying the common voltage and the storage voltage of the storage capacitor at substantially the same time and by an amount substantially related to the ratio of the storage capacitance and the total pixel capacitance, the voltage across the pixels does not change, when the common voltage is switched. Consequently, the display effect or image formed by the pixel is maintained with minimal disturbance, yet various advantages may be achieved such as faster image update speed or reduced image update time, reduced column and/or row voltage levels, reduced power consumption, as well as improved image uniformity.
According to a further embodiment, the common driver and storage driver are controlled, by the controller during a start up phase for an image update before the first or second pixel driving state, in a first step to change a value of the common voltage and the storage voltage so that due to the change a value of the pixel voltage is changed to a value that keeps the corresponding semiconductor switching device in its non-conducting state. The column driver is controlled, by the controller in at least one reset step to reset the value of the pixel voltage. The common driver and the storage driver are controlled, by the controller in a second step to increase the value of the common voltage and the storage voltage to the value corresponding to the first or second driving state, which ever is applicable. If the value of the common voltage and storage voltage were changed to the value corresponding to the first or second driving state in one go, depending on the driving state in which the display device is in, the pixel voltage would be changed to a value that either causes the corresponding semiconductor switching device to switch to its conducting state causing image artefacts due to undesired leakage of the semiconductor switching devices or would reach values that could potentially damage the circuitry. By means of the change of the common voltage and the storage voltage in two (or more) steps with a reset of the pixel voltage value in between, such undesirable values of the pixel voltage are avoided.
According to a still further embodiment, the common driver and the storage driver are controlled, by the controller during a transition phase from the first to the second pixel driving state or vice verse, to change the value of the common voltage and storage voltage in a number of steps from the value corresponding to the first pixel driving state to the second pixel driving state or vice versa. Each of the stepwise value changes of the common voltage and storage voltage results in a value change of the pixel voltage. The column driver is controlled, by the controller in at least a reset step between the steps to change the column voltage in such a way that the value of the pixel voltage is changed in a direction opposite to the direction of the value change of the pixel voltage caused by the value change of the common voltage and storage voltage. If the value of the common voltage and storage voltage were changed from the value corresponding to the first or second driving state to the value corresponding to the other one of these two states in one go, this would cause pixel voltages potentially damaging to the circuitry and/or cause image artefacts due to undesired leakage of the pixel voltage induced by the pixel voltage causing the corresponding semiconductor switching device to switch to its conducting state. By means of changing the common voltage and storage voltage in two (or more) steps from the value of the first super low voltage driving state to the value corresponding to the second low voltage state with a reset of the pixel voltage to a lower absolute value in between, such undesirable values of the pixel voltage are avoided.
According to a yet further embodiment, potentially damaging or image artifacts causing pixel voltages are avoided during a shutdown phase at the end of an image update after the first or second pixel driving state. Thereto, the common driver and storage driver are controlled, by the controller during the shutdown phase to change the value of the common voltage and storage voltage in a number of steps to their final values, each of the stepwise value changes of the common voltage and storage voltage resulting in a value change of the pixel voltage. The column driver is controlled, by the controller in at least a reset step between the steps to change the column voltage in such a way that the value of the pixel voltage is changed in a direction opposite to the direction of the value change of the pixel voltage caused by the value change of the common voltage and the storage voltage.
With the super low voltage driving scheme according to the invention, it becomes impossible to apply a zero-voltage over the pixels during the super low voltage driving states. So, the stable transition, wherein the color of a pixel is kept stable, is no longer available. In some situations special care has to be taken to avoid artifacts because of this.
A first one is the situation, wherein pixels are already completely driven in the direction accessible during a certain state, i.e. pixels are already completely in a state corresponding to a certain color, when starting a super low voltage drive state, wherein the pixels are driven to that color state. The reason is that in super low voltage drive all pixels will be switching, as there is no zero voltage state over the pixels available anymore. Driving a pixel in the extreme switching state further in the same direction, which is called overdriving, can cause image artifacts later on, due to image sticking.
To avoid or reduce such overdriving, the common driver and storage driver are controlled, by the controller during the start up phase, in a third step to provide a common voltage and storage voltage enabling the provision of a zero voltage over the pixels and providing a common voltage with a polarity opposite to the polarity of the common voltage during the remainder of the start-up phase.
At the end of an image update a similar but reversed problem occurs if no countermeasures are taken. Some of the pixels that have to be in the extreme switching state, either corresponding to the first color or the second color at the end of the image update will be driven from their extreme position by the last super low voltage drive state, if this drive state is in the opposite direction. For example, pixels that need to be completely in the first color state will not keep their switching state when the last super low voltage drive state is a state for driving pixels to the second color, because in super low voltage drive all pixels will switch in the same direction during a state.
To avoid or reduce this undesired effect, according to a further embodiment of the invention, the common driver and storage driver are controlled, by the controller in a further step during the shutdown phase at the end of an image update to provide a common voltage with a polarity opposite to the polarity of the common voltage during the remainder of the shutdown phase, where during this further step the provision of zero voltage over the pixels is enabled. During this further step, the extreme switching states are restored of the pixels that were driven in the wrong direction during the previous super low voltage state.
In a second aspect there is provided a method for driving a display according to the first aspect.
Further areas of applicability of the present systems and methods will become apparent from the detailed description provided hereinafter. It should be understood that the detailed description and specific examples, while indicating exemplary embodiments of the displays and methods, are intended for purposes of illustration only and are not intended to limit the scope of the invention.
These and other features, aspects, and advantages of the apparatus, systems and methods of the present invention will become better understood from the following description, appended claims, and accompanying drawing where in:
The following description of certain exemplary embodiments is merely exemplary in nature and is in no way intended to limit the invention, its application, or uses. In the following detailed description of embodiments of the present systems, devices and methods, reference is made to the accompanying drawings which form a part hereof, and in which are shown by way of illustration specific embodiments in which the described devices and methods may be practiced. These embodiments are described in sufficient detail to enable those skilled in the art to practice the presently disclosed systems and methods, and it is to be understood that other embodiments may be utilized and that structural and logical changes may be made without departing from the spirit and scope of the present system.
The following detailed description is therefore not to be taken in a limiting sense, and the scope of the present system is defined only by the appended claims. The leading digit(s) of the reference numbers in the figures herein typically correspond to the figure number, with the exception that identical components which appear in multiple figures are identified by the same reference numbers. Moreover, for the purpose of clarity, detailed descriptions of well-known devices, circuits, and methods are omitted so as not to obscure the description of the present system.
In the presence of an electric field the pigments in the microcapsules move in and out of the field of view; when the electric field is removed the pigments stop moving and the current grey scale is preserved; this effect is known in the art as ‘bi-stable’. In this text it is assumed for conciseness that the pixels comprise positively charged black micro-particles and negatively charged white micro-particles. It is understood that any other set of first and second colors could be given to the micro-particles without affecting the working principle. Where there is written that a pixel is in a black state or in a white state, it is understood that micro-particles with a first or second color, respectively, are dominantly present on a viewing side of the pixel. Similarly where there is written that a pixel is in a grey state it is understood that a mix of any particular proportions of the first and second colored micro-particles is present on the viewing side of the pixel.
The relative sizes of the voltages applied at the pixel and common terminals determine the magnitude and the direction of the electric fields through the pixels and therewith the speed and direction of the drifting microparticles. The polarity and absolute magnitude of the voltages that are shown in the figures and text thus mainly serve an exemplary role for particular embodiments of the invention and should not be construed as limiting to its scope, Sometimes the exemplary relative absolute magnitudes of voltages for different driving modes are important because e.g. higher voltage differentials allow for faster pixel switching speeds, but may also lead to shorter lifetime of the electronic components.
Addressing of the E-ink 140 from black to white, for example, requires a pixel represented as a display effect or pixel capacitor CDE in
Switching to a black screen, where the black particles 110 move towards the common electrode 102, requires a positive pixel voltage Vpx at the pixel electrode 101 with respect to the common electrode voltage VCE. In the case where VCE=0V and Vpx=+15V, the voltage across the pixel (CDE in
This way of pixel driving, wherein VCE=0V and wherein the absolute value of the column voltage is relatively high will be referred to as High Voltage Driving (HVD) in this description. High voltage driving (HVD) allows driving of pixels to White and to Black simultaneously. During a full frame either +15V (to Black) or −15V (to White) is written on a pixel which requires a voltage swing of 30V on the columns.
The typical driving voltage differentials VEP across the pixel capacitor CDE shown in
If the voltages are reduced from 15V to 7.5V, then switching time is increased to approximately 0.65 seconds, as shown by the curve 202 of
A row of pixels is selected by applying the appropriate select voltage to the select line or row electrode 320 connecting the switching control terminals, which in this example are the TFT gates, for that row of pixels. When a row of pixels is selected, a desired voltage may be applied to each pixel via its data line or the column electrode 330. When a pixel is selected, it is desired to apply a given voltage to that pixel alone and not to any non-selected pixels. The non-selected pixels should be sufficiently isolated from the voltages circulating through the array for the selected pixels. External controller(s) and drive circuitry is also connected to the cell matrix 400. The external circuits may be connected to the cell matrix 400 by flex-printed circuit board connections, elastomeric interconnects, tape-automated bonding, chip-on-glass, chip-on-plastic and other suitable technologies. Of course, the controllers and drive circuitry may also be integrated with the active matrix itself.
In
As shown in
Active-matrix displays are driven one row-at-a-time. During one frame time, all the rows are sequentially selected by applying a voltage that turns on the TFTs, i.e., changing the TFTs from the non-conducting to the conducting state. Pixels to be driven to a certain state are then selected and the corresponding column voltage is provided to the source of the TFT and thereby to the pixel. Pixels that are in a state, which should not be changed, are (in case that VCE=0V) provided with a 0V column voltage at their source. This matrix driving principle is well known to a person of average skill in the art and it is therefore not needed to describe it in more detail here, as such.
The conventional active matrix E-ink displays with High Voltage Driving, although it enables the simultaneous driving of pixels to the white state and the black state, suffer from various drawbacks. One drawback is that power consumption during an image update is relatively large, due to the relatively high voltages that must be applied during addressing of the display. A straightforward solution would be lowering the addressing voltages. However, the disadvantage of the lower voltage levels is that the image update time increases more than linear with the voltage reduction as shown in
An improved scheme for driving the active matrix display is disclosed in the patent application WO 2008/054209 to Markvoort, which is incorporated herein by reference in its entirety. This matrix driving scheme is referred to as the Low Voltage Driving (LVD) scheme. As will be explained in more detail herein after, the common voltage VCE on the common voltage electrode 170 is switched to a positive value during a first time period enabling the driving of pixels to a first color and the common voltage electrode 170 is switched to a positive value during a second time period enabling the driving of pixels to a second color. The voltages on the common electrodes and the row electrodes may be lower than for the High Voltage Driving (HVD) scheme.
The TFT 310 or switch 510 closes or conducts when a voltage, e.g., negative voltage, from the row electrode is applied to the TFT gate G resulting in the flow of current Id through the TFT 310 (or switch 510) between its source S and drain D. As current Id flows through the TFT, the storage capacitor Cst is charged or discharged until the potential of pixel node P at the TFT drain D equals the potential of the column electrode, which is connected to the TFT source S. If the row electrode potential is changed, e.g., to a positive voltage, then the TFT 310 or switch 510 will close or become non-conductive, and the charge or voltage at the pixel node P will be maintained and held by the storage capacitor Cst. That is, the potential at the pixel node P, referred to as the pixel voltage Vpx at the TFT drain D will be substantially constant at this moment as there is no current flowing through the TFT 310 or switch 510 in the open or non-conductive state.
The amount of charge on the storage capacitor Cst provides or maintains a certain potential or voltage difference between the storage capacitor line 340 and pixel node P of the pixel capacitor CDE. If the potential of the storage capacitor line 340 is increased by 5V, then the potential at the pixel node P will also increase by approximately 5V, assuming ΔVpx≈ΔVst as will be described. This is because the amount of charge at both nodes of the storage capacitor Cst is the same since the charges cannot go anywhere.
It should be understood that for simplicity, it is assumed that the change in the pixel voltage ΔVpx across the pixel CDE is approximately equal to the change in the storage capacitor voltage ΔVst across the storage capacitor Cst, i.e., ΔVpx≈ΔVst. This approximation holds true particularly when Cst is the dominant capacitor, which should be the case. A more exact relation between Vpx and Vst is given by equation (1):
ΔVpx=(ΔVst)[(Cst)/(CTOTAL)] (1)
where ΔVpx≈ΔVst when CTOTAL≈Cst and thus (Cst)/(CTOTAL)≈1
The total pixel capacitance CTOTAL is defined as shown in equation (2) as the sum of all capacitance, namely:
C
TOTAL
=C
st
+C
DE
+C
rest (2)
where Crest is the sum of all other capacitance (including parasitic capacitance) in the pixel.
Further it should be noted that, in addition to expressing the change in the pixel voltage ΔVpx (at node P in
ΔVpx=(ΔVst)[(Cst)/CTOTAL)]=(ΔVCE)[(CDE)/(CTOTAL)] (3)
where CDE is capacitance of the display effect or pixel.
It is desired not to effect the voltage across the pixel VEP and thus not to effect the displayed image when voltages are changed. Having no display effects or no pixel voltage change means that ΔVEP=0.
Since VEP=VCE−Vpx then:
ΔVEP=ΔVCE−ΔVpx=0 (4)
Equation (4) indicates the desirable maintenance of the displayed image with substantially no changes in display effects when voltages are changed. That is, the change in the voltage across the pixel ΔVEP is desired to be zero so that black or white states are maintained without any substantial change, for example.
Substituting ΔVpx from equation (3) into equation (4) yields:
ΔVCE−(ΔVst)[(Cst/CTOTAL)]=0 (5)
It can be seen from equation (5) that the relation between ΔVCE and ΔVst may be given by equations (6) and (7)
ΔVCE=(ΔVst)[(Cst/CTOTAL)] (6)
ΔVst=(ΔVCE)[(CTOTAL/Cst)] (7)
Thus, when the common electrode voltage is changed by an amount ΔVCE, then it is desired to change the voltage on the storage line by ΔVst that satisfies equation (7).
As seen from equation (6) or (7), in order to prevent any voltage change ΔVEP across the pixel CDE i.e., to ensure that ΔVEP=0, and thus substantially maintain the same display effect with substantially no change of the displayed image, the common voltage VCE and the storage capacitor voltage Vst are changed at substantially the same time and by substantially the proper amount with respect to each other as shown by equations (6) or (7). In particular, when Vst and VCE are changed by amounts that satisfy equation (6) or (7) and at substantially the same time, then there will be no change in the voltage across the pixel CDE, i.e., ΔVEP=0.
The voltage across the pixel capacitor CDE, i.e., the voltage difference between the common electrode 102 and the pixel node P (i.e., VEP) is responsible for switching of the display and forming an image along with the rest of the pixel matrix array. If the potential on the common electrode 102 and the storage capacitor line 340 are changed at substantially the same time (e.g., the two are connected together or are under the control of the same controller 515), and with amounts that substantially satisfy equation (6) or (7), then the potential at the pixel node P will change by substantially the same amount as the potential change of the common electrode voltage and at substantially the same time. Effectively, this means that voltage VEP across the pixel capacitor CDE remains constant (i.e., VEP=0).
On the other hand, if the common electrode 102 and the storage capacitor line 340 are not connected together or under the control of the same controller, then a voltage VCE change of the common electrode 102 will also have an effect or change the voltage VEP across the pixel capacitor CDE. That is, the change in the common electrode potential VCE will have an effect on the whole display. Further, if the common electrode potential VCE is changed while a row is selected (i.e., TFT 310 is closed or conducting), it will result in a different behavior for that selected row and will result in image artifacts.
It should be noted that the storage capacitor Cst in an active-matrix circuit designed to drive the E-ink (or pixel/display effect capacitor CDE) is 20 to 60 times as large as the display effect capacitor CDE and gate-drain capacitors Cgd. Typically, the value of the display effect capacitor CDE is small due to the large cell gap of the E-ink and the relatively large leakage current of the E-ink material. The leakage current is due to a resistor 350 (see
The various electrodes may be connected to voltage supply sources and/or drivers which may be controlled by a controller 515 that controls the various voltage supply sources and/or drivers, shown as reference numerals 520, 530, 570, connected to the row electrode 320, the column electrode 330, and the common electrode 102, respectively. The controller 515 drives the various display electrodes or lines, e.g., pixel cell shown in the equivalent circuit 500, with pulses having different voltage levels as will be described.
To realize the proper amount and timing of changes of the voltages of the storage capacitor voltage Vst and common voltage VCE, namely changing both storage and common voltages Vst, VCE at substantially the same time and by substantially the proper amount, namely, ΔVst=(ΔVCE) [(CTOTAL/Cst)], as shown in equation (7), the common electrode driver 570 may be connected to the storage capacitor line 340 through a storage driver 580 which may be programmable or controllable by the controller 515. In this case the storage driver 580 is a scalar which generates an output signal Vst that corresponds to the common voltage VCE. In other words, the voltage Vst, of the output signal varies proportionally, preferably linearly proportionally with the common voltage VCE. Alternatively the storage driver 580 may be a driver separate from controller 515. In this case the connection between the common electrode driver 570 and the storage driver 580 is superfluous. The controller 515 may be configured to change the storage and common voltages Vst, VCE at substantially the same time and control the storage driver 580 such that the storage and common voltage changes correspond, e.g. satisfy the relationship shown by equation (6) or (7), for example.
Artifacts may result in the displayed image if the storage and common voltages Vst, VCE are not switched at the substantially same time. Further, preferably, as shown in
The controller 515 may be any type of controller and/or processor which is configured to perform operation acts in accordance with the present systems, displays and methods, such as to control the various voltage supply sources and/or drivers 520, 530, 570 to drive the display 500 with pulses having different voltage levels and timing as will be described. A memory 517 may be part of or operationally coupled to the controller/processor 515.
The memory 517 may be any suitable type of memory where data are stored, (e.g., RAM, ROM, removable memory, CD-ROM, hard drives, DVD, floppy disks or memory cards) or may be a transmission medium or accessible through a network (e.g., a network comprising fiber-optics, the world-wide web, cables, or a wireless channel using time-division multiple access, code-division multiple access, or other radio-frequency channel). Any medium known or developed that can store and/or transmit information suitable for use with a computer system may be used as the computer-readable medium and/or memory. The memory 517 or a further memory may also store application data as well as other desired data accessible by the controller/processor 515 for configuring it to perform operation acts in accordance with the present systems, displays and methods.
Additional memories may also be used. The computer-readable medium 517 and/or any other memories may be long-term, short-term, or a combination of long-term and short-term memories. These memories configure the processor 515 to implement the methods, operational acts, and functions disclosed herein. The memories may be distributed or local and the processor 515, where additional processors may be provided, may also be distributed or may be singular. The memories may be implemented as electrical, magnetic or optical memory, or any combination of these or other types of storage devices. Moreover, the term “memory” should be construed broadly enough to encompass any information able to be read from or written to an address in the addressable space accessed by a processor. With this definition, information on a network is still within the memory 517, for instance, because the processor 515 may retrieve the information from the network for operation in accordance with the present system.
The processor 515 is capable of providing control signals to control the voltage supply sources and/or drivers 520, 530, 570 to drive the display 500, and/or performing operations in accordance with the various addressing drive schemes to be described. The processor 515 may be an application-specific or general-use integrated circuit(s). Further, the processor 515 may be a dedicated processor for performing in accordance with the present system or may be a general-purpose processor wherein only one of many functions operates for performing in accordance with the present system. The processor 515 may operate utilizing a program portion, multiple program segments, or may be a hardware device, such as a decoder, demodulator, or a renderer such as TV, DVD player/recorder, personal digital assistant (PDA), mobile phone, etc, utilizing a dedicated or multi-purpose integrated circuit(s).
Any type of processor may be used such as dedicated or shared one. The processor may include micro-processors, central processing units (CPUs), digital signal processors (Dips), Asics, or any other processor(s) or controller(s) such as digital optical devices, or analog electrical circuits that perform the same functions, and employ electronic techniques and architecture. The processor is typically under software control for example, and has or communicates with memory that stores the software and other data such as user preferences.
Clearly the controller/processor 515, the memory 517, and the display 500 may all or partly be a portion of single (fully or partially) integrated unit such as any device having a display, such as flexible, roll able, and wrap able display devices, telephones, electrophoresis displays, other devices with displays including a PDA, a television, computer system, or other electronic devices. Further, instead of being integrated in a single device, the processor may be distributed between one electronic device or housing and an attachable display device having a matrix of pixel cells 500.
In
As shown by the dashed curve or Vpx 840, 842, the pixel voltage Vpx starts at 0 V before the first frame 850, discharge slightly and is close to the required pixel voltage at the start of the second frame 860. Although the column electrode voltage Vcol 830, 832 is 0V between two row selection or gate pulses 810, the column voltage in an actual or real display may not be quite 0V because the other pixels attached to the column are addressed. The pulses shown in
Similar to curves shown in
It should be noted that the column voltage Vcol 930 in
Similarly, as shown in
As described, the drive methods shown in
Correspondingly, as compared to the conventional drive scheme 800, 805 shown in
As shown in
By choosing a different common electrode voltage VCE for the two drive phases, namely +7.5V during the ‘white’ phase shown in
The voltage across the pixel VEP (
The voltage across the pixel VEP during the ‘black’ phase (
The voltage levels VEP across the pixel capacitor CDE (
It should be noted that, with the drive scheme according the various described embodiments, the voltage VEP across the pixel capacitor CDE, i.e., ±15V swing, are identical to the conventional drive scheme, as seen from arrows 870, 890 in
For the color sequential drive scheme 900, 905 shown in
As seen from
It should also be noted that, instead of having large values for the common electrode voltage VCE, such as ±7.5V (
Kickback refers to the following phenomenon. During the conducting state of the TFT (Vrow=−17.5V for a p-type TFT) the small gate-drain parasitic capacitor Cgd and the capacitors Cst and CDE will be charged (
In general, a small additional ΔVCE is required on top of the mentioned VCE voltages (e.g., on top of −7.5, 0, +7.5V). The reason is that parasitic capacitances (e.g., Cgd) in the pixel cause a small voltage jump when the row changes from low to high voltage. This jump is called the kickback voltage VKB and can be calculated as follows: ΔVKB=ΔVrow(Cgd/CTOTAL). This must be added to VCE in order to have the right VEP. Thus, it should be understood that this small additional kickback voltage should be added to all the described VCE voltages.
It should further be noted that the power consumption (of the color sequential addressing scheme of
So, the advantages and inconveniences of the HVD scheme and LVD scheme can be summarized as follows: High voltage pixel driving (HVD) allows driving of pixels to White and to Black simultaneously. During a full frame either +15V (to Black) or −15V (to White) is written on a pixel which requires a voltage swing of 30V on the columns. Since switching is not so fast, generation of grey scales can be accomplished by pulse width modulation, i.e., by applying the + or −15V voltage to a pixel for a smaller or larger number of frames. So, in this context, pulse width modulation refers to the fact that the grey scales on the display are created by applying a certain voltage (pulse) for a certain amount of time (pulse width). The combination of the voltage level and the time that is applied thereto creates the grey level on the display. This in contract to amplitude modulation used in Liquid Cristal displays, where the display is driven by applying a certain voltage amplitude for a fixed amount of time or during the time a certain grey scale corresponding to the voltage amplitude has to be presented to the user.
Low voltage driving (LVD) reduces the voltage swing of the column voltages Vcol by applying a variable common voltage VCE to the common terminal 102 such that the voltage across the pixel VEP=VCE−Vpx remains the same. The price to pay is that during one frame it is now only possible to either switch a pixel to White (VCE=+7.5V) or to switch a pixel to Black (VCE=−7.5V). It is however possible to have a fast switch (Vcol=7.5V; 15V over E Ink) and a slow switch (Vcol=0V; 7.5V over E Ink), which helps realizing more grey levels.
Now with reference to
As shown in
As in this exemplary embodiment, the common voltage VCE is modulated symmetrically around 0V between a positive voltage value +VCE and −VCE, the absolute value of the common electrode voltage VCE is substantially larger than the absolute value of the column voltage Vcol, by a predetermined offset value unequal to zero, which preferably is at least 5 V. The storage capacitor line voltage Vst (not shown here) should be modulated with a proportional amplitude at substantially the same time as VCE, similarly to the LVD scheme as described herein above for the Low Voltage Driving scheme with reference to
With the SLVD driving scheme, the column and row voltages may have smaller absolute values than with the LVD driving scheme and/or the voltages need to be applied for a smaller time period in order to reach a certain color state. So, in the latter the image update time is decreased. In both situations the power consumption of the display is reduced, since it depends on the voltages squared but of course also on the time that the voltages are applied to the active matrix. Furthermore, this also increases the operational lifetime as either the applied voltages to the active matrix are smaller and/or the time and/or the display will be driven a smaller fraction of the time.
However, as a result of the SLVD, the third range 1030 of the electrophoretic voltage, VEP, which lies between −VCE+Vcol and +VCE−Vcol cannot be reached. Consequently, it is not possible anymore to apply 0V to any pixel (i.e., the voltage difference between the pixel electrode and the common electrode cannot be 0V anymore). Therefore all pixels are switching during a super low voltage drive state, as in general electrophoretic media only have a very small threshold and therefore start switching at voltages close to 0V. Furthermore, as discussed in more detail herein after without taking any countermeasures, the switching of the common electrode voltage VCE to and between the values belonging to the SLVD to black state and SLVD to white state could lead to voltage on the pixels leaking away or voltages that are potentially harmful to the circuitry.
This is better understood with reference to
Before starting a new image update, all voltages on the display are 0V. To enter the first state 1120 of the super low voltage drive care has to be taken that the electrophoretic medium does not start to switch due to the presence of a certain VEP on the pixels during the change of the common voltage VCE. More in particular, it should be avoided that the pixel voltage Vpx jumps to a level that causes the pixel switch to open as that will cause image artifacts.
In the example shown in
In order to avoid this, a two-step process with a reset may be applied, as shown in the right hand part of
When the first super low voltage drive state is the SLVD-to-black 1140 having a VCE bias with an opposite polarity, also a two-step or multi-step startup phase may be needed, but this time to avoid pixel voltages that could potentially damage the circuitry when p-type TFT pixel switches are used. In the case when n-type TFT pixel switches are used care has to be taken that due to the reduction of the pixel voltage the TFT is not put in its conducting state causing image artifacts.
During the start-up phase, there is a time period wherein there are possible (absolute) values of the column electrode voltage Vcol, which are larger than the (absolute) value of the common electrode voltage Vce. So, during this period there is no SLVD driving state but a LVD-to-black or LVD-to-white pixel driving state as discussed herein above with reference to
As shown in
As during the transitions, there is a time period wherein there are possible (absolute) values of the column electrode voltage Vcol, which are larger than the (absolute) value of the common electrode voltage Vce, there is a LVD-to-black and LVD-to-white pixel driving state during the transitions.
During the shutdown phase 1160 care has to be taken that VEP for all pixels is put to 0V one row-at-a-time. As during a super low voltage drive state no pixel can be addressed with VEP=0V, the shutdown phase has to be executed by changing (decreasing) VCE to its final value (0V) in at least two steps, where during the last step the VEP=0V state can be addressed. In between the steps Vpx has to be reset to avoid damaging voltages and/or artifacts. Also, during the shutdown phase, there is a time period wherein there are possible (absolute) values of the column electrode voltage Vcol, which are larger than the (absolute) value of the common electrode voltage Vce, and consequently a LVD-to-black or LVD-to-white pixel driving state.
Now with reference to
In the specific example to be discussed now with reference to
For the LVD-to-White state, Vce is +10V+Vkb, Vcol may be +10V, 0V or −10V, Vrow
For the LVD-to-Black state, Vce is −10V+Vkb, Vcol may be +10V, 0V or −10V, Vrow
For the SLVD-to-White state, the values are as for the LVD-to-White state, with the exception of Vce, which is +20V+Vkb. The SLVD-to-White state is preceded and followed by different state. This state may be an LVD-to-white state or a HVD state as discussed later.
For the SLVD-to-Black state, the values are as for the LVD-to-Black state, with the exception of Vce, which is −20V+Vkb. The SLVD-to-Black state is preceded and followed by a different state. This state may be an LVD-to-black state or a HVD state as discussed later.
As shown in
On the other hand, the column and pixel voltage can be switched to any negative voltage, as that will never open the p-type TFT-switch. The only risk with large negative voltages (and in general for any large voltage) on these electrodes is the possibility of breakthrough of the dielectric between the gate and these electrodes. Therefore, all negative values of the pixel voltage are allowed in this example.
It should be noted that
As shown in
Special care has to be taken for pixels that are already completely black when starting a ‘to black’ state or completely white when starting a ‘to white’ state. The reason is that in SLVD all pixels will be switching, as it is not possible to apply a VEP of 0V over the pixels anymore. Driving a pixel in the extreme switching state further in the same direction is called overdriving and can cause image artifacts due to ‘image sticking like problems’, later on.
As there are typically at least 3 column voltages available, it is possible to choose the speed at which the pixel is driven by addressing a certain voltage VEP standing over a pixel. A pixel in the extreme switching state can therefore be addressed in such a way that it will be driven as slowly as possible in that same direction during a state. Additionally, to avoid overdriving as shown in
At the end of the last SLVD state a similar but reversed problem occurs. The pixels that have to be in one extreme switching state at the end of the update will be driven from their extreme position by a last super low voltage state of the opposite switching direction. For example, pixels that need to be completely white will not keep their switching state when the last state is a SLVD-to-black state, because in super low voltage drive all pixels will switch in the same direction during a state.
This can be avoided, as shown in
Of course, it is to be appreciated that any one of the above embodiments or processes may be combined with one or with one or more other embodiments or processes to provide even further improvements in finding and matching users with particular personalities, and providing relevant recommendations.
It is understood that this invention is especially suited for applications with electrophoretic displays, e.g., E Ink or SiPix, however in general the invention can be applied for any display type that is bistable and not too fast.
Finally, the above-discussion is intended to be merely illustrative of the present system and should not be construed as limiting the appended claims to any particular embodiment or group of embodiments. Thus, while the present system has been described in particular detail with reference to specific exemplary embodiments thereof, it should also be appreciated that numerous modifications and alternative embodiments may be devised by those having ordinary skill in the art without departing from the broader and intended spirit and scope of the present system as set forth in the claims that follow. The specification and drawings are accordingly to be regarded in an illustrative manner and are not intended to limit the scope of the appended claims.
In interpreting the appended claims, it should be understood that:
a) the word “comprising” does not exclude the presence of other elements or acts than those listed in a given claim;
b) the word “a” or “an” preceding an element does not exclude the presence of a plurality of such elements;
c) any reference signs in the claims do not limit their scope;
d) several “means” may be represented by the same or different item(s) or hardware or software implemented structure or function;
e) any of the disclosed elements may be comprised of hardware portions (e.g., including discrete and integrated electronic circuitry), software portions (e.g., computer programming), and any combination thereof;
f) hardware portions may be comprised of one or both of analog and digital portions;
g) any of the disclosed devices or portions thereof may be combined together or separated into further portions unless specifically stated otherwise; and
h) no specific sequence of acts or steps is intended to be required unless specifically indicated.
