1. Field
This disclosure relates generally to communications systems, and in particular, to a super regenerative (SR) apparatus including a plurality of SR amplifiers coupled in parallel and respectively tuned to distinct frequency bands.
2. Background
In the past, communications systems that receive information via ultra-wide band (UWB) channels employ receivers generally consisting of one or more cascaded linear amplifiers. However, when such receivers operate at a frequency range of, for example, several GHz or above, the one or more cascaded linear amplifiers generally consume a substantial amount of power. This may make this receiver architecture undesirable for low power applications, where the power source has a limited continued-use life, such as a battery.
Another drawback with the conventional UWB receiver is that the one or more cascaded linear amplifiers are typically not well suited to reject out-of-band jamming signals. Because of this drawback, conventional UWB receivers typically employ a band pass filter (BPF) between an antenna and the input of the one or more cascaded amplifiers, to reduce or eliminate out-of-band jamming signals. Generally, the BPF may be complicated in order to achieve the desired out-of-band rejection in order to effectively reduce or eliminate out-of-band jamming signals. This has the adverse consequences of increasing the costs associated with conventional UWB receivers. Furthermore, conventional UWB receivers including the one or more cascaded linear amplifiers are generally incapable of effectively reducing or eliminating in-band jamming signals.
An aspect of the disclosure relates to an apparatus comprising a plurality of super regenerative (SR) amplifiers coupled in parallel, wherein the SR amplifiers are tuned to distinct frequency bands, respectively. In another aspect, the distinct frequency bands lie within a defined bandwidth. In yet another aspect, the number N of super regenerative amplifiers, the respective quality factors (Q) of the SR amplifiers, and the respective center frequencies of the distinct frequency bands are configured to provide a defined minimum gain, a defined gain ripple, or a defined frequency response across the defined bandwidth. In yet another aspect, one or more distinct frequency bands may overlap with another one or more distinct frequency bands.
According to another aspect of the disclosure, the apparatus may comprise a first set of isolations amplifiers situated at the respective inputs of the SR amplifiers. Additionally, the apparatus may comprise a second set of isolation amplifiers situated at the respective outputs of the SR amplifiers. The first and second sets of isolation amplifiers isolate the SR amplifiers from each other to prevent injection lock of one amplifier to another. Also, the first set of isolation amplifiers helps prevent power leakage from the SR amplifiers. The apparatus may include an antenna coupled to the inputs of the SR amplifiers for receiving a signal from a communications device. The apparatus may also include a summing device coupled to the outputs of the SR amplifiers to reconstruct the amplified received signal from the signals in the distinct frequency bands amplified by the respective SR amplifiers.
According to yet another aspect of the disclosure, the apparatus may further comprise a circuit adapted to determine whether a jamming signal is present in any of the distinct frequency bands covered by the respective SR amplifiers. In one aspect, the circuit may be adapted to disable one or more SR amplifiers pertaining respectively to one or more distinct frequency bands in which one or more jamming signals are present. In yet another aspect, the circuit may comprise a processor adapted to be controlled by executable codes.
According to still another aspect of the disclosure, the SR amplifiers may form at least a portion of a signal receiver or transceiver. In yet another aspect, the SR amplifiers may form at least a portion of a non-coherent receiver. In other aspects, the apparatus may form part of a wireless communications device adapted to receive audio data from a second wireless communications device via an antenna, and adapted to transmit audio data to the second wireless communications device via the antenna. In still another aspect, the apparatus may form part of a wireless communications device adapted to receive data from a second wireless communications device via an antenna, and process the received data. In still another aspect, the apparatus may form part of a wireless communications device including a sensor adapted to generate sensed data and a transceiver adapted to transmit the sensed data to another communications device via an antenna.
Other aspects, advantages and novel features of the present disclosure will become apparent from the following detailed description of the disclosure when considered in conjunction with the accompanying drawings.
Various aspects of the disclosure are described below. It should be apparent that the teachings herein may be embodied in a wide variety of forms and that any specific structure, function, or both being disclosed herein are merely representative. Based on the teachings herein one skilled in the art should appreciate that an aspect disclosed herein may be implemented independently of any other aspects and that two or more of these aspects may be combined in various ways. For example, an apparatus may be implemented or a method may be practiced using any number of the aspects set forth herein. In addition, such an apparatus may be implemented or such a method may be practiced using other structure, functionality, or structure and functionality in addition to or other than one or more of the aspects set forth herein.
As an example of some of the above concepts, in some aspects, the apparatus may comprise a plurality of super regenerative (SR) amplifiers (also referred to as SR oscillators) coupled in parallel, wherein the SR amplifiers are tuned to distinct frequency bands, respectively. In other aspects, the apparatus may further include isolation amplifiers at the respective inputs and outputs of the SR amplifiers to prevent injection locking and reduce power leakage. In other aspects, the apparatus may include a circuit to reduce or substantially eliminate in-band jamming signals. In yet other aspects, the apparatus may form at least part of a receiver or transceiver. In still other aspects, the apparatus may form at least part of a wireless communications device adapted to receive signals from another wireless communications device, adapted to transmit signals to another wireless communications device, and adapted to both transmit and receive signals to and from another wireless communications device.
More specifically, the SR apparatus 100 comprises a plurality of SR amplifiers 102-1 through 102-N coupled in parallel between an input and an output. In this example, the SR apparatus 100 has N number of SR amplifiers. Each of the SR amplifiers is tuned to a distinct frequency band. For example, SR amplifier 102-1 is tuned to a frequency band having a center frequency represented as f1, SR amplifier 102-2 is tuned to a frequency band having a center frequency represented as f2, and SR amplifier 102-N is tuned to a frequency band having a center frequency represented as fN.
Generally, the distinct frequency bands may reside within a defined bandwidth, such as an ultra-wide band (UWB) channel. For example, an ultra-wide band (UWB) channel may be defined as having a fractional bandwidth on the order of 20% or more, a bandwidth on the order of 500 MHz or more, or a fractional bandwidth on the order of 20% or more and a bandwidth on the order of 500 MHz or more. The number N of SR amplifiers, the respective quality factors (Q) of the SR amplifiers, and the respective center frequencies f1 to fN of the distinct frequency bands may be configured to provide a defined minimum gain, a defined gain ripple, or a defined frequency response across the defined bandwidth.
As discussed in more detail below, the SR apparatus 100 may be useful in eliminating or reducing out-of-band jamming signals as well as in-band jamming signals. For example, each SR amplifier, and in particular, the SR amplifiers at the ends of the defined bandwidth, such as SR amplifiers 102-1 and 102-N, may be configured to have a relatively high quality factor (Q). As such, the SR amplifier will have a relatively high gain near its center frequency, and high attenuation for frequencies relatively far from its center frequency. Thus, the SR amplifier may inherently attenuate jamming signals that may reside outside of the defined bandwidth, thereby providing substantial rejection or elimination of out-of-band jamming signals.
With regard to in-band jamming signals, the SR apparatus 100 may be configured with a relatively large number N of SR amplifiers. In such as case, each SR amplifier may amplify signals only within a relatively small sub-band within the defined bandwidth. Thus, if the jamming signal lies within one of the sub-bands, the corresponding SR amplifier may be turned off or disabled to prevent or reduce the presence of the jamming signal at the output of the SR apparatus 100. Since, as discussed above, the sub-band may be relatively small as compared to the defined bandwidth, the effect of turning off or disabling the SR amplifier corresponding to the jamming signal may be negligible or minimal to a broadband (e.g., UWB) signal being received and amplified by the SR apparatus 100.
More specifically, the band pass filter (BPF) 208 is coupled between the antenna 210 and the inputs of the plurality of input isolation amplifiers 204-1 through 204-N. The outputs of the input isolation amplifiers 204-1 through 204-N are coupled respectively to the inputs of the SR amplifiers 202-1 through 202-N. The outputs of the SR amplifiers 202-1 through 202-N are coupled respectively to the inputs of the output isolation amplifiers 206-1 through 206-N. The outputs of the output isolation amplifiers 206-1 through 206-N are coupled to the input of the summing device 212.
The antenna 210 receives the intended signal and possibly out-of-band and/or in-band jamming signals. The band pass filter (BPF) 208 provides an initial filtering of the received signals mainly to reduce or eliminate out-of-band jamming signals at the inputs of the input isolation amplifiers 204-1 through 204-N. Since, as discussed above, the SR amplifiers 202-1 through 202-N have inherent out-of-band rejection characteristics, the filtering specification for the band pass filter (BPF) 208 may be relaxed. Alternatively, the band pass filter (BPF) 208 may be eliminated altogether.
The input and output isolation amplifiers isolate the SR amplifiers from each other. This is to prevent injection locking of one SR amplifier to another. Additionally, the input isolation amplifiers also assist in preventing power leaking from the SR amplifiers to the antenna. Otherwise, this may generate unwanted radiation, which may result in a violation of governmental laws, rules or regulations that govern the control of electromagnetic radiation emissions. The parallel SR amplifiers 202-1 through 202-N respectively amplify the corresponding frequency components of the received signal within the distinct frequency bands, respectively. The summing device 212 reconstructs the amplified received signal from the corresponding frequency components received respectively from the outputs of the output isolation amplifiers 206-1 through 206-N.
As discussed above with reference to the previous embodiments, the SR amplifiers 202-1 through 202-N are tuned to distinct frequency bands having respective center frequencies represented as f1 to fN. The distinct frequency bands may reside within a defined bandwidth, such as an ultra-wide band (UWB) channel. The number N of SR amplifiers, the respective quality factors (Q) of the SR amplifiers, and the respective center frequencies f1 to fN of the distinct frequency bands may be configured to provide a defined minimum gain, a defined gain ripple, or a defined frequency response across the defined bandwidth. This is better explained with reference to the exemplary graph depicted in
Note that, in this example, the frequency responses of the SR amplifiers overlap with each other. This is done to provide an overall frequency response for the defined bandwidth. The center frequency governs the position of the individual frequency response within the defined bandwidth. The quality factor (Q) governs the width of the individual frequency response. For example, the higher quality factor (Q), the more narrow is the individual frequency response. Conversely, the lower quality factor (Q), the wider is the individual frequency response. Also, the number N of SR amplifiers affect the overall frequency response for the defined bandwidth. As discussed above, by properly selecting the number N of SR amplifiers, the respective quality factors (Q) of the SR amplifiers, and the respective center frequencies f1 to fN of the distinct frequency bands, a desired overall frequency response for the defined bandwidth may be achieved, which may include a defined minimum gain and/or a defined gain ripple.
The SR receiver 300 further comprises a power detector 314, a signal conditioner 324, an analog-to-digital converter (ADC) 322, an input/output (I/O) device 320, a processor 316, and a memory 318. The power detector 314 generates a signal indicative of the power level at the output of the SR receiver 300. The signal conditioner 324 modifies (e.g., amplifies, filters, etc.) the signal from the power detector 314 so it is at an appropriate level with reduced noise for conversion into digital format. The ADC 322 converts the conditioned signal into digital format, which is subsequently sent to the processor 316 via the I/O device 320 for analysis. The I/O device 320 receives the signal from the ADC 322 and passes it to the processor 316, as well as passes enable/disable signals En-1 through En-N from the processor 316 respectively to the SR amplifiers 302-1 through 302-N.
The processor 316 performs the various operations described hereinafter to reduce or substantially eliminate in-band jamming signals. The memory 316, which could be any type of computer readable medium, such as random access memory (RAM), read only memory (ROM), magnetic disk, optical disc, and variations thereof, stores one or more software modules that controls the processor 316 in performing its various operations. The memory 318 may store data as well, such as information as to which channels or SR amplifiers are enabled and which channels or SR amplifiers are disabled to reduce or eliminate in-band jamming signals. The following describes an exemplary method performed by the processor 316 for dealing with in-band jamming signals.
According to the method 350, the processor 316 disables the SR amplifiers 302-1 through 302-N (block 352). The processor 316 may perform the disabling of the SR amplifiers 302-1 through 302-N by sending the appropriate disabling signals thereto respectively via the En-1 through En-N. The processor 316 then sets an index K to 1 (block 354). The index K identifies the SR amplifier 302-K which will be currently checked to determine whether it is amplifying an in-band jamming signal. The processor 316 then enables the Kth SR amplifier (block 356). The processor 316 may perform the enabling of the Kth SR amplifier by sending the appropriate enabling signal En-K to the SR amplifier 302-K. For example, if K is equal to 1, the processor 316 enables SR amplifier 302-1. As discussed above, the rest of the SR amplifiers 302-2 through 302-N have been disabled.
Then, according to the method 350, the SR amplifier 302-K is allowed to operate for a few quench cycles (block 358). This is to allow the SR amplifier 302-K to sufficiently stabilize for the purposes of monitoring the output of the SR receiver 300 for in-band jamming signals. The processor 316 then determines the power level at the output of the SR receiver 300 (block 360). As discussed above, the processor 316 may determine the output power level by monitoring the signal received from the ADC 322. The processor 316 then determines whether the power level of the receiver output is greater than a defined threshold (block 362). The defined threshold may be related to the power level produced by ambient noise. One method of determining the defined threshold is to disconnect the antenna 310 and connect therefore a 50 Ohm termination. The corresponding value at the output of the ADC 322 may then be used as the defined threshold. Alternatively, the defined threshold may be determined by measuring the ambient temperature with a temperature sensor, and then using a look-up table to map the sensed temperature to the defined threshold. If the processor 316 determines that the power level of the receiver output is greater than the defined threshold, the processor 316 notes that there is a jamming signal in the Kth channel (block 364). The processor 316 then disables the SR amplifier 302-K as specified in block 366.
If the power level at the receiver output is below the defined threshold, the processor 316 skips block 364 and disables the SR amplifier 302-K (block 366). The processor 316 may perform this by sending the appropriate disabling signal En-K to the SR amplifier 302-K. The processor 316 then increments the index K to select the next SR amplifier to undergo the in-band jamming signal check (block 368). The processor 316 then checks whether the index K is equal to N+1 (block 370). If it is, which means that all of the SR amplifiers have been checked for in-band jamming signals, the processor 316 then enables all of the SR amplifiers, except those identified in block 364 as having an in-band jamming signal. If, in block 370, the index K does not equal to N+1, the processor 316 then returns to block 356 to perform the in-band jamming signal check for the next SR amplifier. Thus, according to the method 350, any SR amplifier that amplifies an in-band jamming signal is disabled in order to prevent the in-band jamming signal from propagating to the output of the SR receiver 300. If the number N of SR amplifiers is chosen to be relatively large, the effects on the overall frequency response due to a small number of SR amplifiers being disabled should be small.
As discussed above, the SR receiver front-end 406 receives and amplifies signals received from other communications devices. The RF-to-baseband receiver portion 408 converts the received signal from RF to baseband for further processing by the baseband unit 410. The RF-to-baseband receiver portion 408 may be configured as a non-coherent receiver, such as an energy-detection receiver. The baseband unit 410 processes the baseband signal to ascertain the information carried therein. The baseband-to-RF transmitter portion 412 converts outgoing signals generated by the baseband unit 410 into RF for transmission via the wireless medium. The transmitter 414 conditions the outgoing signal (e.g., by power amplifying, pulse modulating, etc.) for transmission of the outgoing signals to other communications devices via the wireless medium.
Although not shown, the receiver 406 and/or 408 may be controlled by a pulse modulating device in order to establish a receiving communications channel (e.g., an ultra-wide band (UWB) communications channel) using pulse division multiple access (PDMA), pulse division multiplexing (PDM), or other type of pulse modulation. Although not shown, the transmitter 412 and/or 414 may be controlled by a pulse modulating device to enable signal transmission at particular instances defined by pulses in order to establish a transmitting communications channel (e.g., an ultra-wide band (UWB) communications channel) using PDMA, PDM, or other type of pulse modulation. The transmitting and receiving channels may be established concurrently, although the channels may be orthogonal so as not to interfere with each other. Using pulse modulation techniques to enable and disable the transmitter and receiver, improved power efficiency may be achieved for the communications device 400. For example, during times when the transmitter is not transmitting and the receiver is not receiving, these devices may be operated in low or no power mode to conserve power, such as power provided by a battery.
The pulse repetition frequency (PRF) defined for a given channel may depend on the data rate or rates supported by that channel. For example, a channel supporting very low data rates (e.g., on the order of a few kilobits per second or Kbps) may employ a corresponding low pulse repetition frequency (PRF). Conversely, a channel supporting relatively high data rates (e.g., on the order of a several megabits per second or Mbps) may employ a correspondingly higher pulse repetition frequency (PRF).
It should be appreciated that other techniques may be used to define channels in accordance with a pulse modulation schemes. For example, a channel may be defined based on different spreading pseudo-random number sequences, or some other suitable parameter or parameters. Moreover, a channel may be defined based on a combination of two or more parameters.
In operation, the data processor 716 may receive data from other communications device via the antenna 702 which picks up the RF signal from the other communications device, the Tx/Rx isolation device 704 which sends the signal to the SR receiver front-end 706, the SR receiver front-end 706 which amplifies the received signal, the RF-to-baseband receiver portion 708 which converts the RF signal into a baseband signal, and the baseband unit 710 which processes the baseband signal to determine the received data. The data processor 716 then performs one or more defined operations based on the received data. For example, the data processor 716 may include a microprocessor, a microcontroller, a reduced instruction set computer (RISC) processor, a display, an audio device including a transducer such as speakers, a medical device, a robotic or mechanical device responsive to the data, etc.
Further, in operation, the data generator 718 may generate outgoing data for transmission to another communications device via the baseband unit 710 which processes the outgoing data into a baseband signal for transmission, the baseband-to-RF transmitter portion 712 converts the baseband signal into an RF signal, the transmitter 714 conditions the RF signal for transmission via the wireless medium, the Tx/Rx isolation device 704 which routes the RF signal to the antenna 702 while isolating the input to the SR receiver front-end 706, and the antenna 702 which radiates the RF signal to the wireless medium. The data generator 718 may be a sensor or other type of data generator. For example, the data generator 718 may include a microprocessor, a microcontroller, a RISC processor, a keyboard, a pointing device such as a mouse or a track ball, an audio device including a transducer such as a microphone, a medical device, a robotic or mechanical device that generates data, etc.
In operation, the data processor 810 may receive data from other communications device via the antenna 802 which picks up the RF signal from the other communications device, the SR receiver front-end 804 which amplifies the received signal, the RF-to-baseband receiver portion 806 which converts the RF signal into a baseband signal, and the baseband unit 808 which processes the baseband signal to determine the received data. The data processor 810 then performs one or more defined operations based on the received data. For example, the data processor 810 may include a microprocessor, a microcontroller, a RISC processor, a display, an audio device including a transducer, such as speakers, a medical device, a robotic or mechanical device responsive to the data, etc.
In operation, the data generator 910 may generate outgoing data for transmission to another communications device via the baseband unit 908 which processes the outgoing data into a baseband signal for transmission, the baseband-to-RF transmitter portion 906 which converts the baseband signal into an RF signal, the transceiver 904 which conditions the RF signal for transmission via the wireless medium, and the antenna 902 which radiates the RF signal to the wireless medium. The data generator 910 may be a sensor or other type of data generator. For example, the data generator 910 may include a microprocessor, a microcontroller, a RISC processor, a keyboard, a pointing device such as a mouse or a track ball, an audio device including a transducer such as a microphone, a medical device, a robotic or mechanical device that generates data, etc.
Various aspects of the disclosure have been described above. It should be apparent that the teachings herein may be embodied in a wide variety of forms and that any specific structure, function, or both being disclosed herein is merely representative. Based on the teachings herein one skilled in the art should appreciate that an aspect disclosed herein may be implemented independently of any other aspects and that two or more of these aspects may be combined in various ways. For example, an apparatus may be implemented or a method may be practiced using any number of the aspects set forth herein. In addition, such an apparatus may be implemented or such a method may be practiced using other structure, functionality, or structure and functionality in addition to or other than one or more of the aspects set forth herein. As an example of some of the above concepts, in some aspects concurrent channels may be established based on pulse repetition frequencies. In some aspects concurrent channels may be established based on pulse position or offsets. In some aspects concurrent channels may be established based on time hopping sequences. In some aspects concurrent channels may be established based on pulse repetition frequencies, pulse positions or offsets, and time hopping sequences.
Those of skill in the art would understand that information and signals may be represented using any of a variety of different technologies and techniques. For example, data, instructions, commands, information, signals, bits, symbols, and chips that may be referenced throughout the above description may be represented by voltages, currents, electromagnetic waves, magnetic fields or particles, optical fields or particles, or any combination thereof.
Those of skill would further appreciate that the various illustrative logical blocks, modules, processors, means, circuits, and algorithm steps described in connection with the aspects disclosed herein may be implemented as electronic hardware (e.g., a digital implementation, an analog implementation, or a combination of the two, which may be designed using source coding or some other technique), various forms of program or design code incorporating instructions (which may be referred to herein, for convenience, as “software” or a “software module”), or combinations of both. To clearly illustrate this interchangeability of hardware and software, various illustrative components, blocks, modules, circuits, and steps have been described above generally in terms of their functionality. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the overall system. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present disclosure.
The various illustrative logical blocks, modules, and circuits described in connection with the aspects disclosed herein may be implemented within or performed by an integrated circuit (“IC”), an access terminal, or an access point. The IC may comprise a general purpose processor, a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete hardware components, electrical components, optical components, mechanical components, or any combination thereof designed to perform the functions described herein, and may execute codes or instructions that reside within the IC, outside of the IC, or both. A general purpose processor may be a microprocessor, but in the alternative, the processor may be any conventional processor, controller, microcontroller, or state machine. A processor may also be implemented as a combination of computing devices, e.g., a combination of a DSP and a microprocessor, a plurality of microprocessors, one or more microprocessors in conjunction with a DSP core, or any other such configuration.
It is understood that any specific order or hierarchy of steps in any disclosed process is an example of a sample approach. Based upon design preferences, it is understood that the specific order or hierarchy of steps in the processes may be rearranged while remaining within the scope of the present disclosure. The accompanying method claims present elements of the various steps in a sample order, and are not meant to be limited to the specific order or hierarchy presented.
The steps of a method or algorithm described in connection with the aspects disclosed herein may be embodied directly in hardware, in a software module executed by a processor, or in a combination of the two. A software module (e.g., including executable instructions and related data) and other data may reside in a data memory such as RAM memory, flash memory, ROM memory, EPROM memory, EEPROM memory, registers, a hard disk, a removable disk, a CD-ROM, or any other form of computer-readable storage medium known in the art. A sample storage medium may be coupled to a machine such as, for example, a computer/processor (which may be referred to herein, for convenience, as a “processor”) such the processor can read information (e.g., code) from and write information to the storage medium. A sample storage medium may be integral to the processor. The processor and the storage medium may reside in an ASIC. The ASIC may reside in user equipment. In the alternative, the processor and the storage medium may reside as discrete components in user equipment. Moreover, in some aspects any suitable computer-program product may comprise a computer-readable medium comprising codes relating to one or more of the aspects of the disclosure. In some aspects a computer program product may comprise packaging materials.
While the invention has been described in connection with various aspects, it will be understood that the invention is capable of further modifications. This application is intended to cover any variations, uses or adaptation of the invention following, in general, the principles of the invention, and including such departures from the present disclosure as come within the known and customary practice within the art to which the invention pertains.
Number | Name | Date | Kind |
---|---|---|---|
2614216 | Tellier | Oct 1952 | A |
4123715 | Fathauer | Oct 1978 | A |
4754255 | Sanders et al. | Jun 1988 | A |
5548821 | Coveley | Aug 1996 | A |
5608724 | Green, Jr. | Mar 1997 | A |
5621756 | Bush et al. | Apr 1997 | A |
5630216 | McEwan | May 1997 | A |
5687169 | Fullerton | Nov 1997 | A |
5742902 | Shore | Apr 1998 | A |
5751197 | Boling, III | May 1998 | A |
5764696 | Barnes et al. | Jun 1998 | A |
5812081 | Fullerton | Sep 1998 | A |
5832035 | Fullerton | Nov 1998 | A |
5907427 | Scalora et al. | May 1999 | A |
5907799 | Morey | May 1999 | A |
5952956 | Fullerton | Sep 1999 | A |
5960031 | Fullerton et al. | Sep 1999 | A |
5963581 | Fullerton et al. | Oct 1999 | A |
5969663 | Fullerton et al. | Oct 1999 | A |
5995534 | Fullerton et al. | Nov 1999 | A |
6031862 | Fullerton et al. | Feb 2000 | A |
6091374 | Barnes | Jul 2000 | A |
6111536 | Richards et al. | Aug 2000 | A |
6133876 | Fullerton et al. | Oct 2000 | A |
6177903 | Fullerton et al. | Jan 2001 | B1 |
6218979 | Barnes et al. | Apr 2001 | B1 |
6295019 | Richards et al. | Sep 2001 | B1 |
6297773 | Fullerton et al. | Oct 2001 | B1 |
6300903 | Richards et al. | Oct 2001 | B1 |
6304623 | Richards et al. | Oct 2001 | B1 |
6351652 | Finn et al. | Feb 2002 | B1 |
6354946 | Finn | Mar 2002 | B1 |
6400307 | Fullerton et al. | Jun 2002 | B2 |
6400329 | Barnes | Jun 2002 | B1 |
6421389 | Jett et al. | Jul 2002 | B1 |
6430208 | Fullerton et al. | Aug 2002 | B1 |
6437756 | Schantz | Aug 2002 | B1 |
6462701 | Finn | Oct 2002 | B1 |
6466125 | Richards et al. | Oct 2002 | B1 |
6469628 | Richards et al. | Oct 2002 | B1 |
6483461 | Matheney et al. | Nov 2002 | B1 |
6487264 | Alley et al. | Nov 2002 | B1 |
6489893 | Richards et al. | Dec 2002 | B1 |
6492904 | Richards | Dec 2002 | B2 |
6492906 | Richards et al. | Dec 2002 | B1 |
6501393 | Richards et al. | Dec 2002 | B1 |
6504483 | Richards et al. | Jan 2003 | B1 |
6512455 | Finn et al. | Jan 2003 | B2 |
6512488 | Schantz | Jan 2003 | B2 |
6519464 | Santhoff et al. | Feb 2003 | B1 |
6529568 | Richards et al. | Mar 2003 | B1 |
6538615 | Schantz | Mar 2003 | B1 |
6539213 | Richards et al. | Mar 2003 | B1 |
6549567 | Fullerton | Apr 2003 | B1 |
6552677 | Barnes et al. | Apr 2003 | B2 |
6556621 | Richards et al. | Apr 2003 | B1 |
6560463 | Santhoff | May 2003 | B1 |
6571089 | Richards et al. | May 2003 | B1 |
6573857 | Fullerton et al. | Jun 2003 | B2 |
6577691 | Richards et al. | Jun 2003 | B2 |
6585597 | Finn | Jul 2003 | B2 |
6593886 | Schantz | Jul 2003 | B2 |
6606051 | Fullerton et al. | Aug 2003 | B1 |
6611234 | Fullerton et al. | Aug 2003 | B2 |
6614384 | Hall et al. | Sep 2003 | B2 |
6621462 | Barnes | Sep 2003 | B2 |
6636566 | Roberts et al. | Oct 2003 | B1 |
6636567 | Roberts et al. | Oct 2003 | B1 |
6636573 | Richards et al. | Oct 2003 | B2 |
6642903 | Schantz | Nov 2003 | B2 |
6661342 | Hall et al. | Dec 2003 | B2 |
6667724 | Barnes et al. | Dec 2003 | B2 |
6670909 | Kim | Dec 2003 | B2 |
6671310 | Richards et al. | Dec 2003 | B1 |
6674396 | Richards et al. | Jan 2004 | B2 |
6677796 | Brethour et al. | Jan 2004 | B2 |
6700538 | Richards | Mar 2004 | B1 |
6710736 | Fullerton et al. | Mar 2004 | B2 |
6717992 | Cowie et al. | Apr 2004 | B2 |
6748040 | Johnson et al. | Jun 2004 | B1 |
6750757 | Gabig, Jr. et al. | Jun 2004 | B1 |
6759948 | Grisham et al. | Jul 2004 | B2 |
6760387 | Langford et al. | Jul 2004 | B2 |
6762712 | Kim | Jul 2004 | B2 |
6763057 | Fullerton et al. | Jul 2004 | B1 |
6763282 | Glenn et al. | Jul 2004 | B2 |
6774846 | Fullerton et al. | Aug 2004 | B2 |
6774859 | Schantz et al. | Aug 2004 | B2 |
6778603 | Fullerton et al. | Aug 2004 | B1 |
6781530 | Moore | Aug 2004 | B2 |
6782048 | Santhoff | Aug 2004 | B2 |
6788730 | Richards et al. | Sep 2004 | B1 |
6822604 | Hall et al. | Nov 2004 | B2 |
6823022 | Fullerton et al. | Nov 2004 | B1 |
6836223 | Moore | Dec 2004 | B2 |
6836226 | Moore | Dec 2004 | B2 |
6845253 | Schantz | Jan 2005 | B1 |
6847675 | Fullerton et al. | Jan 2005 | B2 |
6879878 | Glenn et al. | Apr 2005 | B2 |
6882301 | Fullerton | Apr 2005 | B2 |
6895034 | Nunally et al. | May 2005 | B2 |
6900732 | Richards | May 2005 | B2 |
6906625 | Taylor et al. | Jun 2005 | B1 |
6907244 | Santhoff et al. | Jun 2005 | B2 |
6912240 | Kumar et al. | Jun 2005 | B2 |
6914949 | Richards et al. | Jul 2005 | B2 |
6915146 | Nguyen et al. | Jul 2005 | B1 |
6917284 | Grisham et al. | Jul 2005 | B2 |
6919838 | Santhoff | Jul 2005 | B2 |
6922166 | Richards et al. | Jul 2005 | B2 |
6922177 | Barnes et al. | Jul 2005 | B2 |
6925109 | Richards et al. | Aug 2005 | B2 |
6933882 | Fullerton | Aug 2005 | B2 |
6937639 | Pendergrass et al. | Aug 2005 | B2 |
6937663 | Jett et al. | Aug 2005 | B2 |
6937667 | Fullerton et al. | Aug 2005 | B1 |
6937674 | Santhoff et al. | Aug 2005 | B2 |
6947492 | Santhoff et al. | Sep 2005 | B2 |
6950485 | Richards et al. | Sep 2005 | B2 |
6954480 | Richards et al. | Oct 2005 | B2 |
6959031 | Haynes et al. | Oct 2005 | B2 |
6959032 | Richards et al. | Oct 2005 | B1 |
6963727 | Shreve | Nov 2005 | B2 |
6980613 | Krivokapic | Dec 2005 | B2 |
6989751 | Richards | Jan 2006 | B2 |
7015793 | Gabig, Jr. et al. | Mar 2006 | B2 |
7020224 | Krivokapic | Mar 2006 | B2 |
7027425 | Fullerton et al. | Apr 2006 | B1 |
7027483 | Santhoff et al. | Apr 2006 | B2 |
7027493 | Richards | Apr 2006 | B2 |
7030806 | Fullerton | Apr 2006 | B2 |
7042417 | Santhoff et al. | May 2006 | B2 |
7046187 | Fullerton et al. | May 2006 | B2 |
7046618 | Santhoff et al. | May 2006 | B2 |
7069111 | Glenn et al. | Jun 2006 | B2 |
7075476 | Kim | Jul 2006 | B2 |
7079827 | Richards et al. | Jul 2006 | B2 |
7099367 | Richards et al. | Aug 2006 | B2 |
7099368 | Santhoff et al. | Aug 2006 | B2 |
7129886 | Hall et al. | Oct 2006 | B2 |
7132975 | Fullerton et al. | Nov 2006 | B2 |
7145954 | Pendergrass et al. | Dec 2006 | B1 |
7148791 | Grisham et al. | Dec 2006 | B2 |
7151490 | Richards | Dec 2006 | B2 |
7167525 | Santhoff et al. | Jan 2007 | B2 |
7170408 | Taylor et al. | Jan 2007 | B2 |
7184938 | Lansford et al. | Feb 2007 | B1 |
7190722 | Lakkis et al. | Mar 2007 | B2 |
7190729 | Siwiak | Mar 2007 | B2 |
7206334 | Siwiak | Apr 2007 | B2 |
7209724 | Richards et al. | Apr 2007 | B2 |
7230980 | Langford et al. | Jun 2007 | B2 |
7239277 | Fullerton et al. | Jul 2007 | B2 |
RE39759 | Fullerton | Aug 2007 | E |
7256727 | Fullerton et al. | Aug 2007 | B2 |
7271779 | Hertel | Sep 2007 | B2 |
20020168957 | Mapes | Nov 2002 | A1 |
20030139158 | Kan | Jul 2003 | A1 |
20050069051 | Lourens | Mar 2005 | A1 |
20060084469 | Malone et al. | Apr 2006 | A1 |
Number | Date | Country |
---|---|---|
1425223 | Jun 2003 | CN |
1137710 | May 1989 | JP |
4082304 | Mar 1992 | JP |
9121200 | May 1997 | JP |
2001267864 | Sep 2001 | JP |
2004364068 | Dec 2004 | JP |
WO0167625 | Sep 2001 | WO |
Number | Date | Country | |
---|---|---|---|
20090016548 A1 | Jan 2009 | US |