Claims
- 1. A transimpedance amplifier comprising:
- (a) a first high temperature superconducting flux flow transistor having a control line;
- (b) a second high temperature superconducting flux flow transistor having a control line, said second transistor connected in parallel with said first transistor;
- (c) means to drive said control lines, said control line driving means to apply a signal of opposite polarity to said second transistor than a signal to said first transistor; and
- (d) means to provide a current bias to said transistors sufficient to drive said transistors into a flux flow state;
- wherein an output signal from said means to drive said control lines is converted to higher signal and higher impedance levels which is taken across said transistors.
- 2. The transimpedance amplifier of claim 1, further comprising:
- (e) a first impedance element with a resistive component connected between said first superconducting flux flow transistor and said means to provide a current bias to said first transistor; and
- (f) a second impedance element with a resistive component connected between said second superconducting flux flow transistor and said means to provide a current bias to said second transistor;
- wherein said first and second impedance elements increase said output signal and impedance.
- 3. The transimpedance amplifier of claim 1, wherein said means to drive said control lines is a weak current source.
- 4. The transimpedance amplifier of claim 3, wherein said weak current source is at least one Josephson junction.
- 5. The transimpedance amplifier of claim 3, wherein said weak current source is at least one far-infrared focal plane detector.
- 6. The transimpedance amplifier of claim 3, wherein said output is applied to electronics having higher signal and impedance.
- 7. A transimpedance amplifier comprising:
- (a) a first high temperature superconducting flux flow transistor having a first control line;
- (b) a second high temperature superconducting flux flow transistor having a second control line, said first and second superconducting flux flow transistor connected in parallel
- (c) a bias means to provide a bias current sufficient to drive said first and second superconducting flux flow transistor into a flux flow state; said bias current split between each of said superconducting flux flow transistors arranged as a differential amplifier;
- (d) a weak current input to said first and second superconducting flux flow transistors at said first and second control lines, respectively, wherein said input to said first superconducting flux flow transistor is of opposite polarity than the input to said second superconducting flux flow transistor;
- wherein said input is amplified by said differential amplifier arrangement to be an output taken across each of said superconducting flux flow transistors.
- 8. A double differential transimpedance amplifier comprising:
- (a) a bias means connected to each of a plurality of high temperature superconducting flux flow transistors to provide a bias current sufficient to drive each of said plurality of superconducting flux flow transistors into a flux flow state;
- (b) a first high temperature superconducting flux flow transistor;
- (c) a second high temperature superconducting flux flow transistor, said first and second superconducting flux flow transistor connected in parallel;
- (d) an input applied to said first and second superconducting flux flow transistor, said input of low impedance and weak current, wherein said input as applied to said first superconducting flux flow transistor is of opposite polarity than that applied to said second superconducting flux flow transistor;
- (e) an output of said first and second superconducting flux flow transistor wherein said output is an amplified signal of said input;
- (f) a third high temperature superconducting flux flow transistor, and an ancillary impedance connected between said bias means and said third superconducting flux flow transistor, and a second input which is said output of said first and second superconducting flux flow transistor;
- (g) a fourth high temperature superconducting flux flow transistor, and an ancillary impedance connected between said bias means and said fourth superconducting flux flow transistor, and a second input which is said output of said first and second superconducting flux flow transistor, wherein said input as applied to said fourth superconducting flux flow transistor is of opposite polarity than that applied to said third superconducting flux flow transistor, said third and fourth superconducting flux flow transistor connected in parallel,
- (g) a second output which is an amplified signal of said second input,
- wherein said input is amplified by said double differential transimpedance amplifier to be said second output taken across said third and fourth superconducting flux flow transistors.
- 9. The transimpedance amplifier of claim 8, wherein said input is from at least one Josephson junction.
- 10. The transimpedance amplifier of claim 8, wherein said input is from at least one far-infrared focal plane detector.
- 11. The transimpedance amplifier of claim 8, wherein said second output is applied to electronics having higher signal and impedance.
- 12. A transimpedance amplifier stage, comprising:
- (a) at least one differential amplifier comprised of two high temperature superconducting flux flow transistors connected in parallel wherein an input signal is applied to each of said superconducting flux flow transistors, said signal applied as opposite polarity to each of said superconducting flux flow transistors;
- (b) means to supply a bias current to each of said superconducting flux flow transistors sufficient to drive each superconducting flux flow transistor into a flux flow state;
- wherein said input signal is amplified by said differential amplifier to be an output signal of higher impedance.
- 13. A multiple-stage transimpedance amplifier, comprising:
- (a) a first amplifier stage of claim 12, wherein said input signal is derived from a weak current source;
- (b) at least one intermediate amplifier stage, comprising the amplifier stage of claim 12, wherein an intermediate input signal of said intermediate amplifier stage is an output of a previous amplifier stage, and an intermediate output signal of said intermediate amplifier stage is of higher impedance and magnitude than both of said input signals;
- (c) a final amplifier stage, comprising the amplifier stage of claim 12, and further comprising an impedance element with a resistive component placed between said means to supply said bias current and said superconducting flux flow transistors of said final amplifier stage, wherein a final input to said final amplifier stage is an output signal of a previous amplifier stage, wherein an ultimate output signal of said multiple stage transimpedance amplifier is of higher impedance and magnitude than said input signals.
Government Interests
The United States Government has rights in this invention pursuant to Contract No. DE-AC04-76DP00789 between the Department of Energy and American Telephone & Telegraph Company.
US Referenced Citations (1)
Number |
Name |
Date |
Kind |
3356960 |
Edwards et al. |
Dec 1967 |
|