Superconducting transmission line driver system

Abstract

One example includes a superconducting transmission line driver system. The system includes an input stage configured to receive an input pulse and an AC bias current source configured to provide an AC bias current. The system also includes an amplifier coupled to the input stage and configured to generate a plurality of sequential SFQ pulses based on the input pulse in response to the AC bias current. The system further includes a low-pass filter configured to filter the plurality of sequential SFQ pulses to generate an amplified output pulse that is output to a transmission line.

Description

TECHNICAL FIELD

This disclosure relates generally to classical and quantum computing systems, and more specifically to a superconducting transmission line driver system.

BACKGROUND

Superconducting digital technology has provided computing and/or communications resources that benefit from unprecedented high speed, low power dissipation, and low operating temperature. Quantum computer systems typically implement very low amplitude voltage pulses, such as single flux quantum (SFQ) pulses or reciprocal quantum logic (RQL) pulses to communicate data. Such very low amplitude voltage pulses are implemented for substantially all logic functions and/or communication of data between different logic gates and/or different portions of a given quantum computer system. As an example, a quantum computer system can include an interface that couples portions of the computer system between a cold-space (e.g., in which superconducting occurs) and a non-cold space where classical computing functions are performed. Additionally, interconnects can extend along long transmission lines, such that signal attenuation can be a concern for the very low amplitude voltage pulses.

SUMMARY

One example includes a superconducting transmission line driver system. The system includes an input stage configured to receive an input pulse and an AC bias current source configured to provide an AC bias current. The system also includes an amplifier coupled to the input stage and configured to generate a plurality of sequential single flux quantum (SFQ) pulses based on the input pulse in response to the AC bias current. The system further includes a low-pass filter configured to filter the plurality of sequential SFQ pulses to generate an amplified output pulse that is output to a transmission line.

Another example includes a method for providing an amplified output pulse to a transmission line. The method includes providing an AC current to a transformer to inductively provide an AC bias current. The method further includes providing an input pulse to an input stage to trigger at least one unshunted Josephson junction associated with a SQUID via the input pulse and the AC bias current. The at least one unshunted Josephson junction can be configured to generate a plurality of sequential SFQ pulses in response to being triggered. The plurality of sequential SFQ pulses can be filtered via a low-pass filter to generate the amplified output pulse that is provided on the transmission line via the low-pass filter.

Another example includes a superconducting transmission line driver system. The system includes an input stage configured to receive a reciprocal quantum logic (RQL) pulse and an AC bias current source configured to inductively provide an AC bias current based on an RQL clock signal. The system also includes a SQUID coupled to the input stage and configured to generate a plurality of sequential positive SFQ pulses in a positive portion of the AC bias current and in response to the input pulse, and to generate a plurality of negative flux quantum pulses in a negative portion of the AC bias current. The system further includes a low-pass filter configured to filter the plurality of sequential positive SFQ pulses to generate an amplified positive output pulse that is output to a transmission line, and to filter the plurality of sequential negative SFQ pulses to generate an amplified negative output pulse that is output to the transmission line.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 illustrates an example of a superconducting transmission line driver system.

FIG. 2 illustrates an example of a superconducting transmission line driver circuit.

FIG. 3 illustrates another example of a superconducting transmission line driver circuit.

FIG. 4 illustrates yet another example of a superconducting transmission line driver circuit.

FIG. 5 illustrates an example of a method for providing an amplified output pulse to a transmission line.

DETAILED DESCRIPTION

This disclosure relates generally to classical and quantum computing systems, and more specifically to a superconducting transmission line driver system. The superconducting transmission line driver system can include an input stage that is configured to receive a trigger pulse, such as a single flux quantum (SFQ) pulse or a reciprocal quantum logic (RQL) pulse, to initiate activation of the superconducting transmission line driver system. As an example, the trigger pulse can correspond to a data pulse that is intended to be communicated across a transmission line (e.g., an approximately 25-ohm transmission line) that is configured to propagate the data pulse to mitigate signal attenuation with respect to a receiving device. The superconducting transmission line driver system can also include an AC bias current source configured to generate an AC bias current. As an example, the AC bias current source can be configured as a transformer configured to propagate an AC signal, such as an RQL clock signal, in a primary winding to inductively provide the AC bias current via a secondary winding.

The superconducting transmission line driver system also includes an amplifier that is coupled to the input stage and that is configured to generate a sequential plurality of flux pulses based on the trigger pulse. As an example, the amplifier can be configured as a superconducting quantum interference device (SQUID). The SQUID includes at least one Josephson junction that is configure to be activated in response to the AC bias current and the trigger pulse to generate the plurality of sequential SFQ pulses. For example, the Josephson junction(s) can be unshunted to provide substantially repeated triggering at a very high frequency (e.g., approximately 250 GHz). As an example, the input stage can include a resistor coupled to the amplifier (e.g., to each of a pair of the unshunted Josephson junctions of the SQUID) to provide for a common mode triggering of the Josephson junctions. The superconducting transmission line driver system can also include a low-pass filter that is coupled to the amplifier, such that the sequential SFQ pulses can be filtered to generate a single amplified output pulse that is provided on the transmission line. Because the superconducting transmission line driver system implements an AC bias current, the negative portion of the AC bias current can be implemented, for example, to reset the unshunted Josephson junction(s) of the SQUID, and can thus provide an amplified negative output pulse on the transmission line via the low-pass filter.

FIG. 1 illustrates an example of a superconducting transmission line driver system 10. The superconducting transmission line driver system 10 can be implemented in any of a variety of quantum computing applications to provide data across a transmission line. As a result, a quantum data pulse (e.g., an SFQ pulse or RQL pulse) can be provided across the long transmission line without attenuating to an unusable amplitude at the receiver device.

The superconducting transmission line driver system 10 includes an input stage 12 that is configured to receive a trigger pulse, demonstrated in the example of FIG. 1 as a signal PLS_IN. As an example, the trigger pulse PLS_IN can be provided as a single flux quantum (SFQ) pulse or a reciprocal quantum logic (RQL) pulse that carries data in a quantum computing environment. As an example, the input stage 12 can include a Josephson transmission line (JTL) to propagate the trigger pulse PLS_IN, such as from a sequence of other JTLs. In addition, the input stage 12 can include a Josephson junction that is configured to trigger in response to the trigger pulse PLS_IN. The superconducting transmission line driver system 10 also includes an AC bias current source 14 that is configured to generate an AC bias current. As an example, the AC bias current source 14 can be configured as a transformer configured to propagate an AC signal, demonstrated in the example of FIG. 1 as a signal AC, in a primary winding to inductively provide the AC bias current via a secondary winding. For example, the signal AC can correspond to an RQL clock signal (e.g., the in-phase component, the quadrature-phase component, or a combination thereof).

The superconducting transmission line driver system 10 also includes an amplifier 16 that is coupled to the input stage 12 and is configured to amplify the trigger pulse PLS_IN, such as in a manner that provides for a sequential plurality of flux pulses. As an example, the amplifier 16 can be configured as a superconducting quantum interference device (SQUID) that includes at least one Josephson junction that is configure to be activated in response to the AC bias current and the trigger pulse PLS_IN to generate the plurality of sequential SFQ pulses. For example, the Josephson junction(s) can be unshunted to provide substantially repeated triggering at a very high frequency (e.g., 60 GHz). As an example, the input stage 12 can include a resistor coupled to the amplifier 16, such as to each of a pair of the unshunted Josephson junctions of the SQUID to provide for a common mode triggering of the Josephson junctions.

The superconducting transmission line driver system 10 also includes a low-pass filter (LPF) 18 that is coupled to the amplifier 16. The LPF 18 can be arranged, for example, as an LC filter that interconnects the amplifier 16 and the transmission line. The LPF 18 is configured to filter the sequential SFQ pulses generated by the amplifier 16 to generate a single amplified output pulse, demonstrated in the example of FIG. 1 as PLS_OUT. For example, the LPF 18 is configured to aggregate the sequential flux pulses to generate the single amplified output pulse PLS_OUT. Therefore, the amplified output pulse can be provided on the transmission line at the output. For example, the transmission line can be a 25-ohm transmission line to propagate the amplified output pulse PLS_OUT along a length to maintain sufficient signal amplitude. Therefore, the integrity of the amplified output pulse PLS_OUT can be maintained across a significant length of the transmission line to be received at a receiver device.

As an example, the superconducting transmission line driver system 10 can be configured to operate in an RQL quantum computer system. For example, in response to the trigger pulse PLS_IN being provided as an RQL pulse, the positive fluxon of the RQL trigger pulse PLS_IN can activate the amplifier 16 along with the positive portion of the AC bias current. Therefore, during the positive portion of the AC bias current, the amplifier 16 can provide the sequential flux pulses as positive flux pulses that are filtered via the LPF 18 to provide a positive amplified output pulse. During the negative portion of the AC bias current, the amplifier 16 can generate a sequence of negative flux pulses, such as corresponding to reset of the unshunted Josephson junctions of the SQUID corresponding to the amplifier 16 (e.g., a return to the zero-energy state). The negative flux pulses can thus be filtered by the LPF 18 to generate an amplified negative output pulse. Accordingly, the superconducting transmission line driver system 10 can propagate an RQL pulse across the transmission line.

FIG. 2 illustrates an example of a superconducting transmission line driver circuit 50. The superconducting transmission line driver circuit 50 can correspond to the superconducting transmission line driver system 10 in the example of FIG. 1. Therefore, reference is to be made to the example of FIG. 1 in the following example of FIG. 2.

The superconducting transmission line driver circuit 50 includes an input stage 52 that is configured to receive a trigger pulse, demonstrated in the example of FIG. 2 as a signal PLS_IN. As an example, the trigger pulse PLS_IN can be provided as an SFQ pulse or an RQL pulse that carries data in a quantum computing environment. In the example of FIG. 2, the input stage 52 includes a JTL 53 to propagate the trigger pulse PLS_IN, such as from a sequence of other JTLs. In addition, the input stage 52 includes a Josephson junction J₁ that is configured to trigger in response to the trigger pulse PLS_IN. As an example, the Josephson junction J₁ can be arranged as an unshunted Josephson junction. The input stage 52 further includes a resistor R₁ that is coupled to a node 54 and a node 56. For example, the resistor R₁ can be configured to provide shunting for the Josephson junction J₁.

The superconducting transmission line driver circuit 50 also includes a SQUID 58 that is coupled to the input stage 52. The SQUID 58 includes a first Josephson junction J₂ and a second Josephson junction J₃ that are coupled, respectively, to the nodes 54 and 56, such that the nodes 54 and 56 form a portion of the SQUID 58. In the example of FIG. 2, the Josephson junctions J₂ and J₃ can be configured as unshunted Josephson junctions. The SQUID 58 also includes a pair of inductors L₁ and L₂ that are coupled, respectively, to the Josephson junctions J₂ and J₃ and which are separated by a node 60. While the inductors L₁ and L₂ are demonstrated as a pair of inductors, it is to be understood that the inductors L₁ and L₂ can be arranged as a single inductor with a connection in an approximate center instead of the node 60, as described in greater detail herein.

The superconducting transmission line driver circuit 50 also includes an AC bias current source 62 that is demonstrated in the example of FIG. 2 as a transformer T₁. The transformer T₁ includes a primary winding L₃ through which an AC signal AC is provided, and includes a secondary winding L₄. As an example, the AC signal AC can be an in-phase component, a quadrature-phase component, or a combination thereof of an RQL clock signal. Therefore, the transformer T₁ can inductively provide an AC bias current I_BIAS via the secondary winding L₄. The AC bias current I_BIAS is provided to the node 60 to bias the Josephson junctions J₂ and J₃ of the SQUID 58. Therefore, in response to the trigger pulse PLS_IN, the Josephson junction J₁ can trigger, which can thus activate the Josephson junctions J₂ and J₃ to likewise trigger in response to a positive portion of the AC bias current I_BIAS (e.g., during a positive portion of the AC bias current I_BIAS).

As an example, the triggering of the Josephson junctions J₂ and J₃ can result in the Josephson junctions J₂ and J₃ activating in a voltage state. As a result, the Josephson junctions J₂ and J₃ can sequentially and repeatedly trigger to increase in superconducting phase. Because the resistor R₁ is arranged as coupled to the Josephson junctions J₂ and J₃, the repeated triggering of the Josephson junctions J₂ and J₃ can be provided in a common mode manner, such that the Josephson junctions J₂ and J₃ repeatedly trigger substantially concurrently. The repeated triggering of the Josephson junctions J₂ and J₃ can be at a very high frequency (e.g., approximately 60 GHz), and can thus generate respective sequential flux pulses at the very high frequency. The sequential flux pulses are thus provided to the node 60.

The superconducting transmission line driver circuit 50 also includes an LPF 64 that is coupled to the SQUID 58 via the node 60. In the example of FIG. 2, the LPF 64 is demonstrated as an LC filter that includes an inductor L₅ that interconnects the node 60 and a transmission line 66 (e.g., an approximately 25-ohm transmission line), and also includes a capacitor C₁ interconnecting the inductor L₅ and a low-voltage rail (e.g., ground). The LPF 64 is configured to filter the sequential SFQ pulses generated by the SQUID 58 and provided on the node 60 to generate a single amplified output pulse, demonstrated in the example of FIG. 2 as PLS_OUT. For example, the LPF 64 is configured to aggregate the sequential flux pulses to generate the single amplified output pulse PLS_OUT. Therefore, the amplified output pulse can be provided on the transmission line 66 to propagate the amplified output pulse PLS_OUT along a length to maintain sufficient signal amplitude. Therefore, the integrity of the amplified output pulse PLS_OUT can be maintained across a significant length of the transmission line 66 to be received at a receiver device.

During a negative portion of the AC bias current I_BIAS, the Josephson junctions J₂ and J3 can be reset. For example, because the Josephson junctions J₂ and J₃ are unshunted, the Josephson junctions J₂ and J₃ do not reset themselves. Therefore, the negative amplitude of the AC bias current I_BIAS can initiate an untriggering of the unshunted Josephson junctions J₂ and J₃, such that the Josephson junctions J₂ and J₃ return to a zero superconducting phase state. For each untriggering of the Josephson junctions J₂ and J₃, the Josephson junctions J₂ and J₃ generate a negative fluxon. Thus, during the negative portion of the AC bias current I_BIAS, the Josephson junctions J₂ and J₃ generate a sequential plurality of negative pulses that are provided to the node 60. As a result, similar to as described previously with respect to the positive portion of the AC bias current I_BIAS, the LPF 64 can filter the sequential negative flux pulses to generate the output pulse PLS_OUT as a single negative amplified output pulse. The negative amplified output pulse PLS_OUT is thus likewise provided on the transmission line 66. The reset Josephson junctions J₂ and J₃ are thus initialized to be able to activate on a next cycle (e.g., the next positive portion of the AC bias current I_BIAS). Accordingly, in addition to resetting the Josephson junctions J₂ and J₃, the negative portion of the AC bias current I_BIAS can provide a negative amplified output pulse PLS_OUT, such as in an RQL computing environment.

FIG. 3 illustrates an example of a superconducting transmission line driver circuit 100. The superconducting transmission line driver circuit 100 can correspond to the superconducting transmission line driver system 10 in the example of FIG. 1. Therefore, reference is to be made to the example of FIG. 1 in the following example of FIG. 3.

The superconducting transmission line driver circuit 100 is configured similar to the superconducting transmission line driver circuit 50 in the example of FIG. 2. In the example of FIG. 3, the superconducting transmission line driver circuit 100 includes an input stage 102 that is configured to receive a trigger pulse PLS_IN that can be provided as an SFQ pulse or an RQL. The input stage 102 includes a JTL 103 to propagate the trigger pulse PLS_IN, such as from a sequence of other JTLs, and a Josephson junction J₁ that is configured to trigger in response to the trigger pulse PLS_IN. As an example, the Josephson junction J₁ can be arranged as an unshunted Josephson junction. The input stage 102 further includes a resistor R₁ that is coupled to a node 104 and a node 106, and can provide shunting for the Josephson junction J₁.

The superconducting transmission line driver circuit 100 also includes a SQUID 108 that is coupled to the input stage 102. The SQUID 108 includes a first Josephson junction J₂ and a second Josephson junction J₃ that are coupled, respectively, to the nodes 104 and 106, such that the nodes 104 and 106 form a portion of the SQUID 108. In the example of FIG. 3, the Josephson junctions J₂ and J₃ can be configured as unshunted Joscphson junctions. The SQUID 108 also includes a pair of inductors L₁ and L₂ that are coupled, respectively, to the Josephson junctions J₂ and J₃ and which are separated by a node 110, which can alternatively be arranged as a single inductor with a connection in an approximate center instead of the node 110.

The superconducting transmission line driver circuit 100 also includes an AC bias current source 112 that is demonstrated in the example of FIG. 3 as a transformer T₁. The transformer T₁ includes a primary winding L₃ through which an AC signal AC, which can correspond to RQL clock signal, is provided, and includes a secondary winding L₄. In addition, the superconducting transmission line driver circuit 100 includes a Josephson junction J₄ that is shunted via a resistor R2 interconnecting the AC bias current source 112 and the SQUID 108. Therefore, the transformer T₁ can inductively provide an AC bias current I_BIAS via the secondary winding L₄ through the Josephson junction J₄. The AC bias current I_BIAS is provided to the node 110 to bias the Josephson junctions J₂ and J₃ of the SQUID 108. Therefore, in response to the trigger pulse PLS_IN, the Josephson junction J₁ can trigger, which can thus activate the Josephson junctions J₂ and J₃ to likewise trigger in response to a positive portion of the AC bias current I_BIAS (e.g., during a positive portion of the AC bias current I_BIAS).

The superconducting transmission line driver circuit 100 also includes an LPF 114 that is coupled to the SQUID 108 via the node 110. In the example of FIG. 3, the LPF 114 is demonstrated as an LC filter that includes an inductor L₅ that interconnects the node 110 and a transmission line 116 (e.g., an approximately 25-ohm transmission line), and also includes a capacitor C₁ interconnecting the inductor L₅ and a low-voltage rail (e.g., ground). The LPF 114 is configured to filter the sequential SFQ pulses generated by the SQUID 108 and provided on the node 110 to generate a single amplified output pulse, demonstrated in the example of FIG. 3 as PLS_OUT, similar to as described previously regarding the example of FIG. 2. The output pulse PLS_OUT can be a positive pulse or a negative pulse at respective positive and negative portions of the AC bias current I_BIAS, similar to as described previously in the example of FIG. 2.

In the example of FIG. 3, the Josephson junction J₄ can be configured to provide current clamping of the AC bias current I_BIAS. For example, the Josephson junctions J₂ and J₃ can be fabricated to have a critical current that is tuned to trigger in response to the trigger pulse PLS (e.g., in response to the triggering of the Josephson junction J₁) at a substantial peak amplitude of the AC bias current I_BIAS. However, a variety of factors can result in a variation of the amplitude of the AC bias current I_BIAS, such that the AC bias current I_BIAS could spuriously trigger an activation of one or both of the Josephson junctions J₂ and J₃. As a result, the Josephson junctions J₂ and J₃ could undesirably latch in the voltage state to provide the amplified output pulse PLS_OUT across the transmission line 116 via the LPF 114. However, the Josephson junction J₄ can be tuned with a critical current that is less than the critical currents of the Josephson junctions J₂ and J₃. As a result, the Josephson junction J₄ can trigger in response to a predetermined amplitude of the AC bias current I_BIAS, thus clamping the amplitude of the AC bias current I_BIAS to the predetermined amplitude that resulted in the triggering of the Josephson junction J₄. As a result, the AC bias current I_BIAS can be limited to the predetermined amplitude to mitigate the occurrence of spurious triggering of the Josephson junctions J₂ and J₃, such as in the absence of the trigger pulse PLS_IN.

FIG. 4 illustrates an example of a superconducting transmission line driver circuit 150. The superconducting transmission line driver circuit 150 can correspond to the superconducting transmission line driver system 10 in the example of FIG. 1. Therefore, reference is to be made to the example of FIG. 1 in the following example of FIG. 4.

The superconducting transmission line driver circuit 150 is configured similar to the superconducting transmission line driver circuit 50 in the example of FIG. 2. In the example of FIG. 4, the superconducting transmission line driver circuit 150 includes an input stage 152 that is configured to receive a trigger pulse PLS_IN that can be provided as an SFQ pulse or an RQL. The input stage 152 includes a JTL 153 to propagate the trigger pulse PLS_IN, such as from a sequence of other JTLs, and a Josephson junction J₁ that is configured to trigger in response to the trigger pulse PLS_IN. As an example, the Josephson junction J₁ can be arranged as an unshunted Josephson junction. The input stage 152 further includes a resistor R₁ that is coupled to a node 154 and a node 156, and can provide shunting for the Josephson junction J₁.

The superconducting transmission line driver circuit 150 also includes a first SQUID 158 that is coupled to the input stage 152. The first SQUID 158 includes a first Josephson junction J₂ and a second Josephson junction J₃ that are coupled, respectively, to the nodes 154 and 156, such that the nodes 154 and 156 form a portion of the first SQUID 158. In the example of FIG. 4, the Josephson junctions J₂ and J₃ can be configured as unshunted Josephson junctions. The first SQUID 158 also includes a pair of inductors L₁ and L₂ that are coupled, respectively, to the Josephson junctions J₂ and J₃ and which are separated by a node 160, which can alternatively be arranged as a single inductor with a connection in an approximate center instead of the node 160.

The superconducting transmission line driver circuit 150 also includes an AC bias current source 162 that is demonstrated in the example of FIG. 4 as a transformer T₁. The transformer T₁ includes a primary winding L₃ through which an AC signal AC, which can correspond to RQL clock signal, is provided, and includes a secondary winding L₄. In addition, the superconducting transmission line driver circuit 150 includes a second SQUID 164 that interconnects the AC bias current source 162 and the first SQUID 158. The second SQUID 164 includes a first Josephson junction J₅ and a second Josephson junction J₆ that are coupled, respectively, to the node 160. In the example of FIG. 4, the Josephson junctions J₅ and J₆ can be configured as unshunted Josephson junctions. The second SQUID 164 also includes a pair of inductors L₆ and L₇ that are arranged as secondary windings with respect to primary windings L₈ and L₉, respectively. A DC current, labeled in the example of FIG. 4 as a signal “DC”, is provided through the primary windings L₈ and L₉ to provide a DC bias current I_DC in the second SQUID 164 to enable asymmetrical operation of the second SQUID 164, as described in greater detail herein.

Therefore, the transformer T₁ can inductively provide an AC bias current I_BIAS via the secondary winding L₄. The AC bias current I_BIAS is provided to the node 160 to bias the Josephson junctions J₂ and J₃ of the first SQUID 158 in a positive portion of the AC bias current I_BIAS. Therefore, in response to the trigger pulse PLS_IN, the Josephson junction J₁ can trigger, which can thus activate the Josephson junctions J₂ and J₃ to likewise trigger in response to a positive portion of the AC bias current I_BIAS (e.g., during a positive portion of the AC bias current I_BIAS).

The superconducting transmission line driver circuit 150 also includes an LPF 166 that is coupled to the first SQUID 158 via the node 160. In the example of FIG. 4, the LPF 166 is demonstrated as an LC filter that includes an inductor L₅ that interconnects the node 160 and a transmission line 168 (e.g., an approximately 25-ohm transmission line), and also includes a capacitor C₁ interconnecting the inductor L₅ and a low-voltage rail (e.g., ground). The LPF 166 is configured to filter the sequential SFQ pulses generated by the first SQUID 158 and provided on the node 160 to generate a single amplified output pulse, demonstrated in the example of FIG. 4 as PLS_OUT, similar to as described previously regarding the example of FIG. 2.

In the example of FIG. 4, the secondary winding L₄ of the AC bias current source 162 can have a very high inductance. Additionally, as described previously, the second SQUID 164 can operate asymmetrically, such that the second SQUID 164 can be configured to trigger in response to one direction of the AC bias current I_BIAS and not the other direction of the AC bias current I_BIAS. For example, the second SQUID 164 can be configured to conduct the positive portion of the AC bias current I_BIAS to the first SQUID 158 without triggering, and can be configured to trigger the Josephson junctions J₅ and J₆ in response to the negative portion of the AC bias current I_BIAS. Therefore, during the negative portion of the AC bias current I_BIAS, the Josephson junctions J₅ and J₆ can repeatedly trigger in the voltage state. In response to the repeated triggering of the Josephson junctions J₅ and J₆, the Josephson junctions J₂ and J₃ can be reset back to the zero superconducting phase state without providing the repeated negative flux pulses to the LPF 166. Because of the high inductance of the secondary winding L₄ of the AC bias current source 162, the sequential flux pulses generated by the Josephson junctions J₅ and J₆ in the voltage state are substantially blocked from being provided on the AC bias current I_BIAS, and are instead induced to ground via the inductive coupling to the inductors L₈ and L₉. Accordingly, because the second SQUID 164 can block negative flux pulses from being provided to the LPF 166, the superconducting transmission line driver circuit 150 can be configured to only provide positive output pulses PLS_OUT to the transmission line 168.

In view of the foregoing structural and functional features described above, a methodology in accordance with various aspects of the present invention will be better appreciated with reference to FIG. 5. While, for purposes of simplicity of explanation, the methodology of FIG. 5 is shown and described as executing serially, it is to be understood and appreciated that the present invention is not limited by the illustrated order, as some aspects could, in accordance with the present invention, occur in different orders and/or concurrently with other aspects from that shown and described herein. Moreover, not all illustrated features may be required to implement a methodology in accordance with an aspect of the present invention.

FIG. 5 illustrates an example of a method 200 providing an amplified output pulse (e.g., the output pulse PLS_OUT) to a transmission line (e.g., the transmission line 66). At 202, an AC current (e.g., the AC current AC) is provided to a transformer (e.g., the AC bias current source 62) to inductively provide an AC bias current (e.g., the AC bias current I_BIAS). At 204, an input pulse (e.g., the trigger pulse PLS_IN) is provided to an input stage (e.g., the input stage 12) to trigger at least one unshunted Josephson junction (e.g., the Josephson junctions J₂ and J₃) associated with a SQUID (e.g., the SQUID 58) via the input pulse and the AC bias current. The at least one unshunted Josephson junction can be configured to generate a plurality of sequential SFQ pulses in response to being triggered. The plurality of sequential SFQ pulses can be filtered via a low-pass filter (e.g., the LPF 18) to generate the amplified output pulse that is provided on the transmission line via the low-pass filter.

What have been described above are examples of the disclosure. It is, of course, not possible to describe every conceivable combination of components or method for purposes of describing the disclosure, but one of ordinary skill in the art will recognize that many further combinations and permutations of the disclosure are possible. Accordingly, the disclosure is intended to embrace all such alterations, modifications, and variations that fall within the scope of this application, including the appended claims.

Claims

1. A superconducting transmission line driver system comprising: an input stage configured to receive an input pulse;an AC bias current source configured to provide an AC bias current;an amplifier coupled to the input stage and configured to generate a plurality of sequential single flux quantum (SFQ) pulses based on the input pulse in response to the AC bias current; anda low-pass filter configured to filter the plurality of sequential SFQ pulses by aggregating the plurality of sequential SFQ pulses to generate an amplified output pulse that is output to a transmission line.

2. The system of claim 1, wherein the amplifier is configured as a SQUID comprising at least one unshunted Josephson junction.

3. The system of claim 2, wherein the at least one Josephson junction comprises a plurality of Josephson junctions, wherein the AC bias current is provided to the SQUID to repeatedly trigger the plurality of Josephson junctions associated with the SQUID in a common mode to generate the plurality of sequential SFQ pulses during a positive portion of a period of the AC bias current and to reset the plurality of Josephson junctions during a negative portion of the period of the AC bias current.

4. The system of claim 3, wherein the SQUID is further configured to repeatedly to generate a plurality of sequential negative SFQ pulses during a negative portion of the period of the AC bias current, wherein the low-pass filter is further configured to filter the plurality of sequential negative SFQ pulses by aggregating the plurality of negative sequential SFQ pulses to generate an amplified negative output pulse that is output to the transmission line.

5. The system of claim 2, wherein the input stage further comprises: an input Josephson junction that is triggered via the input pulse to initiate the plurality of sequential SFQ pulses in response to the input pulse; anda resistor coupled to the SQUID and being configured to shunt the input Josephson junction and to provide for common-mode oscillation of a pair of Josephson junctions associated with the SQUID.

6. The system of claim 2, further comprising a shunted Josephson junction interconnecting the AC bias current source and the SQUID, the shunted Josephson junction providing clamping of an amplitude of the AC bias current to mitigate spurious activation of the SQUID.

7. The system of claim 2, wherein the SQUID is configured to generate a plurality of positive sequential SFQ pulses based on a positive portion of the AC bias current and to generate a plurality of negative sequential SFQ pulses based on a negative portion of the AC bias current, such that the low-pass filter is configured to filter the plurality of positive sequential SFQ pulses by aggregating the plurality of positive sequential SFQ pulses to generate an amplified positive output pulse that is output to the transmission line, and is further configured to filter the plurality of negative sequential SFQ pulses by aggregating the plurality of negative sequential SFQ pulses to generate an amplified negative output pulse that is output to the transmission line.

8. The system of claim 2, wherein the SQUID is a first SQUID, wherein the first SQUID is configured to generate a plurality of positive sequential SFQ pulses based on a positive portion of the AC bias current, the system further comprising a second SQUID interconnecting the AC bias current source and the first SQUID, the second SQUID being configured to generate a plurality of sequential SFQ pulses based on a negative portion of AC bias current to reset the first SQUID and suppress the generation of negative sequential SFQ pulses via the first SQUID.

9. The system of claim 1, wherein the input pulse is provided as a reciprocal quantum logic (RQL) pulse.

10. The system of claim 6, wherein the AC bias current source comprises a transformer, the transformer comprising: a primary winding configured to conduct a reciprocal quantum logic (RQL) clock signal; anda secondary winding configured to inductively provide the AC bias current in response to the RQL clock signal.

11. A method for providing an amplified output pulse to a transmission line, the method comprising: providing an AC current to a transformer to inductively provide an AC bias current; andproviding an input pulse to an input stage to trigger at least one unshunted Josephson junction associated with a SQUID via the input pulse and the AC bias current, the at least one unshunted Josephson junction being configured to generate a plurality of sequential single flux quantum (SFQ) pulses in response to being triggered, the plurality of sequential SFQ pulses being filtered via a low-pass filter by aggregating the plurality of sequential SFQ pulses to generate the amplified output pulse that is provided on the transmission line via the low-pass filter.

12. The method of claim 11, wherein the input stage comprises a resistor coupled to the SQUID, such that the at least one unshunted Josephson junction is arranged as a plurality of Josephson junctions that are configured to repeatedly generate the plurality of sequential SFQ pulses in a common mode in response to being triggered at a positive portion of the AC bias signal, and are reset at a negative portion of the AC bias signal.

13. The method of claim 11, wherein the input stage comprises a resistor coupled to the SQUID, such that the at least one unshunted Josephson junction is further configured to repeatedly to generate a plurality of sequential negative SFQ pulses in a common mode in response to being reset at a negative portion of the AC bias signal.

14. The method of claim 11, wherein providing the AC current comprises providing a reciprocal quantum logic (RQL) clock signal to the transformer, and wherein providing the input pulse comprises providing an RQL pulse.

15. The method of claim 11, wherein providing the AC current comprises providing the AC bias current through a shunted Josephson junction to the SQUID, the shunted Josephson junction providing clamping of an amplitude of the AC bias current to mitigate spurious activation of the SQUID.

16. The method of claim 11, wherein the SQUID is a first SQUID, the method further comprising providing a DC bias current to a transformer to induce a DC bias current to a second SQUID that is coupled to the first SQUID, the second SQUID comprising a plurality of Josephson junctions that are activated in response to the DC bias current and a negative portion of the AC bias current to reset the first SQUID and to suppress the generation of negative sequential SFQ pulses via the first SQUID.

17. A superconducting transmission line driver system comprising: an input stage configured to receive a reciprocal quantum logic (RQL) pulse;an AC bias current source configured to inductively provide an AC bias current based on an RQL clock signal;a SQUID coupled to the input stage and configured to generate a plurality of sequential positive SFQ pulses in a positive portion of the AC bias current and in response to the input pulse, and to generate a plurality of negative flux quantum pulses in a negative portion of the AC bias current; anda low-pass filter configured to filter the plurality of sequential positive single flux quantum (SFQ) pulses by aggregating the plurality of sequential positive SFQ pulses to generate an amplified positive output pulse that is output to a transmission line, and to filter the plurality of sequential negative SFQ pulses by aggregating the plurality of sequential negative SFQ pulses to generate an amplified negative output pulse that is output to the transmission line.

18. The system of claim 17, wherein SQUID comprises a plurality of unshunted Josephson junctions to generate the plurality of sequential positive SFQ pulses and the plurality of sequential negative SFQ pulses.

19. The system of claim 17, wherein the input stage further comprises: an input Josephson junction that is triggered via the input pulse to initiate the plurality of sequential SFQ pulses via the RQL pulse; anda resistor coupled to the SQUID and being configured to shunt the input Josephson junction and to provide for common-mode oscillation of a pair of Josephson junctions associated with the SQUID.

20. The system of claim 17, further comprising a shunted Josephson junction interconnecting the AC bias current source and the SQUID, the shunted Josephson junction providing clamping of an amplitude of the AC current to mitigate spurious activation of the SQUID.