The subject matter disclosed herein relates generally to radio frequency (RF) circuits and more particularly to devices, systems, and techniques for use in operating supply modulation transmitters.
As is known in the art, a radio frequency (RF) transmitter is a device that produces RF signals. RF transmitters may be included, for example, as part of a radio communication system that uses electromagnetic waves (radio waves) to transmit information over a distance.
As is also known, in RF communications transmitters (such as those suitable for use in a mobile device such as a cell phone, for example), a trade-off must generally be made between energy efficiency and linearity. It would, therefore, be desirable to provide systems and techniques that allow a user to transmit data carrying RF signals with both high efficiency and high linearity.
One general aspect includes a circuit comprising a multi-output power supply that generates multiple output signals (e.g. multiple voltage signals which may be at one or a plurality of voltage levels); at least one power modulator circuit generate a modulated output signal from the multiple output signals of the multi-output power supply; at least one pulse shaping network (PSN) having at least one passive element, the PSN configured to shape (i.e., filter or modify the trajectory of) the modulated output signal of a multi-output power supply; at least one RF amplifier (e.g., an RF power amplifier coupled to receive a modulated signal from a multiple output supply generator; and a configuration switch network having a plurality of switches to create or modify signal paths from the at least one modulator circuit to the at least one RF amplifier.
Implementations may include one or more of the following features. The multi-output power supply may include a boost converter. The switching network may include a network of switches having an input terminal and an output terminal. In embodiments, the network of switches (e.g. a configuration switch network) may comprise any switch configuration. In embodiments in which capacitive coupling (e.g., due to parasitic capacitance of a switch) is a concern, a configuration switch network may comprise switches coupled in a T-configuration (also referred to herein as a T-arrangement, or a T-network). In embodiments in which capacitive coupling is not a concern, the T-network may be replaced by another switch configuration (i.e., a non T-network switch configuration). In embodiments, in which a T-network of switches is used, the T-network of switches may include: a first switch having a first terminal that forms the input terminal of the T-network of switches and a second terminal coupled to a node, a second switch having a first terminal that forms the output terminal of the T-network of switches and a second terminal coupled to the node, and a third switch having a first terminal coupled to the node and a second terminal coupled to a reference plane. The reference plane is a ground plane. The T-network of switches is coupled in a cascaded configuration with the power modulator circuit to connect or disconnect the modulated power output signal to the at least one power amplifier. The T-network of switches is coupled across the PSN and configured to selectively short the PSN. The T-network of switches is coupled across the passive element of the PSN and configured to alter a transfer function of the PSN by selectively shorting the passive element. At least a first set of the plurality of switches are located on a first integrated circuit die and at least a second set of the plurality of switches are located on a second integrated circuit die. The PSN may include a filter. Implementations of the described techniques may include hardware, a method or process, or computer software on a computer-accessible medium.
One general aspect includes a switching network having a plurality of switches. The switching network also includes at least one input terminal coupled to receive a modulated power signal; at least one output terminal coupled to provide modulated power to at least one power amplifier, and at least one T-network of switches coupled to create of modify a power signal path from the input terminal to the output terminal.
Implementations may include one or more of the following features. The switching network is coupled to a pulse shaping network (PSN) configured to shape the modulated power signal, the pulse shaping network having at least one electronic element (e.g. a passive component). The T-network of switches is coupled across the PSN and configured to selectively short the PSN. The T-network of switches is coupled across the electronic element of the PSN and configured to alter a transfer function of the PSN by selectively shorting the electronic element. The T-network of switches may include: a first switch having a first terminal that forms an input terminal of the T-network of switches and a second terminal coupled to a node, a second switch having a first terminal that forms an output terminal of the T-network of switches and a second terminal coupled to the node, and a third switch having a first terminal coupled to the node and a second terminal coupled to a reference plane. The reference plane is a ground plane. The T-network of switches is coupled in a cascaded configuration with the modulated power signal to connect or disconnect the modulated power signal to the output terminal. Implementations of the described techniques may include hardware, a method or process, or computer software on a computer-accessible medium.
The foregoing features may be more fully understood from the following description of the drawings in which:
Referring now to
Discrete supply modulation system 12 includes a controller 14 comprising control logic circuitry 16 (or more simply control logic 16). Control logic 16 may receive or otherwise acquire transmit data to be transmitted into a wireless channel. The transmit data may be in any format (e.g., a binary bit stream; I and Q data; etc.). Control logic 16 may then use this data, as well as other possible factors, to provide signals to a digital-to-RF modulator 18 which receives the signals provided thereto and generates a corresponding RF signal to be transmitted.
In some embodiments, the goal may be to generate an RF transmit signal that includes an accurate representation of the transmit data. Any of a number of different modulation and coding schemes (MCSs) may be used to represent the transmit data within the RF transmit signal. The MCS may include, for example, binary phase shift keying (BPSK), quadrature phase shift keying (QPSK), quadrature amplitude modulation (e.g., QAM, 16 QAM, 64 QAM, 128 QAM, etc.), orthogonal frequency division multiplexing (OFDM), and/or others. Some of these MCSs have relatively high peak to average power ratios.
MCSs having high peak to average power ratios typically require highly linear power amplification (e.g. via an RF power amplifier such as power amplifier 24 in
As shown in
The RF signal output by the digital-to-RF modulator in response to data provided thereto (e.g. I and Q data) may, therefore, be an RF signal having amplitude A and phase θ. In some implementations, the input information provided to the digital-to-RF modulator may be in a format other than I and Q. For example, in one possible approach, amplitude and phase (A, θ) information may be delivered to the digital-to-RF modulator by controller 14. As described above, the input information applied to the digital-to-RF modulator may change on a sample-by-sample basis in some embodiments.
Regardless of the format in which digital-to-RF modulator 18 receives data provided thereto, the digital-to-RF modulator 18 provides an RF signal to an input 24a of an RF amplifier 24. One of ordinary skill in the art will understand how to select the characteristics of RF amplifier 24 to suit the needs of a particular application. In some applications (e.g. mobile handset applications) RF amplifier 24 comprises an RF power amplifier. RF amplifier 24 receives the RF signal provided thereto and provides an amplified version of the RF signal at an output thereof. The output of RF amplifier 24 may be coupled to another RF circuit or to the input of an antenna, for example.
As noted above, power management circuit (PMC) receives the information (e.g. control signals) provided thereto from the control logic 16 and in response thereto provides variable supply bias voltages (i.e. bias voltage signals) to an RF amplifier 24 (e.g. an RF power amplifier). In embodiments, the variable supply bias voltages are provided in the form of pulses with each pulse having one of a discrete number of voltage levels. That is, the PMC provides one of a plurality of discrete bias voltages to the bias terminal of the RF amplifier. Such discrete voltage supply levels provided by the PMC may be predetermined or may be adapted over time based upon required average transmit power levels or other factors.
Transitions between pulses of different voltage levels (i.e., transitions from one voltage level to another) can give rise to undesired frequency components in the varying supply bias voltage signals V(t) (i.e. the bias voltage signals). Such variable supply bias voltages are provided to the bias (or supply) terminal 23 of the amplifier 24 through a multi-stage pulse shaping network (PSN) 22. The multi-stage PSN functions to filter out or otherwise remove undesirable frequency components in the bias voltage signal (i.e., the PSN filters or shapes the trajectory of the bias voltage signal). Thus, a filtered bias voltage signal is provided to the supply terminal 25 of the RF amplifier 24.
As also noted above, PMC provide a variable supply bias voltage V(t) to the RF amplifier based upon a control signal from the control logic 16. The PMC may be configured to selectively supply one of a plurality of discrete voltages to the RF amplifier and may supply the discrete voltage to the RF amplifier via the PSN.
For reasons which will become apparent from the description provided hereinbelow, the multi-stage PSN comprises spaced-apart stages (i.e. stages which are physically spaced apart) which may, for example, comprise lossless filter elements, including inductors and capacitors, and may further include lossy elements, such as resistors and magnetic beads. The multi-stage PSN serves to provide shaping and/or bandwidth limitation of the voltage transitions between discrete voltage levels and may provide damping of oscillations that might otherwise occur. In embodiments, the multi-stage PSN may be selected to provide a desirable filter response characteristic.
Significantly, and as will also become apparent from the description provided hereinbelow, the multi-stage PSN is physically divided into multiple stages. This approach allows the multi-stage PSN to provide appropriately filtered bias signals to multiple amplifiers without reproducing components of all PSN sections with each additional amplifier. The multi-stage PSN 22 is provided having desirable stop band and rejection band frequency characteristics as well as desirable pass band frequency and rise time characteristics.
Such a multi-stage PSN arrangement is suitable for use with transmit systems in mobile handsets operating in accordance with a 5th generation (5G) communications and other connectivity protocols such as 802.11 a/b/g/n/ac/ax/ad/ay. Such a multi-stage PSN arrangement is also suitable for use with 5G multiple-input, multiple-output (MIMO), uplink carrier aggregation (ULCA), and beamforming systems.
Referring now to
A variable supply bias voltage is provided to amplifier 24′ through a multi-stage PSN 22′, which may be the same as or similar to PSN 22 described above in conjunction with
By physically dividing the PSN 22′, into multiple stages, it is not necessary to reproduce components of the first PSN stage (i.e. Stage A in
With this multi-stage PSN approach it is possible to control receive baseband (RxBN) and out of band emissions for discrete supply modulation transmitters while maintaining linearity and efficiency while also accommodating an amplifier (e.g. an RF PA) which is physically distant from the PMC on an IC or on a PCB or on any type of substrate in a cost-effective manner and which is suitable for a mobile device form factor.
In some embodiments, one or more RF amplifiers may be used to generate a transmit signal in an RF transmitter. For example,
Referring now to
The variable supply bias voltages are provided to amplifiers 42a-42N through a multi-stage PSN 30. In this illustrative embodiment, the multi-stage PSN 30 includes a first PSN stage 38 (and designated in
With this approach, it is possible to control RxBN and out of band emissions for discrete supply modulation transmitters while maintaining linearity and efficiency while also accommodating a plurality of RF amplifiers 42 which are physically distant from the PMC in a cost-effective manner suitable for a mobile device form factor.
Furthermore, the characteristics of each second PSN stage 40 may be matched to the characteristics of the RF amplifier to which the PSN is coupled. It should, of course, be appreciated that in other embodiments, a single second PSN stage may be coupled to multiple RF amplifiers 40.
By physically dividing the multi-stage PSN it is not necessary to reproduce components of the first PSN stage (i.e. Stage A) for each amplifier. Thus, multi-stage PSN serves multiple amplifiers 42a-42N while only having multiple second stages. Since it is not necessary to repeat the entire PSN for each amplifier, this approach saves real estate on a PCB (or similarly, the size of a PCB required to accommodate a PMC, PSN and amplifier (and related circuits) may be reduced).
Thus, with this multi-stage PSN approach, it is possible to control receive baseband (RxBN) and out of band emissions for discrete supply modulation transmitters while maintaining linearity and efficiency while also accommodating a plurality of RF amplifiers (e.g. RF Pas) which are physically distant from the PMC in a cost-effective manner suitable for a mobile device form factor.
Referring now to
In this illustrative embodiment, each output 44a, 44b of PMC 44 is coupled to a respective first PSN stage 46a, 46b. An output of each first PSN stage 46a, 46b is coupled to corresponding ones of second PSN stages 48a, 48b, 48c, 48d. The outputs of second PSN stages 48a-48d are coupled to bias terminals of RF amplifiers 50a, 50b, 52a, 52b respectively.
Thus,
It should be appreciated that the electrical characteristics of second PSN stages 48a, 48b are selected or configured to operate with the electrical characteristics of first PSN stage 46a and the respective RF amplifier to which the second stage is coupled while the electrical characteristics of second PSN stages 48c, 48d are selected or configured to operate with the electrical characteristics of first PSN stage 46b and the respective RF amplifier to which the second stage is coupled. Thus, while the characteristics of the first PSN stages A1, A2 may differ and the characteristics of the second first PSN stages A1B1, A1B2, A2B1, A2B2 may differ, the first and second stages cooperate to provide appropriate and desired filtering to the variable supply bias voltages provided to the amplifiers 50a, 50b, 52a, 52b.
In general, it is desirable to provide a PSN having at least one, or ideally all, of the following qualities/characteristics: a desired amount of signal attenuation in the receive band (i.e. obtaining a desirable amount of attenuation from input to output at a desired offset frequency); a desired unloaded voltage step response (i.e. in response to a voltage step at the input, obtaining a desired peak output voltage assuming the PSN is unloaded (i.e. PA is not biased)); a desired loaded voltage step response: (i.e. in response to a voltage step at the input obtaining a desired peak output voltage assuming the PSN is loaded (i.e. PA is biased); a desired AC output impedance (i.e. for a fixed input voltage, obtaining a desired output voltage variation in response to a varying AC load current at desired frequencies); a desired DC output impedance: (i.e. for a fixed input voltage, obtaining a desired output voltage variation in response to a DC load current); and a desired maximum inrush current (i.e. obtaining a desired peak current a PMIC must source to the PSN during a voltage step). A PSN having other qualities/characteristics may also be desirable.
It should be appreciated that, although in this illustrative embodiment, only two first stages and four second stages are shown, in other embodiments PMC may be coupled to more than two first stages and each first stage may be coupled to more than two second stage. In general, PMC may be provided having N outputs (where N is an integer greater than or equal to 1) and thus PMC may be coupled to at least as many as N first PSN stages and each of the N first PSN stages may be coupled to as many as M second stages (where M is an integer greater than or equal to 1). Furthermore, each of the second PSN stages may be coupled to P amplifiers (where P is an integer greater than or equal to 1).
Although in the illustrative embodiment described in
Referring now to
Referring now to
Accordingly, in embodiments, the selection of electrical characteristics (and thus components) with which to provide a PSN stage depends upon the electrical characteristics of the PA to which the second PSN stage is coupled or about the requirements of the frequency band over which the PA operates.
It should be appreciated that the PMC and first PSN stage (e.g. PSN Stage A) can be located a significant distance from the second PSN stage (e.g. PSN Stage B and from an RF amplifier (e.g. a PA) receiving the variable supply bias voltages.
Referring now to
The circuit portion 70 further includes a pair of second circuits 74a, 74b corresponding to RF amplifiers (which may, for example, be RF power amplifiers) having at least portions of second stages of a multi-stage PSN integrated therewith (i.e. at least a portion of a second PSN stage is merged into each RF amplifier). As illustrated in
It should be noted that although only two RF amplifiers are shown in the illustrative embodiment of
In the illustrative embodiment shown in
Referring now to
Referring now to
Referring now to
Referring now to
Referring now to
In practical systems, the switches may be switched between their “on” and “off” states on timescale consistent with the time required to make a determination of load impedance characteristics and/or performance characteristics of the RF amplifier and/or of performance characteristics of the RF transmit system taken over a period of time (and thus, this would be considered a relatively slow time scale when compared to the switching speed of a switch). In embodiments, the switches may be switched between their “on” and “off” states in response to average characteristics of any or all of: (1) load impedance characteristics; and/or (2) performance characteristics of the RF amplifier and/or (3) of performance characteristics of the RF transmit system. In some embodiments, the switches may be switched between their “on” and “off” states in response to substantially instantaneous impedance changes (i.e. the switch states may be changed as quickly as impedance changes can be identified) rather than on a slower timescale (i.e. slower relative to an instantaneous time scale) such as in response to average characteristics).
Referring now to
In particular, network 88 includes one or more capacitors (with three capacitors being shown in this illustrative embodiment) coupled between a resistor and a reference potential (here the reference potential corresponding to ground). At least one capacitor in network 88 is coupled to a switch. The switch may be arranged (i.e. disposed on either side of the capacitor) such that the switch operates to make or break an electrical conduction between either the resistor and the capacitor or between the capacitor and a reference potential VREF.
In this illustrative embodiment, a pair of switches S1, S2 are serially coupled between respective ones of capacitors C3, C5 and the reference potential. In response to a switch providing a low impedance signal path between a capacitor and the reference potential (i.e. in response to the switch being “closed”), a reconfigurable filter circuit 86 has a first filter characteristic. In response to a switch providing a high impedance signal path between the capacitor and the reference potential (i.e. in response to a switch being “open”), the reconfigurable filter circuit 86 has a second, different filter characteristic.
In general, each switchable signal path with 2 states (i.e. on and off) provides two different filter characteristics. In general, for N switchable signal paths each having 2 states, 2N different filter characteristics are possible.
If an impedance of an RF load coupled to an output of an RF amplifier (e.g. RF amplifier 24 described above in conjunction with
As noted above in conjunction with
Although in the illustrative embodiment of
For example, and with reference now to
It should be appreciated that, in general, at least one switch element is configured to selectively couple at least one reactive element between a reference potential and at least one of the first and second terminals of the reconfigurable filter circuit. For example, in embodiments, the positions of the reactive and switch elements (e.g. elements 96, 98 in
It should further be understood that by placing switches in each of the two or more signal paths one of a plurality of different filtering characteristics over a predetermined RF frequency band can be provided. The switches may be operated independently to provide a desired filter characteristic. For example with N switchable signal paths (with N being an integer greater than or equal to 1), the reconfigurable filter circuit is capable of providing up to 2N different filter characteristics.
In embodiments, at least one of the at least two or more signal paths comprises a switch element having a first terminal coupled to one of the first and second terminals of the reconfigurable filter circuit and a second terminal coupled to a first terminal of one of the reactive elements.
By providing a switch element coupled between one of the reconfigurable filter circuit terminals and a reactive element, the impedance of characteristic of the reactive element can be switched into and out of the filter circuit (thus making the filter circuit reconfigurable). In one embodiment, by placing the switch in a first switch position (e.g. a closed position such that the switch provides a low impedance signal path between the reactive element and one of the reconfigurable filter circuit terminals), the reconfigurable filter circuit is provided having a first filter characteristic and by placing the switch in a second, different switch position (e.g. an open position such that the switch provides a high impedance signal path between the reactive element and one of the reconfigurable filter circuit terminals), the reconfigurable filter circuit is provided having a second, different filter characteristic within the desired frequency band.
In embodiments, a second terminal of one of the reactive elements is coupled to a reference potential VREF (which may, for example, be ground).
Referring now to
As noted above, the respective RF amplifiers 114a, 114b, receive RF signals along respect RF signal paths 112a, 112b, amplify the signals and provide the amplified RF signals to respective ones of antennas 115a, 115b through which an RF transmit signal is emitted.
It should be noted that PMC 116 and PSN Stage A 118 are located a significant distance from PSN Stages B 122a, 122b and the associated PAs 114a, 114b. In the illustrative embodiment of
As noted above, by physically dividing the PSN into multiple stages (here two stages comprised of first stage 118 and second stages 122a, 122b), it is not necessary to reproduce components of the first PSN stage (i.e. Stage A). This approach reduces the amount of are a required on the IC to accommodate the PSN and affords the flexibility to place relatively large PSN components (i.e. PSN components which require a relatively large amount of real estate on an integrated circuit (IC)) in areas of the IC better able to accommodate the larger circuit structures.
Furthermore, with this multi-stage PSN approach, it is possible to control receive baseband (RxBN) and out of band emissions for discrete supply modulation transmitters while maintaining linearity and efficiency while also accommodating a plurality of RF amplifiers (e.g. a plurality of RF PAs) which are physically distant from the PMC on an IC in a cost-effective manner and which is suitable for a mobile device form factor.
It should be appreciated that although the embodiment of
Referring now to
As noted above PMC 116 and Stage A 118 are located a significant distance from Stages B 122a′, 122b′ and the associated PAs 114a, 114b. In the illustrative embodiment of
Thus, in this embodiment, the impedance characteristics of the first PSN stage 118 and/or second PSN stages 122a′, 122b′ may incorporate the parasitics which arise due to one or both of signal paths 122a′, 122b′.
Referring now to
In the illustrative embodiment of
The PMC includes an input 132a coupled to an input signal path 134 provided on the PCB (e.g. the signal path is etched or otherwise provided as part of the PCB using additive or subtractive processes as is generally known). PMC input 132a is configured to receive control signals from a controller (such as controller 14 described herein above in conjunction with
A first stage 138a of a PSN 138 is coupled to the supply voltage signal path. The first PSN stage may be implemented using discrete elements electrically coupled to each other and to the supply voltage signal path. A second stage of the PSN is coupled to the supply voltage signal path. The second PSN stage may be implemented using discrete elements electrically coupled to each other and to the supply voltage signal path. Thus, the circuit of
In embodiments, the first PSN stage is physically proximate the PMC. In embodiments (and as shown and described in conjunction with
In embodiments, the second PSN stage is physically proximate the amplifier bias terminal. In embodiments (and a shown in
The supply voltage signal path 136 is coupled to a supply terminal 140a (or bias terminal) of an RF amplifier 140 disposed on the PCB. Thus, supply voltage signals are provided from the PMC to the RF amplifier bias terminal through the supply voltage signal path 136.
The RF amplifier has an RF input 141a coupled to an RF input signal path 142 provided on the PCB and an RF output coupled to an RF output signal path 144 provided on the PCB. The RF amplifier may be the same as or similar to any of the RF amplifiers described herein above.
Referring now to
It should be further understood that in some applications, it may be desirable to provide both the first and second PSN stages having all passive components. In still other applications, it may be desirable to provide both the first and second PSN stages having at least one active component (e.g. at least one switchable element such as a switch comprising a transistor or a diode).
Referring now to
The PMC module 152 includes an input 152a coupled to an input signal path 154 provided on the PCB (e.g. the signal path is etched or otherwise provided as part of the PCB using additive or subtractive processes as is generally know) and configured to receive control signals from a controller (such as controller 14 described herein above in conjunction with
Also disposed on the substrate is an RF amplifier module 158 comprising an RF amplifier and a portion of a second PSN stage (i.e. a single package which includes an RF amplifier and at least a portion of the second PSN stage regardless of the manner in which either the RF amplifier or second PSN stage are implemented).
In the illustrative embodiment of
It should be appreciated that in embodiments, the entire second PSN stage may be provided as part of the switch module. In embodiments, one or both of the RF amplifier and the second PSN stage (including all or portions of the second PSN stage) may be implemented as integrated circuits or may be implemented using discrete elements (i.e. discrete circuit components).
As may be more clearly understood from
It should thus also be appreciated that a similar approach may be used with the first PSN stage. That is, in embodiments in which the first PSN stage comprises, switches, all of some of the one or more switches may be realized as (i.e. implemented as part of) the PMC module.
It should also be appreciated that the supply voltage signal path (e.g. path 136 in
Referring now to
As described above, PMC 1200 may include a multiple-output supply generator 1204 with multiple output terminals 1206 at which voltages V1-Vm may be provided. Voltages V1-Vm may all be different or some or all of the voltages may be the same.
The supply generator output terminals 1206 may be coupled to one or more supply modulators 1208a-1208n. As illustrated in
Supply modulators 1208, in embodiments, may modulate the input voltages V1-Vm provided thereto and produce an output voltage signal Vx which, as noted above, may be a switched voltage signal that includes variations and pulses in its voltage level. PSNs 1202a-1202n receive respective output voltage signal Vx provided thereto and may apply filtering or other pulse shaping techniques to the output voltage signal Vx to produce respective supply voltage signals VSUPPLY. Supply voltage signals are provided to ones of the RF power amplifiers 1210a-1210n.
In different configurations, PMC 1200 may provide power to multiple power amplifiers. That is, in this example embodiment, PMC 1200 is provided as a multi-output PMC. In the example embodiment of
Although only one multi-output supply generator is illustrated in
In this configuration, the multiple-output supply generator 1252 functions as a boost converter that produces multiple outputs (e.g., at different voltage levels V1, V2, V3) from a voltage supply 1258. In contains one or more inductors L, one or more capacitors C1, C2, and C3, and one or more switches that charge the capacitors S1, S2, and S3. A first terminal of inductor L is coupled to voltage supply 1258 and a second terminal of inductor L is selectively coupled to a reference potential (e.g., to draw current through the inductor L). In this example embodiment, switch S0 may be opened/closed to selectively couple inductor L to a reference potential (here illustrated as ground) to draw current through the inductor L. A controller (not shown) then opens S0 and selectively closes the switches S1, S2, and S3 so that the current through L charges the capacitors C1, C2, and C3 to the desired voltage levels. In other embodiments, other voltage regulation circuits may be used in replace of or in addition to the boost circuit shown in
It should be understood that although in this example embodiment, the reference potential is ground, in other embodiments, other reference potentials may be used to draw current through inductor L. For example, the switches could be opened/closed such that switches S1 or S2 establish a reference potential used to draw current through inductor L.
In the example of
As is known in the art, abrupt switching of voltage signals can introduce undesirable signal elements such as ringing, voltage peaks above or below an operating threshold, etc. These signal elements often occur at frequencies higher than the modulation or switching frequency. Thus, in this example, the PSN 1256 comprises circuit elements arranged to act as a filter. In this example embodiment PSN is provided having a low pass filter characteristic. In other embodiments, PSN 1256 may be provided having other or additional filter characteristics (e.g. bandpass, high-pass, notch, or other filter characteristics). In the example of
Referring now to
For example, in one embodiment, two or more output ports may be coupled to provide output signals in some cases all N output signals (VO1, VO2, VO3, VO4, VO5, VON may be coupled to a bias terminal (e.g. a supply terminal) of a single RF power amplifier. In other embodiments, one or more or each output signal VO1, VO2, VO3, VO4, VO5, VON may be coupled to its own, respective, RF power amplifier (i.e., a bias terminal of respective RF amplifiers). And in still other embodiments, one or more output amplifiers may be coupled to a single output terminal of switching network 1300, while other RF output amplifiers may be coupled to two or more output signals of switching network 1300.
The switches S1-S11 of switching network 1300 may be coupled to a controller (not shown) that can open and close the switches S1-S11 to control the output signals VO1, VO2, VO3, VO4, VO5, VON. In this way, the switching network 1300 can be coupled across one or more PSN (and in some cases, configured to provide a signal path which bypasses one or more of the PSN). For example, when switch S1 is closed, modulated voltage signal VSMA is coupled to output 1302a at which voltage VO1 is provided. When switch S1 is open and switches S2 and S3 are closed, modulated voltage signal VSMA is coupled through PSN 1303 (also referred to as filter network 1303) to output 1302a. And when switches S1 and S3 are open, the output signal VO1 at output 1302a is not connected to voltage signal VSMA, and may be floating or may be tied to some other potential such as ground by circuitry not shown. Thus, switches S1, S2, and S3 can be used to adaptively (or dynamically) in real time enable or disable filtering (performed by a filter network 1303) for output signal VO1. It should be appreciated that filter circuit 1302 may be provided in a variety of different circuit configurations to provide filter characteristics selected to meet the needs of a particular application. Taking filter network (PSN) 1303 illustrative of filter networks 1304-1310, filter network 1303 comprises one or more electronic elements. In the example of
Whether to connect or not a given PSN (e.g. one or more of filter networks 1303-1310) between a supply modulator (e.g. one or more of modulators 1311a, 1311b) and an output (e.g. one of outputs 1302a-1302N) may depend upon a variety of factors including but not limited to: the rf frequency band in which the RF signal provided to the RF input of the power amplifier resides; the bandwidth of the RF signal provided to the RF input of the power amplifier; peak-to-average ratio of the RF signal provided to the RF input of the power amplifier; power level of the RF signal provided to the RF input of the power amplifier; other aspects or characteristics of the RF signal to be provided to the RF input of the PA; the mode of the supply modulation (e.g., digital envelope tracking vs. average power tracking vs. fixed supply) being used; and/or by the characteristics of an operating or application scenario (e.g., observed noise or amplifier behavior) among other factors.
Similarly, when switch S4 is closed, modulated voltage signal VSMA is coupled through filter network 1304 to output 1302b at which voltage VO2 is provided. When switch S5 is closed, modulated voltage signal VSMA is coupled through filter network 1306 to output 1302c. And when switch S6 is closed, modulated voltage signal VSMB is coupled through filter network 1306 to output 1302c. Thus, switches S5 and S6 may be used to select which modulated voltage signal VSMA or VSMB (or both in parallel) is coupled to provide an output signal at output 1302c.
When switch S7 is closed, modulated voltage signal VSMB is coupled through filter network 1308 to terminal 1302d is provided. It should be appreciated that one, some or all of filters 1303-1310 may be provided as reconfigurable filters. For example, filter 1308 comprises switch S8. Switch S8 is configured to change the filtering parameters (or characteristics) of filter network 1308. In this case, closing switch S8 creates a short circuit signal path across inductor L8 thereby effectively removing inductor L8 from filter 1308, which will affect the transfer function of filter network 1308. In this way filter characteristics of filter 1308 may be changed (e.g., adaptively changed or “on-the-fly” or in real time) to suit the needs of a particular application or operating scenario. For example, it might be desirable to dynamically adjust the characteristics of the filter depending upon the rf band in which the signal will be transmitted by the power amplifier, by the bandwidth, peak-to-average ratio, power level, or other aspects of the signal to be transmitted, and by the mode of the supply modulation (e.g., digital envelope tracking vs. adaptive power tracking vs. fixed supply) being used, or by the characteristics of an operating or application scenario (e.g., observed noise or amplifier behavior) among other factors.
Switches S9, may be switched between open and closed states to selectively couple modulated voltage signal VSMB through filter 1310 to node 1312. Switches S10 S11 may be switched between open and closed states to couple node 1312 to either or both of outputs 1302N-1, 1302N at which respective ones of voltages VN-1, VN are provided. When switches S9 and S10 are closed, modulated voltage signal VSMB is coupled through filter network 1310 to output 1302N-1 at which voltage VO N-1 is provided. Similarly, when switches S9 and S11 are closed modulated voltage signal VSMB is coupled through filter network 1310 to node 1312 at which voltage VN-1 may be provided. When all three switches S9, S10, and S11 are closed, modulated voltage signal VSMB is coupled through filter network 1310 to both output terminals 1302N-1 and 1302N.
The signal paths created by switches S1-S11 in
The particular manner in which the switching network 1300 is realized may depend upon the power level, voltage level and application space of the system in which the switching network is being used (e.g., an RF amplifier system). For some mobile device applications (e.g. a cellular phone, smart phone, tablet PC with cellular communication capabilities) it may be desirable to monolithically integrate electronic elements (e.g. circuit components) of both the supply generator and supply modulator and switching elements as well as portions of the ancillary circuits on a single semiconductor die (e.g., in a CMOS or BCD process) or IC. In some cases it may be desirable to integrate electronics such as the modulator(s) and switching network 1300 together with power amplifiers on a single die. Moreover, in some cases it may be advantageous to package the modulator, switches and some of the filter components within a single module and locate other filter components and the RF amplifier in a physically separated location. In still other applications it may be advantageous to package the modulator and some switches on a first die, and further switches on at least one additional die that is placed a relative distance from the first die. This second die may also contain one or more power amplifiers or be located physically close to power amplifier(s), e.g., in a module or co-located on a circuit board. In these latter cases, the switches on the first die can be used for some of the functions described above and may be placed close to one or more first filter stages, while the second die can also implement some of the functions described above and may be placed closer to one or more second filter stages. Communication lines may also be provided between the first die and the second die (or between a controller and the second die) to allow the configuration to be changed.
Referring now to
In this example embodiment, configurable filter network 1400 has a pair of capacitors CA1, CA2 which may represent the parasitic output capacitances of switches SA1 and SA2 and a pair of inductors L0 L1 1407 and a switch network 1402 comprising three switches SA1, SA2, and SB that can be used to configure the filter network 1400. When switches SA1 and SA2 are off and switch SB is on, capacitors CA1 and CA2 form a pi network with inductor L1 1407, in some implementations, with the capacitors CA1 and CA2 providing a relatively low capacitance across the inductor L1 1407. The switches SA1, SA2, and SB are arranged within the circuit 1400 so that, when switches SA1 and SA2 are closed, a signal path having a low impedance characteristic (and ideally a short circuit impedance characteristic) exist between terminals 1402a, 1402b (and thus across terminals 1407a, 1407b of inductor L1 1407). This signal path thus bypasses inductor L1 1407. This change in circuit configuration (i.e., adding a circuit path which removes (in an electrical sense) inductor L1 1407 from the filter network 1400) alters the filter network's transfer function by effectively removing inductor L1 1407 from the filter network (i.e., inductor L1 1407 does not contribute to the characteristics of filter 1400).
Conversely, when switches SA1 and SA2 are open, a signal path having a high impedance characteristic (and ideally an open circuit impedance characteristic) exist between terminals 1402a, 1402b (and thus across inductor terminals 1407a, 1407b) and thus inductor L1 is included in the filter network 1400 (i.e., inductor L1 contributes to the characteristics of filter 1400).
Each switch SA1, SA2, and SB has an associated parasitic capacitance. As illustrated in
It should, of course, be appreciated that in embodiments in which capacitive coupling is not a concern, the T-network may be replaced by another arrangement of switches (i.e., switch configurations other than T-configurations). After reading the disclosure provided herein, one of ordinary skill in the art will appreciate how to select switch configuration(s) to meet the needs of a particular application.
If either or both of switches SA1 and SA2 are open, a low impedance signal path is not formed across inductor terminals 1407a, 1407b and inductor L1 is effectively inserted in the filter circuit. That is, inductor L1 contributes to the filter characteristics of filter 1400. However, the parasitic capacitances CA1 and CA2 may form a “bridge” across the open switches and affect the filter's transfer function (i.e., affect one or more electrical characteristics of filter 1400). To reduce (and ideally minimize or even prevent), parasitic capacitances CA1 and CA2 from affecting the characteristics of filter 1400, switch SB may be closed.
Closing the switch SB couples node 1404 to ground so that the parasitic capacitances CA1 and CA2 do not form a bridge that affects characteristics of the filter network 1400.
Because a switch network having a T configuration removes the effects of the switch's parasitic capacitance from bridging the filter inductor L1, this approach results in filter performance which is improved compared with the filter performance of networks in which a single switch is used to provide a low impedance signal path (and ideally, a short circuit signal path) across inductor L1. Furthermore, in embodiments, the switches SA1, SA2, and/or SB may be unidirectional voltage blocking switches.
This is in contrast to some single-switch implementations in which a single switch may need to provide bidirectional voltage blocking capability.
In general, a T-network of switches can be used to short or otherwise bypass a circuit element within a filter network to thereby provide the filter network as a configurable filter network. For example, switches within the configurable filter network are arranged and operable to effectively bypass or include inductor L1 in the filter so as to change the filter characteristics of the configurable filter. The T-network is configured so that two switches (SA1 and SA2) are coupled between first and second terminals of a circuit element to be bypassed
(e.g., across inductor terminals 1407a, 1407b in the example embodiment of
Referring now to
Referring now to
In this example embodiment, the PSN 1610 may be selectively coupled to either or both of supply modulator circuits 1602, 1604 via the configuration switch network 1605. In particular, in this example embodiment, a T-network of switches 1606 is coupled between power supply modulator circuit 1602 and PSN 1610. Similarly, coupled between supply modulator circuit 1604 and PSN 1610 is a second T-network of switches 1608. T-networks 1606, 1608 can be used to select which supply modulator circuit will be coupled to PSN 1610. Thus, either or both of supply modulator circuits 1602, 1604 may be coupled to and thus provide modulated signals (e.g., voltage signals) to an input of the PSN 1610.
For example, to couple supply modulator circuit 1602 to PSN 1610, switches SAA1 and SAA2 in T-network 1606 may be closed (in which case switch SAB is open), and switches SBA1 and SBA2 in T-network 1608 may be open (in which case switch SBB is closed). Alternatively, to couple PSN 1610 to supply modulator circuit 1604, switches SBA1 and SBA2 in T-network 1608 may be closed, and switches SAA1 and SAA2 in T-network 1606 may be open.
In other configurations, both supply modulators 1606 and 1608 may provide modulated power to PSN 1610 (and subsequently to power amplifiers) in parallel. In this case, switches SAA1 and SAA2 and switches SBA1 and SBA2 in respective T-networks 1606 and 1608 may be closed (in which case switches SAB, SBB are open). Thus, in some embodiments, multiple supply modulators may be configured to operate in a synchronous mode to source current in parallel to the same PA. By combining multiple supply modulators in parallel, a reduced overall supply modulator resistance may be achieved.
Referring now to
In the example embodiment of
For example, closing T-network 1808 and T-network 1810 and opening T-network 1812 couples supply modulator 1802 to PA1 through PSN 1832. Similarly, closing T-network 1808, T-network 1810 and T-network 1812 couples supply modulator 1802 to both PA1 and PA2 through PSN 1832.
In addition to operating T-networks 1808, 1810, 1812 as described above, closing T-network 1814 couples supply modulator 1802 to PA3 through PSNs 1834, 1840. Furthermore, closing T-network 1816 bypasses PSN 1840 (PSN3) in the signal path between supply modulator 1802 and RF amplifier PA3. It should be appreciated that PSN stage 1834 has a first frequency response, PSN stage 1840 has a second frequency response, and the cascade of both produce a third frequency response. By bypassing stage 1840 it is possible to switch from the cascaded response to only the response of 1834. Shorting a stage gives flexibility to achieve a different response. The response that should be used (e.g. whether or not to bypass stage 1840 or any other stage or component) is determined by the needs and/or requirements of a particular application and/or operating conditions (including, but not limited to, for example bandwidth, band of operation, RF requirements).
In addition to operating T-networks 1808, 1810, 1812, 1814, 1816 as described above, closing T-networks 1818 and 1820 couples supply modulator 1802 to PA4 through PSN 1836. Thus, by selectively opening and closing ones of T-networks 1808-1820, supply modulator 1802 may be coupled to one, some or all of RF amplifiers PA1-PA4.
Similarly, by opening and closing selected ones of T-networks 1808-1828, supply modulator 1804 may be coupled to one, some or all of amplifiers PA1-PA4.
Similarly, by opening and closing selected ones of T-networks 1808-1828, supply modulator 1806 may be coupled to one, some or all of amplifiers PA1-PA4.
Additionally, as can now be understood from the above description, two or more of supply modulators 1802, 1804, 1806 can be concurrently coupled to one of more of RF amplifiers PA1-PA3.
One of ordinary skill in the art will recognize that various other signal paths can be created by opening and closing the T-switch networks in
Referring now to
Passive power supply elements 1909 such as capacitors, inductors, and resistors associated with the multi-output power supply 1906 may also be located on or near die 1904 (with “near” meaning in physical proximity such that inductance, capacitance and resistance characteristics of any signal path coupling one or more of elements 1909 (including parasitic inductance, capacitance and resistance characteristics) do not substantially effect operation of all or portions of power modulation circuit 1900) and/or do not substantially increase the size of IC 1904).
Passive elements 1910 (e.g. capacitors, inductors, resistors) that comprise any PSNs may also be located on or near die 1904 (with “near” meaning in physical proximity such that inductance, capacitance and resistance characteristics of any signal path coupling one or more of elements 1910 (including parasitic inductance, capacitance and resistance characteristics) do not substantially affect operation of all or portions of power modulation circuit 1900) and/or do not substantially increase the size of IC 1904).
A control circuit 1912 may also be included on IC die 1904. Control circuit 1912 may be disposed to control (e.g., provide control signals to) one or more of the configuration switch network switches, the power modulator circuits, or other circuits. For example, control circuit 1912 may provide one or more control signals to one or more switches within configuration switch network to set and/or change a state of the switch between its closed (or “on”) and open (or “off”) state.
A second configuration switch network 1914 (which may include one or more T-networks) may be located on one or more second integrated circuit dies 1916. Additional passive elements 1918 that may comprise PSNs may also be located on or near the one or more second dies 1916. Optionally, power amplifier circuits PA may also be located on or near the one or more second integrated circuit dies 1916. One or more signal lines 1920 may carry control signals, communication signals, power signals, RF signals and the like between the dies 1904, 1916.
Die 1904, the one or more dies 1916, or both may be implemented in a CMOS process, a BCD process, an SOI process, a GaAs process, etc. One or more power amplifiers may also be placed physically close to the one or more second dies 1916 or may optionally be physically implemented on the one or more second dies 1916. The one or more second dies 1916 be placed together in a module with passive components and/or with one or more power amplifiers. Additional PSN stages or passive elements may be physically separated from die 1904, the one or more second dies 1916, or both. These elements may still be electrically coupled to die 1904, the one or more second dies 1916, or both.
In the description above, various concepts, circuits, and techniques are discussed in the context of discrete supply modulation system for use with RF transmitters that are operative for transmitting signals via a wireless medium. The concepts, circuits and techniques described herein are appropriate for use in handsets (e.g. mobile handsets) operating in accordance with 6G, communication protocols, 5G communication protocols and other connectivity protocols such as 802.11 a/b/g/n/ac/ax/ad/ay and are also appropriate for use in multi-transmitter applications including, but not limited to, MIMO, uplink carrier aggregation (ULCA), and beamforming applications. It should be appreciated that these concepts, circuits, and techniques also have application in other contexts. For example, in some implementations, features described herein may be implemented within transmitters or drivers for use in wireline communication. In some other implementations, features described herein may be implemented within other types of systems that require highly efficient and highly linear power amplification for data carrying signals.
Various embodiments of the concepts, systems, devices, structures, and techniques sought to be protected are described above with reference to the related drawings. Alternative embodiments can be devised without departing from the scope of the concepts, systems, devices, structures, and techniques described. It is noted that various connections and positional relationships (e.g., over, below, adjacent, etc.) may be used to describe elements in the description and drawing. These connections and/or positional relationships, unless specified otherwise, can be direct or indirect, and the described concepts, systems, devices, structures, and techniques are not intended to be limiting in this respect. Accordingly, a coupling or connection of entities can refer to either a direct or an indirect coupling or connection.
As an example of an indirect coupling relationship, element “A” coupled to element “B” can include situations in which one or more intermediate elements (e.g., element “C”) is between elements “A” and elements “B” as long as the relevant characteristics and functionalities of elements “A” and “B” are not substantially changed by the intermediate element(s).
Also, the following definitions and abbreviations are to be used for the interpretation of the claims and the specification. The terms “comprise,” “comprises,” “comprising, “include,” “includes,” “including,” “has,” “having,” “contains” or “containing,” or any other variation are intended to cover a non-exclusive inclusion. For example, an apparatus, a method, a composition, a mixture or an article, that comprises a list of elements is not necessarily limited to only those elements but can include other elements not expressly listed or inherent to such apparatus, method, composition, mixture, or article.
Additionally, the term “exemplary” is means “serving as an example, instance, or illustration. Any embodiment or design described as “exemplary” is not necessarily to be construed as preferred or advantageous over other embodiments or designs. The terms “one or more” and “at least one” indicate any integer number greater than or equal to one, i.e. one, two, three, four, etc. The term “plurality” indicates any integer number greater than one. The term “connection” can include an indirect “connection” and a direct “connection”.
References in the specification to “embodiments,” “one embodiment, “an embodiment,” “an example embodiment,” “an example,” “an instance,” “an aspect,” etc., indicate that the embodiment described can include a particular feature, structure, or characteristic, but every embodiment may or may not include the particular feature, structure, or characteristic. Moreover, such phrases are not necessarily referring to the same embodiment. Further, when a particular feature, structure, or characteristic is described in connection with an embodiment, it may affect such feature, structure, or characteristic in other embodiments whether or not explicitly described.
Relative or positional terms including, but not limited to, the terms “upper,” “lower,” “right,” “left,” “vertical,” “horizontal, “top,” “bottom,” and derivatives of those terms relate to the described structures and methods as oriented in the drawing figures. The terms “overlying,” “atop,” “on top, “positioned on” or “positioned atop” mean that a first element, such as a first structure, is present on a second element, such as a second structure, where intervening elements such as an interface structure can be present between the first element and the second element. The term “direct contact” means that a first element, such as a first structure, and a second element, such as a second structure, are connected without any intermediary elements.
Use of ordinal terms such as “first,” “second,” “third,” etc., in the claims to modify a claim element does not by itself connote any priority, precedence, or order of one claim element over another, or a temporal order in which acts of a method are performed, but are used merely as labels to distinguish one claim element having a certain name from another element having a same name (but for use of the ordinal term) to distinguish the claim elements.
The terms “approximately” and “about” may be used to mean within ±20% of a target value in some embodiments, within ±10% of a target value in some embodiments, within ±5% of a target value in some embodiments, and yet within ±2% of a target value in some embodiments. The terms “approximately” and “about” may include the target value. The term “substantially equal” may be used to refer to values that are within ±20% of one another in some embodiments, within ±10% of one another in some embodiments, within ±5% of one another in some embodiments, and yet within ±2% of one another in some embodiments.
The term “substantially” may be used to refer to values that are within ±20% of a comparative measure in some embodiments, within ±10% in some embodiments, within ±5% in some embodiments, and yet within ±2% in some embodiments. For example, a first direction that is “substantially” perpendicular to a second direction may refer to a first direction that is within ±20% of making a 90° angle with the second direction in some embodiments, within ±10% of making a 90° angle with the second direction in some embodiments, within ±5% of making a 90° angle with the second direction in some embodiments, and yet within ±2% of making a 90° angle with the second direction in some embodiments.
The disclosed subject matter is not limited in its application to the details of construction and to the arrangements of the components set forth in the following description or illustrated in the drawings. The disclosed subject matter is capable of other embodiments and of being practiced and carried out in various ways.
Also, the phraseology and terminology used in this patent are for the purpose of description and should not be regarded as limiting. As such, the conception upon which this disclosure is based may readily be utilized as a basis for the designing of other structures, methods, and systems for carrying out the several purposes of the disclosed subject matter. Therefore, the claims should be regarded as including such equivalent constructions insofar as they do not depart from the spirit and scope of the disclosed subject matter.
Although the disclosed subject matter has been described and illustrated in the foregoing exemplary embodiments, the present disclosure has been made only by way of example. Thus, numerous changes in the details of implementation of the disclosed subject matter may be made without departing from the spirit and scope of the disclosed subject matter.
Accordingly, the scope of this patent should not be limited to the described implementations but rather should be limited only by the spirit and scope of the following claims.
All publications and references cited in this patent are expressly incorporated by reference in their entirety.
This application is a continuation-in-part of co-pending U.S. application Ser. No. 17/216,919 (filed Mar. 30, 2021), which is a continuation of U.S. patent application Ser. No. 16/369,667 (filed Mar. 29, 2019) now issued as U.S. Pat. No. 10,992,265. The contents of all applications and patents listed in this section are incorporated herein by reference in their entirety.
Number | Date | Country | |
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Parent | 16369667 | Mar 2019 | US |
Child | 17216919 | US |
Number | Date | Country | |
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Parent | 17216919 | Mar 2021 | US |
Child | 18048075 | US |